mirrors/Bochs
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
12,713 Commits 11 Branches 185 Tags 48 MiB
df849619be
Commit Graph

89 Commits

Author SHA1 Message Date
Stanislav Shwartsman
fb09790846 dos2unix to all files 2022-07-30 14:31:16 +03:00
Volker Ruppert
452201a231 Fixed two compiler warnings in the cpu code. 2021-07-27 15:36:11 +00:00
Stanislav Shwartsman
1bf18b8aae ! CPUID: Added TigerLake CPU definition (features CET and CLWB support) 
- CPU code refactor, remove uses of bx_bool datatype and use C++ classic bool instead.
  This enable better compiler optimizations and reduce binary size
 2021-01-30 08:35:35 +00:00
Stanislav Shwartsman
4023b640d6 Protection Keys: Implemented Supervisor-Mode Protection Keys (PKS) 2020-05-29 12:35:30 +00:00
Stanislav Shwartsman
4f7aa4bd76 fixed compilation issue 2019-12-28 15:20:38 +00:00
Stanislav Shwartsman
bcafd5bb7a fix non-printable characters and add more verbose error messages 2019-12-28 15:08:53 +00:00
Stanislav Shwartsman
d091e3bda6 simplify XRSTOR* code 2019-12-28 14:03:54 +00:00
Stanislav Shwartsman
126ae0d0b4 more verbose debug print 2019-12-28 13:36:43 +00:00
Stanislav Shwartsman
9458e25486 reverting commit 13737 and doing correct fix 2019-12-28 13:11:13 +00:00
Stanislav Shwartsman
5d7c6d46b0 fixed compilation after prev commit 2019-12-28 13:02:02 +00:00
Stanislav Shwartsman
7f72252223 fixes in XSAVE/XRSTOR handling 2019-12-28 12:57:31 +00:00
Stanislav Shwartsman
f90e5f4f44 Add initial implementation of the CET (Control Flow Enforcement Technology) emulation according to SDM071 
Only missing items (to be added soon):
  - Supervisor Shadow Stack EPT Control is not implemented yet
  - SMM placing for SSP
Currently have to be added manually to some CPUID model, for example to ICL-U
To enable configure with --enable-cet
 2019-12-20 07:42:07 +00:00
Stanislav Shwartsman
26b67c1942 fixed calling for XSAVE methods with BX_USE_SMF=0 2019-12-17 19:14:09 +00:00
Stanislav Shwartsman
895c4b75df rewritten xsave/xrestore implementation in generic way to simplify adding new xsave/xrestore extensions 2019-12-16 16:14:51 +00:00
Stanislav Shwartsman
44b3ebeca2 remove BX_TRUE/BX_FALSE macros, use stdc++ true/false instead 2019-12-09 16:44:36 +00:00
Stanislav Shwartsman
0c75e0beaf extract xcr0_support bits calculation to a function 2019-12-06 09:23:28 +00:00
Stanislav Shwartsman
773f1b7e42 cleanup return value of all instruction handlers 2018-02-16 07:57:32 +00:00
Stanislav Shwartsman
5439647254 small change to extract ia_opcodes.h from instr.h to dedicated file. this would remove compilation dep of all files on ia_opcodes.h (now called ia_opcdes.def). regenerating dep ober all files in Makefiles.in 2017-10-19 21:27:25 +00:00
Stanislav Shwartsman
22e9051716 implemented correct VM-exit instruction information for INVPCID, RDRAND/RDSEED and XSAVES/XRSTORS instruction Vmexits 2017-05-31 13:16:49 +00:00
Stanislav Shwartsman
3f80447a10 fixed compilation err with x86-64 disabled 2017-03-16 20:13:42 +00:00
Stanislav Shwartsman
3a033fa6db implemented xsaves/xrstors extensions (supported by Intel Skylake core and AMD Ryzen) 2017-03-15 21:44:15 +00:00
Stanislav Shwartsman
bcb36e81fa experimental implementation of protection keys paging extension published in SDM rev054. to enable configure with --enable-protection-keys 2016-03-02 20:44:42 +00:00
Stanislav Shwartsman
b468316250 re-style old resolve macros after resolve function inlining 2015-05-16 21:06:59 +00:00
Stanislav Shwartsman
9f18573740 Rename BX_CPU_CALL_METHODR to BX_CPU_RESOLVE_ADDR and introduce special cases BX_CPU_RESOLVE_ADDR_64 (for 64-bit mode only) and BX_CPU_RESOLVE_ADDR_32 (for 32-bit mode only) 2015-05-11 19:23:09 +00:00
Stanislav Shwartsman
be368f54d1 remove redundant type conversions 2014-03-23 20:01:58 +00:00
Stanislav Shwartsman
1e7b6ff2cd check if XMM reg is clear using dedicated function 2014-03-17 20:50:59 +00:00
Stanislav Shwartsman
ab6230a9a8 Implemented XSAVEC instruction emulation and XINUSE optimization in the XSAVEOPT instruction 2014-03-17 20:29:44 +00:00
Stanislav Shwartsman
d8fa7aa28a implemented INIT optimization for XSAVEOPT instruction 2014-03-16 21:56:30 +00:00
Stanislav Shwartsman
72b715e5f0 fixed XSAVE to match spec, implemented first look into XINUSE. TODO: use XINUSE to optimize XSAVEOPT as well 2014-03-16 21:03:13 +00:00
Stanislav Shwartsman
97d2965d58 continue xsave code rework 2014-03-16 20:37:47 +00:00
Stanislav Shwartsman
9d8d895b52 cpuid fixes 2014-03-15 20:19:30 +00:00
Stanislav Shwartsman
bfe6ecabb8 xsave sse state using same interface as all other advanced states 2014-03-04 21:06:29 +00:00
Stanislav Shwartsman
bc5af269b7 Fix some more code duplication with sclaar_arith.h 
Do not clear IA32_FEATURE_CTRL MSR on soft reset (will clear the VMX lock bit)
On real HW XSAVE/XRSTOR which is not 4-byte aligned cause #AC(0) intead of #GP(0) when alignment check is enabled
 2014-03-02 16:40:13 +00:00
Stanislav Shwartsman
648221d419 rewritten xsave/xrestor for more modular functionality. todo: replace walk through state using simple for loop 2014-02-22 21:00:47 +00:00
Stanislav Shwartsman
36ba25847f Implemented last missed AVX-512 unsigned convert instructions 
The only missed AVX-512 opcodes now are:

512.66.0F38.W0 13 VCVTPH2PS
512.66.0F3A.W0 1D VCVTPS2PH

512.66.0F38.WIG 21 VPMOVSXBD
512.66.0F38.WIG 22 VPMOVSXBQ
512.66.0F38.WIG 23 VPMOVSXWD
512.66.0F38.WIG 24 VPMOVSXWQ
512.66.0F38.W0  25 VPMOVSXDQ

512.66.0F38.WIG 31 VPMOVSZBD
512.66.0F38.WIG 32 VPMOVSZBQ
512.66.0F38.WIG 33 VPMOVSZWD
512.66.0F38.WIG 34 VPMOVSZWQ
512.66.0F38.W0  35 VPMOVSzDQ

512.66.0F38.W0 2C VSCALEFPS
512.66.0F38.W1 2C VSCALEFPD
NDS.LIG.66.0F38.W0 2D VSCALESS
NDS.LIG.66.0F38.W1 2D VSCALESD

512.66.0F38.W0 4C VRCP14PS
 512.66.0F38.W1 4C VRCP14PD
NDS.LIG.66.0F38.W0 4D VRCP14SS
 NDS.LIG.66.0F38.W1 4D VRCP14SD
512.66.0F38.W0 4E VRSQRT14PS
 512.66.0F38.W1 4E VRSQRT14PD
NDS.LIG.66.0F38.W0 4F VRSQRT14SS
 NDS.LIG.66.0F38.W1 4F VRSQRT14SD

NDS.512.66.0F3A.W0 03 VALIGND
NDS.512.66.0F3A.W1 03 VALIGNQ

512.66.0F3A.W0 08 VRNDSCALEPS
512.66.0F3A.W1 09 VRNDSCALEPD
NDS.LIG.66.0F3A.W1 0A VRNDSCALESS
NDS.LIG.66.0F3A.W1 0B VRNDSCALESD

512.66.0F3A.W0 19 VEXTRACTF32x4
512.66.0F3A.W1 1B VEXTRACTF64x4
512.66.0F3A.W0 39 VEXTRACTI32x4
512.66.0F3A.W1 3B VEXTRACTI64x4

512.66.0F3A.W0 26 VGETMANTPS
 512.66.0F3A.W1 26 VGETMANTPD
NDS.LIG.66.0F3A.W0 27 VGETMANTSS
 NDS.LIG.66.0F3A.W1 27 VGETMANTSD
 2014-01-28 12:57:38 +00:00
Stanislav Shwartsman
ca2793ac76 Debugger: fixed param tree access to 64-bit variables (need to use get64() instead of get()) 
Debugger: if AVX-512 if not supported by current configuration do not print high256 of vector registers and zmm15..zmm31 in AVX command
Implement VBROADCASTF64x4, VBROADCASTF32x4, VBROADCASTFI64x4, VBROADCASTI32x4 AVX-512 instructions
Fetchdecode optimizations and bugfixes
 2013-12-05 19:17:16 +00:00
Stanislav Shwartsman
2c9cf33b2f update (c) for few files 2013-09-05 18:37:10 +00:00
Stanislav Shwartsman
59c65151f5 various fixes 2013-08-29 19:43:15 +00:00
Stanislav Shwartsman
5d61c19b0b evex support - step2 2013-08-27 20:47:24 +00:00
Stanislav Shwartsman
701d88388e fixed FCS/FDS deprecation 2013-08-22 20:21:36 +00:00
Stanislav Shwartsman
2dbe81db51 first infrastructure changes to support EVEX prefix and AVX-512 extensions recently published by Intel 2013-07-26 12:50:56 +00:00
Stanislav Shwartsman
fd71b03353 add some definitions introduced in recent Intel SDM extensions document (rev015) 2013-07-23 20:51:52 +00:00
Stanislav Shwartsman
c7698a5589 implemented fcs/fds deprecation. added haswell to cpudb.h as well 2013-06-20 20:12:53 +00:00
Stanislav Shwartsman
6e5a934eea XSAVE: Fixed XCR0 reserved combination checking in XSETBV instruction 2012-12-23 16:54:18 +00:00
Stanislav Shwartsman
182ad65ea3 changes in avx emulation code 2012-12-09 16:42:48 +00:00
Stanislav Shwartsman
f69bc016d2 vmx: nmi blocking after NMI event injection. better dbg print for VMEXIT 2012-10-04 16:15:58 +00:00
Stanislav Shwartsman
a1ebdc41ac Fixed SF bug [3548109] VMX State Not Restored After Entering SMM on 32-bit Systems 
Fixed .conf.nothing configure script

Fixed copyright for some files
 2012-07-27 08:13:39 +00:00
Stanislav Shwartsman
e0729e32b8 fixed bug 3548108 VMEXIT instruction length Not always getting updated 2012-07-26 16:03:26 +00:00
Stanislav Shwartsman
7f5f917a34 more SVM implementation 2011-12-27 19:42:11 +00:00
Stanislav Shwartsman
c32eaa5d05 added more svm intercepts 2011-12-26 20:51:57 +00:00