Commit Graph

26 Commits

Author SHA1 Message Date
Stanislav Shwartsman
002c86660a reword all the CPU code in preparation for future CPU speedup implementation.
Bochs emulation can be another 10-15% faster using technique described in paper
"Fast Microcode Interpretation with Transactional Commit/Abort"
http://amas-bt.cs.virginia.edu/2011proceedings/amasbt2011-p3.pdf
2011-07-06 20:01:18 +00:00
Volker Ruppert
c78026a9a2 - deleted executable properties from source files 2011-04-03 10:29:19 +00:00
Stanislav Shwartsman
00981cd7a6 Adding Id and Rev property to all files 2011-02-24 22:05:47 +00:00
Stanislav Shwartsman
033a20b3b2 allow to configure CPU features at runtime - implemened on example of SSE/AES/MOVBE/POPCNT 2010-02-25 22:04:31 +00:00
Stanislav Shwartsman
4882aa035a fix 2010-02-08 14:28:20 +00:00
Stanislav Shwartsman
9d934cb989 small updates 2010-02-06 20:52:27 +00:00
Stanislav Shwartsman
452f9d0422 bugfix 2009-10-18 19:24:56 +00:00
Stanislav Shwartsman
7254ea36a1 copyright fixes + small optimization 2009-10-14 20:45:29 +00:00
Stanislav Shwartsman
73cc6a485d cleanup code 2009-05-28 19:25:33 +00:00
Stanislav Shwartsman
89f057ae7b x87 fix 2009-04-27 14:00:55 +00:00
Stanislav Shwartsman
08de514d9c code cleanup for future optimization 2009-03-10 21:43:11 +00:00
Stanislav Shwartsman
77974ab952 - removed wrong character from FSF address (converted invisible and useless
2-byte character)
2009-02-08 17:29:34 +00:00
Stanislav Shwartsman
9929e6ed78 - updated FSF address 2009-01-16 18:18:59 +00:00
Stanislav Shwartsman
307d75f632 Optimizations in FPU tag word handling - compress FPU tag word internally and expose only when calling for tag word read operations (only 4 instructions) 2008-05-10 13:34:01 +00:00
Stanislav Shwartsman
3f5263a142 Compilation fixes that allow to disable FPU by just setting BX_SUPPORT_FPU=0 2008-04-04 21:05:37 +00:00
Stanislav Shwartsman
167c7075fb Use fastcall gcc attribute for all cpu execution functions - this pure "compiler helper" optimization brings additional 2% speedup to Bochs code 2008-03-22 21:29:41 +00:00
Stanislav Shwartsman
eebd96e2d7 another whitespace cleanup by Sebastien 2008-02-05 22:33:35 +00:00
Stanislav Shwartsman
26f08fdb2c Change my e-mail to #SF one 2007-03-23 21:27:13 +00:00
Stanislav Shwartsman
7b6c2587a9 Now devices could be compiled separatelly from CPU
Averything that required cpu.h include now has it explicitly and there are a lot of files not dependant by CPU at all which will compile a lot faster now ...
2006-03-06 22:03:16 +00:00
Stanislav Shwartsman
d10731f162 Update my e-mail in source files
Update committed SF patches in changes
2005-05-12 18:07:48 +00:00
Stanislav Shwartsman
e01789b276 Add CVS header for FPU files 2005-03-20 21:19:38 +00:00
Stanislav Shwartsman
f9bd2b74be 1. Fixed bug in FSUB instruction
2. Fixed bug

[ 989478 ] I-Cache and undefined Instruktions

The L4 microkernel uses an undefined instruction to
trap for a special requests into the kernel (LOCK NOP).
The handler fixes this up and gives the user a special
code page with syscall stubs. If you're not using the
I-Cache optimization everthing works find on bochs. But
if you enable the I-Cache (--enable-icache), then the
undefined opcode exception is thrown only once for ever
virtual address it occurs. See the demodisk of the
L4KA::pistachio
(http://www.l4ka.org/projects/pistachio/download.php).
In this case the pingpong benchmark of this demo is of
interest. Everything runs fine until the program tries
to spawn a new task for its measurements. This new task
shares the code of the creating program. But the new
task stops executing at the undefined instruction
explained above and no exception is thrown.
2004-07-29 20:15:19 +00:00
Stanislav Shwartsman
50aaf8ec6f Implemented FFREEP 287+ compatability instruction 2004-07-15 19:45:33 +00:00
Stanislav Shwartsman
5c5b556f24 Merge softfloat-fpu-implementation_ver4_branch branch 2004-06-18 14:11:11 +00:00
Stanislav Shwartsman
a8b57836a2 all these files should be in branch only for now 2004-04-09 12:52:49 +00:00
Stanislav Shwartsman
04124133c0 freeze softfloat-fpu-ver3 branhc and open it for free testing
I will continue the development in new softfloat-fpu-ver4 branch
Current version already implements ALL FPU instructions except
   FSIN, FCOS, FSINCOS, FPTAN, FPATAN, FYL2XP1, F2XM1, FYL2X
I think it solved all currently reported bugs and feature requests
related to FPU code.
Please write your own test programms and test the implemntation in all ways you can.
Thanks,
Stanislav
2004-04-09 12:29:50 +00:00