- since rombios.c also supports 8 processors, go ahead and build an 8 cpu
bios as well.
Modified Files:
BIOS-bochs-2-processors BIOS-bochs-4-processors
BIOS-bochs-latest
Added Files:
BIOS-bochs-8-processors
about this, #535432: Emu panics when pressing ">"-key. The user did not
report exactly what the exact message was, but these sound like the
correct ones. BIOS panics are permanent fatal errors, so I don't
want them to show up accidently, especially for something as trivial
as bumping the wrong key.
in BRANCH-smp-bochs revisions.
- The general task was to make multiple CPU's which communicate
through their APICs. So instead of BX_CPU and BX_MEM, we now have
BX_CPU(x) and BX_MEM(y). For an SMP simulation you have several
processors in a shared memory space, so there might be processors
BX_CPU(0..3) but only one memory space BX_MEM(0). For cosimulation,
you could have BX_CPU(0) with BX_MEM(0), then BX_CPU(1) with
BX_MEM(1). WARNING: Cosimulation is almost certainly broken by the
SMP changes.
- to simulate multiple CPUs, you have to give each CPU time to execute
in turn. This is currently implemented using debugger guards. The
cpu loop steps one CPU for a few instructions, then steps the
next CPU for a few instructions, etc.
- there is some limited support in the debugger for two CPUs, for
example printing information from each CPU when single stepping.
