Commit Graph

6 Commits

Author SHA1 Message Date
Bryce Denney
a37950bf5a - clean up rombios.txt when done 2001-05-29 14:35:45 +00:00
Bryce Denney
2d399f2501 - applied Cliff Hones's bios patches <cliff@aonix.co.uk>
His change log says:
  - Makefile simplified - no longer uses tools86, dataseghack or ld86.
    Also enables warnings (-w-) and checks for undefined labels (-u-).
  - Macros used in place of multi-line #defines (so !!! conversion by
    tools86 not needed).
  - HALT() fixed [previously used ';' instead of '!!!'].  Needs port 400 to
    be added to iodev to be useful?
  - isru removed - doesn't seem to be needed now.
  - added UDIV16 (for use by bios_printf).
  - bios_printf %d implemented.
  - set_enable_a20 changed to use PS2 method, since bochs emulates this.
  - Keyboard intercept (int 15h/42h) fixed - should set CF, not assume that
    caller already has.  [The DOS keyb driver for example doesn't!]
  - Memory is scanned from C000 to F4000 for extension ROMs - this
    picks up VGA BIOS as before, and allows others to be included.
  - Comments improved for bios config table, and bit indicating RTC
    present is now set.
  - Int 9 (keyboard) now calls Int 15h/42h for key releases too.
    [Again, this is what the DOS keyb driver does.]
2001-05-24 22:27:44 +00:00
Bryce Denney
e61d00351f - merged BRANCH-smp-bochs into main branch. For details see comments
in BRANCH-smp-bochs revisions.
- The general task was to make multiple CPU's which communicate
  through their APICs.  So instead of BX_CPU and BX_MEM, we now have
  BX_CPU(x) and BX_MEM(y).  For an SMP simulation you have several
  processors in a shared memory space, so there might be processors
  BX_CPU(0..3) but only one memory space BX_MEM(0).  For cosimulation,
  you could have BX_CPU(0) with BX_MEM(0), then BX_CPU(1) with
  BX_MEM(1).  WARNING: Cosimulation is almost certainly broken by the
  SMP changes.
- to simulate multiple CPUs, you have to give each CPU time to execute
  in turn.  This is currently implemented using debugger guards.  The
  cpu loop steps one CPU for a few instructions, then steps the
  next CPU for a few instructions, etc.
- there is some limited support in the debugger for two CPUs, for
  example printing information from each CPU when single stepping.
2001-05-23 08:16:07 +00:00
Bryce Denney
b20b03b1ca - since dataseghack was checked in with permission 664 (not executable),
run it using "csh dataseghack"
2001-05-04 07:02:04 +00:00
Bryce Denney
a6fef54678 - update copyright dates to 2001 for all mandrake headers
- for bochs files with other header, replaced with current mandrake header
2001-04-10 02:20:02 +00:00
cvs
beff63eb32 - entered original Bochs snapshot bochs-2000_0325a.tar.gz from
ftp.bochs.com
2001-04-10 01:04:59 +00:00