Stanislav Shwartsman
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002c86660a
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reword all the CPU code in preparation for future CPU speedup implementation.
Bochs emulation can be another 10-15% faster using technique described in paper
"Fast Microcode Interpretation with Transactional Commit/Abort"
http://amas-bt.cs.virginia.edu/2011proceedings/amasbt2011-p3.pdf
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2011-07-06 20:01:18 +00:00 |
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Stanislav Shwartsman
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2f582db722
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compile less stuff for cpu-level=5
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2011-06-26 19:15:30 +00:00 |
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Stanislav Shwartsman
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d440a5eda0
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avx bug fix
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2011-04-29 23:06:50 +00:00 |
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Stanislav Shwartsman
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7ced718040
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implemented AVX instructions support
many changes - some cleanup will follow
please report ay found bugs !
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2011-03-19 20:09:34 +00:00 |
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Stanislav Shwartsman
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7d80a6ebe0
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Adding Id and Rev property to all files
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2011-02-24 21:54:04 +00:00 |
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Stanislav Shwartsman
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57d01889b1
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Fixed PCMPGTQ instruction
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2011-02-19 11:00:43 +00:00 |
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Stanislav Shwartsman
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b5ebe5865e
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Fixes for incoming bug report, missed changes in CVS, repository fixups and etc
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2011-02-11 09:56:23 +00:00 |
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Stanislav Shwartsman
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5915d92775
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very small optimizations + indent
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2011-01-25 20:59:26 +00:00 |
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Stanislav Shwartsman
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5917eb29ab
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sse + mmx optimizations
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2011-01-16 21:01:28 +00:00 |
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Stanislav Shwartsman
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8c5c078b13
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optimize sse and mmx code
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2011-01-16 20:42:28 +00:00 |
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Stanislav Shwartsman
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a80b44b6db
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split more sse ops
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2011-01-09 20:18:02 +00:00 |
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Stanislav Shwartsman
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37204c0aaa
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split more SSE ops
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2011-01-08 12:28:25 +00:00 |
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Stanislav Shwartsman
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a1bc92a46b
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split more SSE opcodes
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2011-01-08 11:20:29 +00:00 |
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Stanislav Shwartsman
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f9f868247a
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split more SSE ops
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2010-12-30 20:35:10 +00:00 |
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Stanislav Shwartsman
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1bd512e98d
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split more SSE ops, optimizations in MMX code
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2010-12-25 17:04:36 +00:00 |
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Stanislav Shwartsman
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c005444d5b
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split more SSE opcodes
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2010-12-25 07:59:15 +00:00 |
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Stanislav Shwartsman
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040a8e1a3a
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split bunch of SSE opcodes
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2010-12-24 08:35:00 +00:00 |
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Stanislav Shwartsman
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43600f3756
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complete rework of SSE code
next step - split all SSE opcodes by ModC0
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2010-12-22 21:16:02 +00:00 |
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Stanislav Shwartsman
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9aa503cb9d
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fixed warnings for win64 compilation
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2010-11-23 14:59:36 +00:00 |
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Stanislav Shwartsman
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3dfcfd0ccd
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Split shift opcodes | optimize SAR opcode
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2010-05-18 07:28:05 +00:00 |
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Stanislav Shwartsman
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01de3e1926
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PEXTRB/W/D/EXTRACTPS fixed
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2010-04-02 19:03:47 +00:00 |
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Stanislav Shwartsman
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927c3594d6
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enable compilation with CPU_LEVEL <= 6
converted SEP to runtime option as well
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2010-02-26 11:44:50 +00:00 |
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Stanislav Shwartsman
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033a20b3b2
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allow to configure CPU features at runtime - implemened on example of SSE/AES/MOVBE/POPCNT
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2010-02-25 22:04:31 +00:00 |
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Stanislav Shwartsman
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70dc124b3a
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1st step of moving CPU options to runtime
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2010-02-24 19:27:51 +00:00 |
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Stanislav Shwartsman
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7254ea36a1
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copyright fixes + small optimization
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2009-10-14 20:45:29 +00:00 |
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Stanislav Shwartsman
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08de514d9c
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code cleanup for future optimization
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2009-03-10 21:43:11 +00:00 |
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Stanislav Shwartsman
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9929e6ed78
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- updated FSF address
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2009-01-16 18:18:59 +00:00 |
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Stanislav Shwartsman
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bc381e51da
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very small cleanups
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2008-09-19 19:18:57 +00:00 |
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Stanislav Shwartsman
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a8adb36dc2
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Implemented MOVBE Intel Atom(R) instruction
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2008-08-11 18:53:24 +00:00 |
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Stanislav Shwartsman
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5dd02b26e3
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Make even more efficient RmAddr calculation - good optimizing compiler could make more efficient code than it was before
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2008-08-08 09:22:49 +00:00 |
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Stanislav Shwartsman
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709d74728d
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Call #UD exception directly instead of UndefinedOpcode function - for future use
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2008-07-13 15:35:10 +00:00 |
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Stanislav Shwartsman
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81b1a0ddb7
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Fixed bug in BLENDVPS/PD instructions
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2008-05-10 22:20:05 +00:00 |
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Stanislav Shwartsman
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ec1ff39a5f
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Splitted memory access methods for 32 and 64-bit code.
The 64-bit code got >10% speedup, the 32-bit code also got about 2% because laddr cacluation optimization
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2008-05-10 18:10:53 +00:00 |
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Stanislav Shwartsman
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167c7075fb
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Use fastcall gcc attribute for all cpu execution functions - this pure "compiler helper" optimization brings additional 2% speedup to Bochs code
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2008-03-22 21:29:41 +00:00 |
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Stanislav Shwartsman
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7e490699d4
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Removing hooks for not-implemented SSE4A from the Bochs code.
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2008-03-21 20:04:42 +00:00 |
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Stanislav Shwartsman
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a2897933a3
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white space cleanup
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2008-02-02 21:46:54 +00:00 |
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Stanislav Shwartsman
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d9984bb3a1
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Eliminate BxResolve call from the heart of cpu loop and move into instructions that really require this calculation. Yes, it blows the code of EVERY CPU method but it has >15% speedup !
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2008-01-10 19:37:56 +00:00 |
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Stanislav Shwartsman
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5d4e32b8da
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Avoid pointer params for every read_virtual_* except 16-byte SSE and 10-byte x87 reads
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2007-12-20 20:58:38 +00:00 |
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Stanislav Shwartsman
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b516589e4e
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Changes in write_virtual_* and pop_* functions -> avoid moving parameteres by pointer
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2007-12-20 18:29:42 +00:00 |
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Stanislav Shwartsman
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1e843cb462
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Decode SSE4A
Rework immediate bytes decoding to make it faster
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2007-12-15 17:42:24 +00:00 |
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Stanislav Shwartsman
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83f6eb6945
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Changes copyrights for the files I wrote :)
Also split EqId G1 group for x86-64
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2007-11-17 23:28:33 +00:00 |
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Stanislav Shwartsman
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dbb91069f4
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Added SSE4_2 instructions emulation
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2007-10-01 19:59:37 +00:00 |
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Stanislav Shwartsman
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3e3254ecc4
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some speedup for SSE code - achived by code simplification
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2007-09-20 22:55:03 +00:00 |
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Stanislav Shwartsman
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895891b673
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Implemented #AC check under configure option
Fixes in misaligned SSE support
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2007-07-31 20:25:52 +00:00 |
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Stanislav Shwartsman
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5189cfbf10
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SSE4 support
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2007-04-19 16:12:21 +00:00 |
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Stanislav Shwartsman
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bdc4905c8a
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Correctly detect SSE2 and SSE instructions and #UD when SSE2 is OFF for SSE
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2007-04-02 10:46:33 +00:00 |
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Stanislav Shwartsman
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26f08fdb2c
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Change my e-mail to #SF one
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2007-03-23 21:27:13 +00:00 |
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Stanislav Shwartsman
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1ec33ec518
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Correctly #UD on aliased instructions when no SSE2 is configured
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2007-03-22 22:51:41 +00:00 |
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Stanislav Shwartsman
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f8003098b1
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Rename SSE4 to SSE3E to match intel docs. SSE4 coming later ;)
Fixed "last prefix" for REX in 64-bit mode
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2007-01-25 19:09:41 +00:00 |
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Stanislav Shwartsman
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16713b309d
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PALIGNR fixed
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2006-05-16 16:20:26 +00:00 |
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