Stanislav Shwartsman
c6d07ae1b5
store modrm() for x87 in Ib() byte because x87 have no Ib()
2011-09-20 06:02:27 +00:00
Stanislav Shwartsman
2583f8549a
small code duplication fix
2011-09-19 20:47:59 +00:00
Stanislav Shwartsman
d489ba3d37
generic cpuid: automatically enable lzcnt of bmi is enabled; sse4a support in cpuid
2011-09-18 18:17:34 +00:00
Stanislav Shwartsman
6fb673b9fa
change BX_PANIC to BX_ERROR
2011-09-18 17:36:54 +00:00
Stanislav Shwartsman
50207eeb90
- Added support for AMD SSE4A emulation, the instructions can be enabled
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using .bochsrc CPUID option.
2011-09-18 16:18:22 +00:00
Stanislav Shwartsman
efc588cf1e
rename avx2_gather.cc -> gather.cc
2011-09-16 20:59:57 +00:00
Stanislav Shwartsman
ea54f40361
keep global pages when needed in INVPCID/INVVPID
2011-09-16 20:52:38 +00:00
Stanislav Shwartsman
3632340dac
improve bochs exit dump in long64 mode
2011-09-16 20:25:05 +00:00
Stanislav Shwartsman
88a58b3781
fixed compilation with x86-64=0
2011-09-16 20:12:36 +00:00
Stanislav Shwartsman
330bf62f61
added INVPCID instruction support
2011-09-16 20:06:23 +00:00
Stanislav Shwartsman
e2f0880f1c
support more than 32-bit cpu features vector
2011-09-14 20:22:24 +00:00
Stanislav Shwartsman
d5fcfabb38
bugfix + update changes
2011-09-13 19:38:09 +00:00
Stanislav Shwartsman
f4dbaf1cd8
re-shuffle macros, no impact in general
2011-09-13 17:55:36 +00:00
Stanislav Shwartsman
02e1a0f23c
Merge lazy flags optimization by Darek Mihocka.
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I measure slight but consistent speedup of ~1-3% for all guests.
Tested: Windows XP/7 boot 32/64 bit, various Linux live CD
2011-09-12 19:36:53 +00:00
Stanislav Shwartsman
9f1f4781b3
fixed Sandy Bridge name in err message - it is Core i7 and not Core2
2011-09-06 19:49:22 +00:00
Stanislav Shwartsman
939aee87c9
handle special case - BSF/BSR vs TZCNT/LZCNT
2011-09-06 19:18:21 +00:00
Stanislav Shwartsman
184837e0ed
fixed compilation err with no handlers chaining enabled
2011-09-06 15:41:52 +00:00
Stanislav Shwartsman
96cedbc756
continue handlers-chaining optimization: update time once per trace and not for every instruction
2011-09-06 15:35:39 +00:00
Stanislav Shwartsman
e000b61cfd
make RDTSC 'end of trace' instruction - guarantee that any pair ot RDTSC/RDTSCP on same CPU do not belong to same trace (and therefore will always update time and etc) - required for Win7 Thin
2011-09-06 14:13:39 +00:00
Stanislav Shwartsman
5a350143a5
bug fixes
2011-09-06 13:09:45 +00:00
Stanislav Shwartsman
c67338203c
small fixups, code cleanup and reorganization
2011-09-05 17:14:49 +00:00
Stanislav Shwartsman
41f9b25777
fixed avx2 gather instructions
2011-09-04 19:50:18 +00:00
Stanislav Shwartsman
c0f5919787
small optimization
2011-09-03 15:36:40 +00:00
Stanislav Shwartsman
8099fd9efd
implemented alternative access to CR8: AMD feature. Lock CR0 -> CR8
2011-09-03 15:22:56 +00:00
Stanislav Shwartsman
cf56ffb6e0
BSF/BSR should stay, only F3 prefix change opcode
2011-08-31 21:13:50 +00:00
Stanislav Shwartsman
9d18af1207
fixed compilation for AVX OFF
2011-08-31 20:52:53 +00:00
Stanislav Shwartsman
1f5e036695
lzcnt/tzcnt bmi instructions implemented
2011-08-31 20:43:47 +00:00
Stanislav Shwartsman
d2f7351be2
cpu.h cleanup + update msdev workspaces cpudb projects
2011-08-30 22:22:07 +00:00
Stanislav Shwartsman
dfd769a102
- Fixed compilation issue with cpu-level=5
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- SYSCALL/SYSRET: SYSCALL/SYSRET instructions are not supported in legacy mode for Intel processors
- CPUID: CPUID.0x80000001.EDX[11] SYSCALL/SYSRET support should not be reported outside long64 mode if legacy mode SYSCALL/SYSRET is not supported
- Added new CPUDB entry - AMD K6-2 3D proc3essor (Chomper)
2011-08-30 22:00:27 +00:00
Stanislav Shwartsman
fb9da23f9b
syscall/sysret are not supported outside long64 mode in Intel CPUs
2011-08-30 21:32:40 +00:00
Stanislav Shwartsman
9693bacacb
syscall/sysret in legacy mode is supported in k6-2. preparing code to it ...
2011-08-30 20:41:00 +00:00
Stanislav Shwartsman
0f73ff39df
bug fix
2011-08-30 19:16:08 +00:00
Stanislav Shwartsman
c30275016e
avx2 added broadcast from register
2011-08-29 21:00:25 +00:00
Stanislav Shwartsman
6bdfbeeffa
fixed for gather VSIB calculation
2011-08-28 20:14:53 +00:00
Stanislav Shwartsman
239c5a449d
added 'locked' information to bxInstruction_c for instrumentation and other future use
2011-08-27 20:09:18 +00:00
Stanislav Shwartsman
44241a1e56
- Added support for AVX and AVX2 instructions emulation, to enable configure
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with --enable-avx option. When compiled in, AVX still has to be enabled
using .bochsrc CPUID option. AVX2 FMA instructions still not implemented.
- Added support for Bit Manipulation Instructions (BMI) emulation. The BMI
instructions support can be enabled using .bochsrc CPUID option.
2011-08-27 13:47:16 +00:00
Stanislav Shwartsman
d841e82d87
MOVBE instruction exists only in memory form
2011-08-25 21:20:50 +00:00
Stanislav Shwartsman
b3898f4bec
small optimization for PALIGNR instruction
2011-08-25 19:29:33 +00:00
Stanislav Shwartsman
5dde2dc744
fixed typo
2011-08-23 21:56:35 +00:00
Stanislav Shwartsman
fa930961c2
small optimization
2011-08-23 21:25:34 +00:00
Stanislav Shwartsman
4fae848888
just rename variable
2011-08-23 20:27:52 +00:00
Stanislav Shwartsman
002e7a3818
MSR_TSC_AUX is not available without RDTSCP
2011-08-21 19:09:35 +00:00
Stanislav Shwartsman
371dc200fc
Remove the 'trace' debug feature fro the main stream (which now runs with handlers chaining) and this way reduce each handler size.
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Another 3% speedup on WinXP boot on top of handlers chaining + reduction of Bochs binary size by 45K.
2011-08-21 17:04:21 +00:00
Stanislav Shwartsman
a5e187189a
set max trace length back to 32
2011-08-21 16:44:02 +00:00
Stanislav Shwartsman
1e2e3c8b0e
forgot to merge file
2011-08-21 14:38:33 +00:00
Stanislav Shwartsman
13feb0772a
- 10% emulation speedup with handlers chaining optimization implemented. The
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feature is enabled by default when configure with --enable-all-optimizations
option, to disable handlers chaining speedups configure with
--disable-handlers-chaining
2011-08-21 14:31:08 +00:00
Stanislav Shwartsman
dd79431702
rename AVX handlers - match their real operands
2011-08-20 15:10:18 +00:00
Volker Ruppert
bfdbf589a0
- removed duplicate 'clean' for cpu/cpudb
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- added missing 'dist-clean' for cpu/cpudb
2011-08-19 06:31:51 +00:00
Stanislav Shwartsman
542af0dcc1
forgot to add a file
2011-08-18 19:02:16 +00:00
Stanislav Shwartsman
b8b63ac6ea
compile CPUDB to separate library
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reduce compile-time dependencies
2011-08-18 18:55:22 +00:00