Commit Graph

38 Commits

Author SHA1 Message Date
Stanislav Shwartsman
33168085ee gcc4 warning fix 2009-11-29 21:00:07 +00:00
Stanislav Shwartsman
7254ea36a1 copyright fixes + small optimization 2009-10-14 20:45:29 +00:00
Stanislav Shwartsman
c6f01e9723 x87 fix 2009-06-05 12:24:20 +00:00
Stanislav Shwartsman
73cc6a485d cleanup code 2009-05-28 19:25:33 +00:00
Stanislav Shwartsman
8f98f06684 x87 fix 2009-05-21 14:33:06 +00:00
Stanislav Shwartsman
cc60f4ab71 x87 fix 2009-05-07 16:27:18 +00:00
Stanislav Shwartsman
89f057ae7b x87 fix 2009-04-27 14:00:55 +00:00
Stanislav Shwartsman
08de514d9c code cleanup for future optimization 2009-03-10 21:43:11 +00:00
Stanislav Shwartsman
77974ab952 - removed wrong character from FSF address (converted invisible and useless
2-byte character)
2009-02-08 17:29:34 +00:00
Stanislav Shwartsman
9929e6ed78 - updated FSF address 2009-01-16 18:18:59 +00:00
Stanislav Shwartsman
8db3129cba - Fixed masked x87 stack underflow responce for FLD_STi instruction 2008-09-03 20:13:52 +00:00
Stanislav Shwartsman
dbb6c1c5ae i- Partially fixed x87 Underflow/Overflow (#P) unmasked responce 2008-09-02 19:46:30 +00:00
Stanislav Shwartsman
709d74728d Call #UD exception directly instead of UndefinedOpcode function - for future use 2008-07-13 15:35:10 +00:00
Stanislav Shwartsman
5abee4819e Indent and style changes 2008-07-13 11:22:55 +00:00
Stanislav Shwartsman
92568f7525 Faster 32-bit emulation wwith 64-bit enabled mode.
~10% speedup byu optimization of 32-bit mem access
2008-06-12 19:14:40 +00:00
Stanislav Shwartsman
307d75f632 Optimizations in FPU tag word handling - compress FPU tag word internally and expose only when calling for tag word read operations (only 4 instructions) 2008-05-10 13:34:01 +00:00
Stanislav Shwartsman
15e772964d Fixes with C1 bit clear/set 2008-05-10 09:17:24 +00:00
Stanislav Shwartsman
46f93681e7 Fixed FBSTP instruction signed zero corner case, indent changes 2008-05-04 21:22:42 +00:00
Stanislav Shwartsman
f17928ead0 Remove debug prints 2008-04-26 19:56:48 +00:00
Stanislav Shwartsman
ee88a125e7 for FPU instruction which load data from memory we should access memory first and only then check if it FPU stack overflow
memory access might fault before
2008-04-26 19:38:53 +00:00
Stanislav Shwartsman
0609d7e7ce Handle undocumented FPU opcodes 2008-04-21 14:17:48 +00:00
Stanislav Shwartsman
3f5263a142 Compilation fixes that allow to disable FPU by just setting BX_SUPPORT_FPU=0 2008-04-04 21:05:37 +00:00
Stanislav Shwartsman
167c7075fb Use fastcall gcc attribute for all cpu execution functions - this pure "compiler helper" optimization brings additional 2% speedup to Bochs code 2008-03-22 21:29:41 +00:00
Stanislav Shwartsman
eebd96e2d7 another whitespace cleanup by Sebastien 2008-02-05 22:33:35 +00:00
Stanislav Shwartsman
917a040cc4 Fixed more VCPP2008 warnings 2007-12-26 18:39:15 +00:00
Stanislav Shwartsman
5d4e32b8da Avoid pointer params for every read_virtual_* except 16-byte SSE and 10-byte x87 reads 2007-12-20 20:58:38 +00:00
Stanislav Shwartsman
b516589e4e Changes in write_virtual_* and pop_* functions -> avoid moving parameteres by pointer 2007-12-20 18:29:42 +00:00
Stanislav Shwartsman
26f08fdb2c Change my e-mail to #SF one 2007-03-23 21:27:13 +00:00
Stanislav Shwartsman
f8c3968d42 Changes list made after CVS service crash:
- Fixed critical bug in CPU code added with one of the prev commits
  - Disasm support for SSE4
  - Rename PNI->SSE3 everywhere in the code
  - Correctly decode, disassemble and execute 'XCHG R8, rAX' x86-64 instruction
  - Correctly decode, disassemble and execute multi-byte NOP 0F F1 opcode
  - Fixed ENTER and LEAVE instructions in x86-64 mode
  - Added ability to turn ON instruction trace, only GUI support is missed.
    Instruction trace could be enabled if Bochs was compiled with disasm
  - More changes Bit32u -> bx_phy_address
  - Complete preliminary implementation of SMM in Bochs, SMI is still PANICs but if you press 'continue' everything should work OK
  - Small code cleanup
  - Update CHANGES and user docs
2006-04-05 17:31:35 +00:00
Stanislav Shwartsman
7b6c2587a9 Now devices could be compiled separatelly from CPU
Averything that required cpu.h include now has it explicitly and there are a lot of files not dependant by CPU at all which will compile a lot faster now ...
2006-03-06 22:03:16 +00:00
Stanislav Shwartsman
7cfa31492c Removed --enable-pni configure option, to compile with PNI use
--enable-sse=3 instead (Stanislav Shwartsman)
2006-02-20 19:28:57 +00:00
Stanislav Shwartsman
d10731f162 Update my e-mail in source files
Update committed SF patches in changes
2005-05-12 18:07:48 +00:00
Stanislav Shwartsman
e01789b276 Add CVS header for FPU files 2005-03-20 21:19:38 +00:00
Stanislav Shwartsman
acd1d8f14f Merged patch
[1104695] msvc6 compatibility update (Royce Mitchell III)
2005-01-19 18:21:40 +00:00
Stanislav Shwartsman
f9bd2b74be 1. Fixed bug in FSUB instruction
2. Fixed bug

[ 989478 ] I-Cache and undefined Instruktions

The L4 microkernel uses an undefined instruction to
trap for a special requests into the kernel (LOCK NOP).
The handler fixes this up and gives the user a special
code page with syscall stubs. If you're not using the
I-Cache optimization everthing works find on bochs. But
if you enable the I-Cache (--enable-icache), then the
undefined opcode exception is thrown only once for ever
virtual address it occurs. See the demodisk of the
L4KA::pistachio
(http://www.l4ka.org/projects/pistachio/download.php).
In this case the pingpong benchmark of this demo is of
interest. Everything runs fine until the program tries
to spawn a new task for its measurements. This new task
shares the code of the creating program. But the new
task stops executing at the undefined instruction
explained above and no exception is thrown.
2004-07-29 20:15:19 +00:00
Stanislav Shwartsman
5c5b556f24 Merge softfloat-fpu-implementation_ver4_branch branch 2004-06-18 14:11:11 +00:00
Stanislav Shwartsman
a8b57836a2 all these files should be in branch only for now 2004-04-09 12:52:49 +00:00
Stanislav Shwartsman
04124133c0 freeze softfloat-fpu-ver3 branhc and open it for free testing
I will continue the development in new softfloat-fpu-ver4 branch
Current version already implements ALL FPU instructions except
   FSIN, FCOS, FSINCOS, FPTAN, FPATAN, FYL2XP1, F2XM1, FYL2X
I think it solved all currently reported bugs and feature requests
related to FPU code.
Please write your own test programms and test the implemntation in all ways you can.
Thanks,
Stanislav
2004-04-09 12:29:50 +00:00