Bochs

Commit Graph

Author	SHA1	Message	Date
instinc	3bd36d7220	added the trace-reg-on and trace-reg-off commands	2001-11-28 18:40:02 +00:00
Bryce Denney	a07d62fd24	- add "info ne2k" command to the debugger, which prints all the registers of the NE2000 model.	2001-09-29 19:16:34 +00:00
Bryce Denney	fd7e7ee86c	- added debugger command "info fpu" which prints all FPU registers in an output format similar to gdb (when you do info all-registers). Also, if you do "info all" you get the CPU registers and the FPU registers. - added bx_cpu_c method called fpu_print_regs, which is implemented in wmFPUemu_glue.cc	2001-09-15 06:55:14 +00:00
Bryce Denney	e61d00351f	- merged BRANCH-smp-bochs into main branch. For details see comments in BRANCH-smp-bochs revisions. - The general task was to make multiple CPU's which communicate through their APICs. So instead of BX_CPU and BX_MEM, we now have BX_CPU(x) and BX_MEM(y). For an SMP simulation you have several processors in a shared memory space, so there might be processors BX_CPU(0..3) but only one memory space BX_MEM(0). For cosimulation, you could have BX_CPU(0) with BX_MEM(0), then BX_CPU(1) with BX_MEM(1). WARNING: Cosimulation is almost certainly broken by the SMP changes. - to simulate multiple CPUs, you have to give each CPU time to execute in turn. This is currently implemented using debugger guards. The cpu loop steps one CPU for a few instructions, then steps the next CPU for a few instructions, etc. - there is some limited support in the debugger for two CPUs, for example printing information from each CPU when single stepping.	2001-05-23 08:16:07 +00:00
cvs	beff63eb32	- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com	2001-04-10 01:04:59 +00:00

5 Commits