Stanislav Shwartsman
|
c6050a99d1
|
implemented AVX encoded VNNI instructions published in recent SDM - not tested yet
|
2020-10-03 09:23:28 +00:00 |
|
Stanislav Shwartsman
|
81edc636d4
|
remove duplicate opcodes from decoder definitions
|
2020-03-28 14:36:27 +00:00 |
|
Stanislav Shwartsman
|
a030d03935
|
fixed bug in instruction decoding - regression before release
|
2019-11-20 20:18:22 +00:00 |
|
Stanislav Shwartsman
|
83846cc821
|
fixed bug in instruction decoding - regression before release
|
2019-11-20 20:11:00 +00:00 |
|
Stanislav Shwartsman
|
82b6f7cb6c
|
fixed bug in instruction decoding - regression before release
|
2019-11-20 19:58:51 +00:00 |
|
Stanislav Shwartsman
|
4f625b23e0
|
enable yet another Bochs new decoder. It is a bit slower than old one but it is much more extendable so adding new opcode won't be nightmare anymore
|
2019-02-16 15:23:24 +00:00 |
|
Stanislav Shwartsman
|
61dcc4ace7
|
remove unreferenced decode table
|
2019-01-29 13:44:39 +00:00 |
|
Stanislav Shwartsman
|
180386cd74
|
VMOVSS/VMOVSD are VEX.VL ignore form and not VEX.L0
|
2017-11-11 11:58:07 +00:00 |
|
Stanislav Shwartsman
|
8261a91ce9
|
implemented GFNI instructions
|
2017-10-21 19:57:12 +00:00 |
|
Stanislav Shwartsman
|
15ba88c195
|
implemented VAES/VPCLMULDQ instructions - VEX/EVEX extensions of AES/PCLMULQDQ
|
2017-10-19 19:12:55 +00:00 |
|
Stanislav Shwartsman
|
10eb193e01
|
step 1 of rewrite Bochs decoder: legacy decoder tables done. TODO: avx/evex decoder tables, merge decoder and disasm together
|
2017-01-10 20:15:17 +00:00 |
|
Stanislav Shwartsman
|
7a34f00f99
|
extracted fetchdecode into separated folder under cpu and also out of BX_CPU_C class into stand-alone module. Next step: wrap it up nicely and define clear interace to CPU model to minimize dependencies. Ideally I need fetchdecode to not include CPU at all
|
2016-06-12 21:23:48 +00:00 |
|