3 Commits

Author	SHA1	Message	Date
Stanislav Shwartsman	a06fba41ab	commit new added files	2014-07-18 11:16:22 +00:00
Stanislav Shwartsman	02e19de346	Added shape of implementation for last missing VSCALEF* AVX-512 instructons. ... The softfloat implementation is still missing (only corner cases are supported). Extend softfloat floatNN_class methods to distinguish between SNaN and QNaN.	2014-03-09 21:42:11 +00:00
Stanislav Shwartsman	01af7f5346	Implemented VRSQRT14 AVX-512 instructions & optimized legacy SSE RSQRTSS/PS instructions handling ... // // The table lookup was reverse-engineered from VRSQRT14SS instruction implementation available // in the Intel Software Development Emulator rev6.20 (released February 13, 2014) // http://software.intel.com/en-us/articles/intel-software-development-emulator/ // // TODO: find better way to emulate these instructions, I am sure the HW doesn't have 64K entry lookup tables Now only missed AVX-512 opcodes now are: 512.66.0F38.W0 2C VSCALEFPS 512.66.0F38.W1 2C VSCALEFPD NDS.LIG.66.0F38.W0 2D VSCALESS NDS.LIG.66.0F38.W1 2D VSCALESD 512.66.0F3A.W0 08 VRNDSCALEPS 512.66.0F3A.W1 09 VRNDSCALEPD NDS.LIG.66.0F3A.W1 0A VRNDSCALESS NDS.LIG.66.0F3A.W1 0B VRNDSCALESD	2014-02-25 18:57:49 +00:00