in BRANCH-smp-bochs revisions.
- The general task was to make multiple CPU's which communicate
through their APICs. So instead of BX_CPU and BX_MEM, we now have
BX_CPU(x) and BX_MEM(y). For an SMP simulation you have several
processors in a shared memory space, so there might be processors
BX_CPU(0..3) but only one memory space BX_MEM(0). For cosimulation,
you could have BX_CPU(0) with BX_MEM(0), then BX_CPU(1) with
BX_MEM(1). WARNING: Cosimulation is almost certainly broken by the
SMP changes.
- to simulate multiple CPUs, you have to give each CPU time to execute
in turn. This is currently implemented using debugger guards. The
cpu loop steps one CPU for a few instructions, then steps the
next CPU for a few instructions, etc.
- there is some limited support in the debugger for two CPUs, for
example printing information from each CPU when single stepping.
to plex86 on 5/14/2001 and said that it was okay:
> Yes, thanks to MandrakeSoft, the Elpin VGA BIOS 2.40 was licensed
> for use in _both_ plex86 and bochs. So you can distribute 2.40.
>
> Replace the text in 'bios/VGABIOS-elpin-LICENSE', with the
> same file from the plex86 CVS tree. Substitute bochs wherever
> plex86 occurs.
1 or 2 hard disks.
- int13: check how many disks first, and only return an error if DL exceeds
the number of disks (ignoring bit 7 of course)
- added drive number arg to get_hd_geometry, so that get_hd_geometry can
retrieve the numbers corresponding to hard drive 0 or 1
- hard_drive_post will now set up the EBDA area for drive 0 if it exists,
then for drive 1 if it exists.
