Stanislav Shwartsman
1089e470e9
remove bochs-memory.h from bochs.h and include it only where required
2021-01-30 20:13:34 +00:00
Stanislav Shwartsman
1bf18b8aae
! CPUID: Added TigerLake CPU definition (features CET and CLWB support)
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- CPU code refactor, remove uses of bx_bool datatype and use C++ classic bool instead.
This enable better compiler optimizations and reduce binary size
2021-01-30 08:35:35 +00:00
Stanislav Shwartsman
44b3ebeca2
remove BX_TRUE/BX_FALSE macros, use stdc++ true/false instead
2019-12-09 16:44:36 +00:00
Stanislav Shwartsman
f6af0443bb
small optimization and elimination of several defines from cpu.h - replace by inline functions and const variables
2015-07-13 20:24:14 +00:00
Stanislav Shwartsman
6c6b670551
fixed typo causing compilation error
2015-02-22 21:33:26 +00:00
Stanislav Shwartsman
0917d12e8b
memory type report for physical accesses and RMW acccesses. todo: consider also pat
2015-02-22 21:26:26 +00:00
Stanislav Shwartsman
7a3e340e6d
implement memory type calculation by mtrr. todo: memory type from page tables
2015-02-20 21:50:59 +00:00
Stanislav Shwartsman
e16c6eb30c
preparations and interface definition for memory type support
2015-02-19 20:23:08 +00:00
Stanislav Shwartsman
7bace61c12
fixed compilation issue
2012-11-05 06:41:10 +00:00
Stanislav Shwartsman
744001e35e
Implemented VMX APIC Registers Virtualization and VMX Virtual Interrupt Delivery emulation
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Bugfix: VMX: VmEntry should do TPR Virtualization (TPR Shadow + APIC Access Virtualization case is affected) and even could possibly cause TPR Threshold VMEXIT
2012-10-26 18:43:53 +00:00
Stanislav Shwartsman
7e1b67f91e
fixed bugs in vmx code
2012-10-25 16:08:28 +00:00
Stanislav Shwartsman
e7a2c9892c
re-implement VTPF write using event handling interface as trap event (in preparation to more apic virtualization features)
2012-10-07 09:16:13 +00:00
Stanislav Shwartsman
2f3c7ff8e4
implemented SMAP (Supervisor Mode Access Protection) from [Intel Architecture Instruction Set Extensions Programming Reference] rev14
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fixed enabling of ADX extensions in generic CPUID when enabled through .bochsrc
Small code cleanups on the way to implementation of APIC Registers Virtualization features disclosed in recent Intel SDM rev043
2012-09-10 15:22:26 +00:00
Stanislav Shwartsman
f1fd44b2cf
preparations for apic regs virtualization feature described in SDM rev044
2012-09-06 15:21:08 +00:00
