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984 Commits

Author SHA1 Message Date
Stanislav Shwartsman
e85a90a720 Remove cpu.h -> devices.cc dependancy, kill_bochs_request moved from CPU to bx_pc_system 
Small Icache simplification and speedup
 2006-03-14 18:11:22 +00:00
Volker Ruppert
9699eaeca4 - added SMP support in save/restore parameter subtree 
- TODO: implement tab window control for SMP CPUs in wx "show cpu" dialog
 2006-03-09 20:16:17 +00:00
Stanislav Shwartsman
d74f1b9a43 Fixed bug in ENTER instruction in long mode 2006-03-08 18:21:16 +00:00
Volker Ruppert
5597fc9cf3 - fixed wx "Show CPU" dialog to make it work with the new parameter handling 
- fixed CPU register names
- removed old parameter handling (bx_id, BXP_* symbols, param_registry, etc.)
 2006-03-08 18:10:41 +00:00
Volker Ruppert
575a17e50f - converted cpu state parameters to param-tree style 
- removed old-style parameter init methods
- NOTE: the wx CPU registers dialog (debugger) currently reports nothing
- TODO: fix wx CPU registers dialog, remove remaining bx_id related stuff
 2006-03-07 20:32:07 +00:00
Stanislav Shwartsman
da0b2ac377 Update dependencies for iodev and root project folders. 
Fixed compilation errors for 386 case
Added file header for slowdown_timer.h
 2006-03-06 22:32:03 +00:00
Stanislav Shwartsman
7b6c2587a9 Now devices could be compiled separatelly from CPU 
Averything that required cpu.h include now has it explicitly and there are a lot of files not dependant by CPU at all which will compile a lot faster now ...
 2006-03-06 22:03:16 +00:00
Stanislav Shwartsman
fc0894bbe1 Enable A20 after system reset 2006-03-04 16:58:10 +00:00
Stanislav Shwartsman
93898e11b2 Missed } 2006-03-04 09:24:31 +00:00
Stanislav Shwartsman
324d75e749 Fix another broking change 2006-03-04 09:22:55 +00:00
Stanislav Shwartsman
e297df457a Roll back the try to move Local APIC memory access to CPU. 
It was fast and fine but had serious correctness problems with RMW apic access
 2006-03-02 23:16:13 +00:00
Stanislav Shwartsman
6d513ed6f2 Fix indent corruption 2006-03-02 20:17:54 +00:00
Stanislav Shwartsman
6c392e7f3f optimize apic code 2006-03-02 20:09:21 +00:00
Stanislav Shwartsman
7cc8bc0836 Clean and optimize 2006-03-02 17:39:10 +00:00
Stanislav Shwartsman
5fad793989 move local apic handling to the access_linear function for the memory class. 
speedup the whole simulation by 2% !
 2006-03-01 22:32:24 +00:00
Stanislav Shwartsman
9b3be40d88 Improve OS/2 hack - save full segment (including hidden part) and not only selector value 2006-02-28 20:29:03 +00:00
Stanislav Shwartsman
a527b2cfca first smm - implement cpu state when switching to SMM 
smm coming soon
fixed code duplication in init.cc
 2006-02-28 19:50:08 +00:00
Stanislav Shwartsman
55ceecf79b Small optimization in icache page-write-stamp 2006-02-28 17:47:33 +00:00
Stanislav Shwartsman
24077c071b Fixed exception generated when accessing memory w/o right permissions 2006-02-26 21:44:03 +00:00
Stanislav Shwartsman
83bb20b6f9 Diagnostic message for possible bug in exception.cc 2006-02-24 09:49:03 +00:00
Stanislav Shwartsman
79306b851c Separate fetch/decode instruction block to stand-alone method. 
The method could be reused when building instruction trace for DT
 2006-02-23 18:23:31 +00:00
Stanislav Shwartsman
0150904e9d Improve debug messages and optimize 2006-02-22 20:58:16 +00:00
Stanislav Shwartsman
8ba6c1178a Fixed PANIC in CMPxx SSE instructions 2006-02-22 20:20:21 +00:00
Stanislav Shwartsman
7cfa31492c Removed --enable-pni configure option, to compile with PNI use 
--enable-sse=3 instead (Stanislav Shwartsman)
 2006-02-20 19:28:57 +00:00
Volker Ruppert
a4bc4cc9e0 - fixed cpu parameter handling in SMP mode 2006-02-18 17:28:18 +00:00
Volker Ruppert
2a6261fba7 - cpu options rewritten to a parameter tree 
- boolean parameter type now supports new parameter handling
- new parameter object constructors now supports label initialization
- bx_list_c constructor now supports title initialization
- textconfig: initial support for new parameter handling
- wx: missing CPU config dialog added
- wx: ParamDialog now handles disabled parameters correctly
- removed unnecessary spaces from function calls
 2006-02-18 16:53:18 +00:00
Stanislav Shwartsman
5c58b22f44 Fixed opcode names according to Intel docs 
Fixed bug found during disasm validation
 2006-02-17 13:34:31 +00:00
Stanislav Shwartsman
b966703504 print CPU mode correctly again 2006-02-14 20:14:18 +00:00
Stanislav Shwartsman
203a9caf31 SMM mode could leave together with pmode or any other (according to amd docs) 
so we need separate bx_bool indicator in_smm instead
 2006-02-14 20:03:14 +00:00
Stanislav Shwartsman
024ce249bf Define SMM mode for future implementation. 
I would like all next commits be aware of SMM mode.
It can't be implemented right now (too many questions w/o answers) but it will be done till next major release definitelly.
 2006-02-14 19:00:08 +00:00
Stanislav Shwartsman
2646484dc1 Fix 'show' command in Boch debugger. 
Fully supported show-interrupts, show-mode and show-call options
Enable toggling of show options (bug report from SF)
 2006-02-12 20:21:36 +00:00
Stanislav Shwartsman
0bf03f370d Support for DC and HT in SMP configurations 
Extended format of CPU::COUNT .bochsrc option to define number of core/threads
 2006-02-11 15:28:43 +00:00
Stanislav Shwartsman
9b451f43e2 Save/restore RIP/RSP only on FAULT type exceptions, not on traps 2006-02-11 09:08:02 +00:00
Stanislav Shwartsman
5a65e1065e Decoding functionality for Bochs disassembler. 
Fixed 'step over' debugger command using bx_dbg_read_linear method.
Small debugger fix in cpu.cc
 2006-02-05 19:48:29 +00:00
Stanislav Shwartsman
9a15f59e05 Fixed bug in SYSRET legacy mode 2006-02-02 17:55:48 +00:00
Stanislav Shwartsman
6ca296de8b Move --enable-reset-on-triple-fault option to runtime CPU::reste_on_triple-fault option in .bocshrc 
Cleanup and optimize parser for debugger
 2006-02-01 18:12:08 +00:00
Stanislav Shwartsman
1d4fa8b327 Available back ability to use eip register as source in 'set reg = <expr>' cmd. 
Setting the eip register still not available (deliberatelly).
I don't want to enable it util I find some easy interface to do it.
I don't want to allow setting of part of RIP register using 'set eip=<expr>' and leave the upper part unchanged ....

Remove unused test registres from debugger
Fix compilation error in cpu.h
Change trace-on/trace-off commands. Make one 'trace' command with usage of 'trace on/trace off'
 2006-01-31 19:45:34 +00:00
Stanislav Shwartsman
24c27deae8 Recognize XF exception (0x13) when SSE is enabled 2006-01-31 17:41:08 +00:00
Stanislav Shwartsman
067f23e3da Fix set 'ah,bh,ch,dh' registers from debugger 
Enable disasm by default - in adds some useful information to debug messages in log file
Remove defines for 8bit registers from cpu.h, the x86 arch defines not match defines used by set_reg and get_reg methods.
 2006-01-27 19:50:00 +00:00
Stanislav Shwartsman
37eb82c69c Totally remove the cosimulation code from Bochs. 
The Bochs anyway even doesn't compile if cosimulation configured enabled.
But in the same time the cosimulation code only disturbs to the future development of Bochs debugger, for example adding x86-64 functionality ...
For those of you who still may want to see the cosimulation code inside I put it in patch and upload it Bochs CVS patches folder. Read comments for the patch ! ----------------------------------------------------------------------
 2006-01-25 22:20:00 +00:00
Stanislav Shwartsman
83b4f7ba05 1. remove the ability of using regnames as symbols ! 
'set $eax = <value>' is stupid when you could do expr like 'set eax = ebx + 4'

2. cleanup and optimize Bochs debugger parsing, fixed several memory leaks
 2006-01-25 18:13:44 +00:00
Stanislav Shwartsman
d257f548b9 1. implemented 'set register <name>=<expr>' command, old style 'registers <name>=<exp> command' removed, now 'r|reg|regs|registers' command shows CPU registers contents (same as 'info cpu') 
2. new command 'u|disasm|disassemble mode-switch' - switch between Intel and AT&T disasm syntax

3. new command 'u|disasm|disassemble size=n' should be used instead of old 'set $disassembler_size=n'

4. 'h' is a new alias for 'help' command
 2006-01-24 21:37:37 +00:00
Stanislav Shwartsman
f9cad8d272 Remove debug printf 2006-01-24 19:07:45 +00:00
Stanislav Shwartsman
18afa9fd2d This is cumulative patch for bochs debugger, it is only very first step towards working debugger supporting all new simulator functionalitieS. 
- move crc.cc from debugger to bochs folder and make it projct-wide and not local for debugger
 - added new 'info sse' command for debugger
 - extend 'modebp' command to break on any mode change
 - remove unimplemened 'info program' function, it is always printed fixed text
 - move debugger help to parser, cleanup and simplify it
 2006-01-24 19:03:55 +00:00
Stanislav Shwartsman
21352e50a9 Fix some bugs in debugger parser, cleanup 
Add some debugger functionality
 2006-01-23 21:44:44 +00:00
Stanislav Shwartsman
5a5854c684 Missed ; 2006-01-22 18:18:19 +00:00
Stanislav Shwartsman
de9be40256 Fixed ROL/ROR flags anomaly (h.johansson) 2006-01-22 18:17:27 +00:00
Stanislav Shwartsman
9df8079206 Write to MSR_TSC implemented (patch by Bryce) 2006-01-21 12:06:03 +00:00
Stanislav Shwartsman
08c15c67c0 Don't know how much it helps ... 
First step to make bx debugger supporting x86-64. guard_found object fields conerted to bx_address for x86-64 support.
 2006-01-19 18:32:39 +00:00
Stanislav Shwartsman
90f899fd16 Fix bug in PMULUDQ SSE instruction 2006-01-18 18:39:17 +00:00
Stanislav Shwartsman
2c8f6f7720 Merged patch: determine number of processors to emulate through .bochsrc 2006-01-18 18:35:38 +00:00
Stanislav Shwartsman
c8cd1f805a Enabled LAHF/SAHF for x86-64 mode 2006-01-17 19:50:42 +00:00
Stanislav Shwartsman
c92aba3776 Using back tracking in CVS I found the reason why CVS sources not compiled with configure --enable-debugger configuration (reported by Brendan). 
Again it is andom change which cause to debugger not to compile ;(
This is definitelly GCC bug !
 2006-01-17 07:58:11 +00:00
Stanislav Shwartsman
7bf51e48db Print FS_MSR_BASE and GS_MSR_BASE to debug registers dump (requested in bug report [ 1406387 ] JMP instruction should display absolute address) 
Fixed fetch mode mask initialization (bug report 1400027  Boundary instruction cache error for uninitialized memory)
For safety only - everytime when changing CS register update fetch mode mask.
Actually it need to be updated everytime when there is a chance for execute mode change or 16/32 bit mode change.
 2006-01-16 19:22:28 +00:00
Stanislav Shwartsman
76ac076d52 Print R8-R15 in registers dump 2006-01-15 18:14:16 +00:00
Stanislav Shwartsman
652ce3c0dc Fix for bug report: 
bochs-Bugs-1406383 ] Local APIC TPR is ignored due to signed/unsigned mismatch
 2006-01-15 17:38:40 +00:00
Stanislav Shwartsman
a74b63eb3d Allow writing PCE to CR4 2006-01-13 11:11:29 +00:00
Stanislav Shwartsman
d7d2de421f Remove code duplication in CPU and memory objects initialization 2006-01-11 18:22:12 +00:00
Stanislav Shwartsman
5899932f0c Merge APIC patch to the CVS. 
- Fix lowest priority interrupt delivery from I/O APIC
 - XAPIC support
 - Implemented APIC bus functionality
 - cleanup APIC code
 2006-01-10 06:13:26 +00:00
Stanislav Shwartsman
89e3472178 Fix validate_seg_regs check 2006-01-09 19:34:52 +00:00
Stanislav Shwartsman
393a653fb4 Fix typo 2006-01-05 21:40:07 +00:00
Stanislav Shwartsman
b07e698b3e Initialize CPU and APIC after the bx_pc_system object 2006-01-05 21:39:11 +00:00
Volker Ruppert
97e1f39d8f - I/O APIC signal handling rewritten ("backported" from qemu) 
- don't flood the logfile if APIC EOI has no effect
- fixed a warning in the APIC code
- TODO: fix IRQ 0 handling, implement ExtINT
 2006-01-01 11:33:06 +00:00
Stanislav Shwartsman
6ff8fccfc4 Fixed cross-segment boundary check, when instruction ends on the segment boundary it should generate GP(0) 2005-12-28 19:18:50 +00:00
Stanislav Shwartsman
9e4a3675d3 Cleanup APIC code 
Fixed APIC timer problem (too many registered timers) reported by Brendan
 2005-12-26 19:42:09 +00:00
Stanislav Shwartsman
279c67ae37 Fix debug message 2005-12-23 14:24:47 +00:00
Stanislav Shwartsman
dfc633ef0a New debug function in cpu 2005-12-19 17:58:08 +00:00
Stanislav Shwartsman
cd2a8da34c Add more debugging/instrumentation functionality 2005-12-14 20:05:40 +00:00
Stanislav Shwartsman
8627bc1596 Fixed bug from prev commit 2005-12-13 20:42:22 +00:00
Alexander Krisak
99fae60a0e Small icache optimization 2005-12-13 14:18:34 +00:00
Stanislav Shwartsman
5f339a5fd8 Small debug fixes 2005-12-12 22:01:22 +00:00
Stanislav Shwartsman
70cc5a7fb0 Fix incorrect commit 2005-12-12 19:54:48 +00:00
Stanislav Shwartsman
f863d1e902 Generate #GP exception instead of #TS when TSS selector points to bad TSS 2005-12-12 19:44:06 +00:00
Stanislav Shwartsman
1f2cde53f0 Fix arbitration of local apic when issuing lowest priority interrupt or arbitrating between different local apics. APR (arbitration priority register) should be used for lowest priority interrupt delivery and available to user software and ARB_ID should be software transparent APIC internal 2005-12-11 21:58:53 +00:00
Stanislav Shwartsman
8b8d4900ed Implement read/write of ESR register 2005-12-11 20:01:54 +00:00
Stanislav Shwartsman
faff702f44 GP(0) on cross segment boundaryu instruction 2005-12-09 21:21:29 +00:00
Stanislav Shwartsman
abe9791fe6 Fix typo 2005-11-28 22:42:29 +00:00
Stanislav Shwartsman
1f2913477e Fix typo ... 2005-11-28 22:35:43 +00:00
Stanislav Shwartsman
82ccada927 Merged and committed #SF patch from wmrieker 
[ 857235 ] task priority and other APIC bugs, etc
 2005-11-28 22:19:01 +00:00
Stanislav Shwartsman
fe02ecab65 Do not flood log with WBINVD/INVD messages 2005-11-27 18:36:19 +00:00
Stanislav Shwartsman
8c91790680 Redefine registers accessors in cpu.h 
Change BxSupportPAE and BxSupportGlobalPages macros to Bochs style names
Set bx_cpu_id in BX_CPU_C constructor (safe way)
Backup cpu-level check for paging features at compile time (already checked in configure)
Some warnings and indent fixes
speed up get_segment_base method for x86-64 case
 2005-11-26 21:36:51 +00:00
Stanislav Shwartsman
49ed4e95a1 Fixed bug in set_id 2005-11-22 17:41:07 +00:00
Stanislav Shwartsman
e003620a30 In debug snapshot print flags in more ellegant way - use capital letters when flag is UP and lower letters when it DOWN 2005-11-21 22:29:02 +00:00
Stanislav Shwartsman
82dcab043f Update TODO 2005-11-21 21:15:35 +00:00
Stanislav Shwartsman
9314752bb1 Rewritten task_switch mechnism according to AMD docs 
This should fix the #SF bug report
736279  Jump to Task
 2005-11-21 21:10:59 +00:00
Stanislav Shwartsman
8247b94245 Another fix for INIT/RESET state 2005-11-19 19:38:45 +00:00
Stanislav Shwartsman
ec81586bb8 Init/Reset values for LDTR/TR 2005-11-19 18:27:15 +00:00
Stanislav Shwartsman
8d9b5b7134 Fixed compilation error when PAE diasbled and BX_DEBUGGER enabled 
CVS patch by shirokuma #SF 1359011
 2005-11-17 17:52:00 +00:00
Stanislav Shwartsman
3250edb8c5 Update instrumentation 2005-11-14 18:25:41 +00:00
Stanislav Shwartsman
7b7ac565f9 Getting ready for long mode disasm support, patch will posted soon 2005-11-14 18:09:22 +00:00
Stanislav Shwartsman
e2a5b9c338 MOV to/from test register are UD in x86-64 2005-11-11 22:02:42 +00:00
Stanislav Shwartsman
cb4ec526ab Fix comments and cleanup ... 
No functional change
 2005-11-11 21:34:57 +00:00
Stanislav Shwartsman
38a7e0abea 0f 0d (3dnow prefetch instruction) should execute as NOP when running on Intel EM64T CPU and as prefetch on AMD 2005-11-11 21:09:02 +00:00
Stanislav Shwartsman
0c6a401f30 Update CPU/TODO 2005-11-09 18:07:49 +00:00
Stanislav Shwartsman
e70aa1c403 Initialize l-biT (x86-64 mode) during reset or init 
Do not modify segment limit and access rights when changing segment in real mode
 2005-11-07 22:45:25 +00:00
Stanislav Shwartsman
5d67c7354f Fix code duplication 2005-11-05 11:39:26 +00:00
Stanislav Shwartsman
cd2a9f317d Do not PANIC when HLT with IF=0, only BX_INFO 2005-11-04 15:15:02 +00:00
Stanislav Shwartsman
ab81296e33 Update CHANGES/TODO 
Change BX_INFO to BX_DEBUG in read CR4 function
 2005-10-23 21:11:32 +00:00
Stanislav Shwartsman
732abe4b30 Move parity table from cpu.cc to lazy_flags.cc 2005-10-20 17:33:36 +00:00
Stanislav Shwartsman
64ba97210b INVD/WBINVD should flush caches and TLB 2005-10-18 18:07:52 +00:00