Stanislav Shwartsman
88a58b3781
fixed compilation with x86-64=0
2011-09-16 20:12:36 +00:00
Stanislav Shwartsman
330bf62f61
added INVPCID instruction support
2011-09-16 20:06:23 +00:00
Stanislav Shwartsman
e2f0880f1c
support more than 32-bit cpu features vector
2011-09-14 20:22:24 +00:00
Stanislav Shwartsman
3f230d115e
clean disasm opcodes.inc
2011-09-13 20:43:15 +00:00
Stanislav Shwartsman
d5fcfabb38
bugfix + update changes
2011-09-13 19:38:09 +00:00
Stanislav Shwartsman
f4dbaf1cd8
re-shuffle macros, no impact in general
2011-09-13 17:55:36 +00:00
Stanislav Shwartsman
02e1a0f23c
Merge lazy flags optimization by Darek Mihocka.
...
I measure slight but consistent speedup of ~1-3% for all guests.
Tested: Windows XP/7 boot 32/64 bit, various Linux live CD
2011-09-12 19:36:53 +00:00
Stanislav Shwartsman
274ca1a2f6
tab2space conversions
2011-09-11 17:15:21 +00:00
Stanislav Shwartsman
cb261c45d3
removed non-working code for z-unodable and z-volatile images.
...
our priority is to implement support for std disk image formats (VMDK, VDI) instead.
2011-09-11 16:27:56 +00:00
Stanislav Shwartsman
0e4eecafba
duplicate macros fix
2011-09-08 17:53:28 +00:00
Volker Ruppert
f18f875c7f
- sparse mode bugfix: initialize parent_image with NULL
2011-09-07 21:34:15 +00:00
Stanislav Shwartsman
9f1f4781b3
fixed Sandy Bridge name in err message - it is Core i7 and not Core2
2011-09-06 19:49:22 +00:00
Stanislav Shwartsman
939aee87c9
handle special case - BSF/BSR vs TZCNT/LZCNT
2011-09-06 19:18:21 +00:00
Stanislav Shwartsman
184837e0ed
fixed compilation err with no handlers chaining enabled
2011-09-06 15:41:52 +00:00
Stanislav Shwartsman
96cedbc756
continue handlers-chaining optimization: update time once per trace and not for every instruction
2011-09-06 15:35:39 +00:00
Stanislav Shwartsman
e000b61cfd
make RDTSC 'end of trace' instruction - guarantee that any pair ot RDTSC/RDTSCP on same CPU do not belong to same trace (and therefore will always update time and etc) - required for Win7 Thin
2011-09-06 14:13:39 +00:00
Stanislav Shwartsman
5a350143a5
bug fixes
2011-09-06 13:09:45 +00:00
Volker Ruppert
9483414f84
- fixed 256-color mode screen update handling. Now the dword, word and byte modes
...
are correctly handled.
- related fixes in the graphics snapshot code
2011-09-05 18:39:02 +00:00
Stanislav Shwartsman
c67338203c
small fixups, code cleanup and reorganization
2011-09-05 17:14:49 +00:00
Stanislav Shwartsman
41f9b25777
fixed avx2 gather instructions
2011-09-04 19:50:18 +00:00
Stanislav Shwartsman
c0f5919787
small optimization
2011-09-03 15:36:40 +00:00
Stanislav Shwartsman
8099fd9efd
implemented alternative access to CR8: AMD feature. Lock CR0 -> CR8
2011-09-03 15:22:56 +00:00
Stanislav Shwartsman
c85da98ce5
fixed cpu:avx option crash. fixed handlers-chaining configure option name
2011-09-01 13:59:35 +00:00
Stanislav Shwartsman
cf56ffb6e0
BSF/BSR should stay, only F3 prefix change opcode
2011-08-31 21:13:50 +00:00
Stanislav Shwartsman
9d18af1207
fixed compilation for AVX OFF
2011-08-31 20:52:53 +00:00
Stanislav Shwartsman
1f5e036695
lzcnt/tzcnt bmi instructions implemented
2011-08-31 20:43:47 +00:00
Stanislav Shwartsman
e61da281c0
update cpu-configurable doc
2011-08-31 16:33:12 +00:00
Stanislav Shwartsman
d2f7351be2
cpu.h cleanup + update msdev workspaces cpudb projects
2011-08-30 22:22:07 +00:00
Stanislav Shwartsman
d893ddf5d1
added new entry to cpudb
2011-08-30 22:02:08 +00:00
Stanislav Shwartsman
dfd769a102
- Fixed compilation issue with cpu-level=5
...
- SYSCALL/SYSRET: SYSCALL/SYSRET instructions are not supported in legacy mode for Intel processors
- CPUID: CPUID.0x80000001.EDX[11] SYSCALL/SYSRET support should not be reported outside long64 mode if legacy mode SYSCALL/SYSRET is not supported
- Added new CPUDB entry - AMD K6-2 3D proc3essor (Chomper)
2011-08-30 22:00:27 +00:00
Stanislav Shwartsman
fb9da23f9b
syscall/sysret are not supported outside long64 mode in Intel CPUs
2011-08-30 21:32:40 +00:00
Stanislav Shwartsman
9693bacacb
syscall/sysret in legacy mode is supported in k6-2. preparing code to it ...
2011-08-30 20:41:00 +00:00
Stanislav Shwartsman
0f73ff39df
bug fix
2011-08-30 19:16:08 +00:00
Stanislav Shwartsman
c30275016e
avx2 added broadcast from register
2011-08-29 21:00:25 +00:00
Stanislav Shwartsman
1328861175
typo fix
2011-08-28 21:41:54 +00:00
Stanislav Shwartsman
1dc8f56f06
disasm for AVX2 gather
2011-08-28 21:38:53 +00:00
Stanislav Shwartsman
6bdfbeeffa
fixed for gather VSIB calculation
2011-08-28 20:14:53 +00:00
Stanislav Shwartsman
239c5a449d
added 'locked' information to bxInstruction_c for instrumentation and other future use
2011-08-27 20:09:18 +00:00
Stanislav Shwartsman
acfeed8e31
update msvcpp workspace with new files
2011-08-27 18:48:11 +00:00
Stanislav Shwartsman
67cbb2dac5
fixed typo
2011-08-27 14:29:11 +00:00
Stanislav Shwartsman
e907702b6e
warn if configure avx w/o x86-64
2011-08-27 13:55:40 +00:00
Stanislav Shwartsman
44241a1e56
- Added support for AVX and AVX2 instructions emulation, to enable configure
...
with --enable-avx option. When compiled in, AVX still has to be enabled
using .bochsrc CPUID option. AVX2 FMA instructions still not implemented.
- Added support for Bit Manipulation Instructions (BMI) emulation. The BMI
instructions support can be enabled using .bochsrc CPUID option.
2011-08-27 13:47:16 +00:00
Stanislav Shwartsman
0d15044913
fixed configure script bug
2011-08-26 19:08:37 +00:00
Stanislav Shwartsman
d841e82d87
MOVBE instruction exists only in memory form
2011-08-25 21:20:50 +00:00
Stanislav Shwartsman
b3898f4bec
small optimization for PALIGNR instruction
2011-08-25 19:29:33 +00:00
Stanislav Shwartsman
e796e6a96c
disasm avx2 new instructions (no gather yet)
2011-08-24 20:55:23 +00:00
Volker Ruppert
a1b9a8e190
- enable extended "read TOC" feature for Windows versions newer than XP (>= 5.1)
...
- TODO: move win32 specific cdrom stuff to a separate file
2011-08-24 10:48:05 +00:00
Stanislav Shwartsman
5dde2dc744
fixed typo
2011-08-23 21:56:35 +00:00
Stanislav Shwartsman
fa930961c2
small optimization
2011-08-23 21:25:34 +00:00
Stanislav Shwartsman
4fae848888
just rename variable
2011-08-23 20:27:52 +00:00
