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92 Commits

Author SHA1 Message Date
Stanislav Shwartsman
7defa74261 cleaned up code duplication in CPUDB classes 2012-01-07 17:06:03 +00:00
Stanislav Shwartsman
0e17f8f195 implemented AMD APIC extensions for SVM support 2012-01-04 16:06:37 +00:00
Stanislav Shwartsman
abda3a967c added two AMD CPUs to CPUDB 2011-12-29 14:23:22 +00:00
Stanislav Shwartsman
5da69a6fb4 fixed typo - invalid CPUID leaf should go to max std leaf 2011-12-28 21:59:39 +00:00
Stanislav Shwartsman
2b854cb101 added basic (very basic) SVM CPUID into generic_cpuid module 2011-12-28 21:54:51 +00:00
Stanislav Shwartsman
7f5f917a34 more SVM implementation 2011-12-27 19:42:11 +00:00
Stanislav Shwartsman
75bda1d5cd implemented SVM emulation support for Bochs (incomplete yet) 
I am merging the code in order to start making shortcuts between VMX emulation and SVM emulation.
Of course SVM emulation is incomplete, completely untested and not expected to work.
But someone could already take a look one the code and give some suggestions.

Also looking for anybody with existing SVM kernels - as simple as possible - for testing.

Status:
 - exceptions intercept is not implemented yet
 - IO intercept is not implemented yet
 - MSR intercept is not implemented yet
 - virtual interrupts are not implemented yet
 - CPUID is not implemented yet

No advanced SVM featurez planned - I am implementing the very basic 'Pacifica' document from 2005 using QEMU code as reference.
 2011-12-25 19:35:29 +00:00
Stanislav Shwartsman
2dee4b12be added VMX .bochsrc option to ctoggle VMX ON/OFF on runtime 2011-12-21 09:11:51 +00:00
Stanislav Shwartsman
9be8552b80 - Implemented VM Functions support and EPTP-Switching VM Functions 
- Added VMEXIT conditions for INVPCID instruction

Now Bochs is fully aligned with latest pulished Intel's SDM rev040.
 2011-11-05 07:31:51 +00:00
Stanislav Shwartsman
5cc04b9955 Implemented AMDs Buldozer XOP and TBM extensions. 
XOP: few instructions are still missing, coming soon

  BX_PANIC(("VPERMILPS_VpsHpsWpsVIbR: not implemented yet"));
  BX_PANIC(("VPERMILPD_VpdHpdWpdVIbR: not implemented yet"));
  BX_PANIC(("VPMADCSSWD_VdqHdqWdqVIbR: not implemented yet"));
  BX_PANIC(("VPMADCSWD_VdqHdqWdqVIbR: not implemented yet"));
  BX_PANIC(("VFRCZPS_VpsWpsR: not implemented yet"));
  BX_PANIC(("VFRCZPD_VpdWpdR: not implemented yet"));
  BX_PANIC(("VFRCZSS_VssWssR: not implemented yet"));
  BX_PANIC(("VFRCZSD_VsdWsdR: not implemented yet"));
 2011-10-19 20:54:04 +00:00
Stanislav Shwartsman
2580d8c46d added FMA4 AMD instructions support, fixed mem access length for Intel scalar FMA instructions 2011-10-07 14:09:35 +00:00
Stanislav Shwartsman
6751af5d8e added AVX FMA extensions support. The implementation is based on QEMU patch by Peter Maydell (fixed) 2011-09-29 22:20:56 +00:00
Stanislav Shwartsman
12ad45395b enable Penryn VMX capabilities with VMX=1, VMX=2 is required for EPT and heavier stuff 2011-09-26 19:36:20 +00:00
Stanislav Shwartsman
54d1d8aa55 added new assertion to generic cpuid 2011-09-26 18:47:47 +00:00
Stanislav Shwartsman
c28c7f6a06 Supply real VMX capabilities together with the CPU MODEL .bochsrc option. 
So now the same single option will choose not only the CPUID flags but also VMX capabilities matching real HW machine.

Removed cpuid of core2_extreme_x9770 from the cpudb. I don't remember its VMX capabilities anyway.
There is another Penryn model in the cpudb - core2_penryn_t9600.
 2011-09-26 12:31:40 +00:00
Stanislav Shwartsman
62d0c8abf7 - Now you could disable x86-64 from .bochsrc so now it is possible to emulate 
32-bit CPU using Bochs binary compiled with x86-64 support.

The commit also fixes some init.cc issues with initialization of SYSCALL/SYSRET MSR in AMD hosts and also includes code reorg.
 2011-09-25 17:36:20 +00:00
Stanislav Shwartsman
d489ba3d37 generic cpuid: automatically enable lzcnt of bmi is enabled; sse4a support in cpuid 2011-09-18 18:17:34 +00:00
Stanislav Shwartsman
50207eeb90 - Added support for AMD SSE4A emulation, the instructions can be enabled 
using .bochsrc CPUID option.
 2011-09-18 16:18:22 +00:00
Stanislav Shwartsman
e2f0880f1c support more than 32-bit cpu features vector 2011-09-14 20:22:24 +00:00
Stanislav Shwartsman
44241a1e56 - Added support for AVX and AVX2 instructions emulation, to enable configure 
with --enable-avx option. When compiled in, AVX still has to be enabled
    using .bochsrc CPUID option. AVX2 FMA instructions still not implemented.

  - Added support for Bit Manipulation Instructions (BMI) emulation. The BMI
    instructions support can be enabled using .bochsrc CPUID option.
 2011-08-27 13:47:16 +00:00
Stanislav Shwartsman
367e8999d6 fixed leaf 0x7 report in cpuid 2011-08-17 21:33:55 +00:00
Stanislav Shwartsman
ed9b8478b5 undo RDTSC commit 2011-08-17 21:13:06 +00:00
Stanislav Shwartsman
165e6f0fdf separate TSC to uniq feature that can be disabled in CPU configuration 2011-08-17 20:57:44 +00:00
Stanislav Shwartsman
6606c62439 cr4 available since Pentium only 2011-08-16 16:49:04 +00:00
Stanislav Shwartsman
8962cfddde re-definition of x86-64 support, 1st step towards x86-64 enable/disable through .bochsrc 2011-08-12 18:04:56 +00:00
Stanislav Shwartsman
6344c6a719 Added P2 Klamath CPUID + some code reorg again 2011-08-11 18:06:09 +00:00
Stanislav Shwartsman
f15bc6cf75 support for NX outside of x86-64. 
required for Intel Yonah processor which is another interesting CPUID to be added
also found Via C7 CPUID, looking for the way to add it too
 2011-08-10 22:04:33 +00:00
Stanislav Shwartsman
c6c94a79da dos2unix for generic_cpuid.cc 
fixed xsave leaf CPUID (again)
added one more CPUID configuration: Intel Mobile Core 2 Duo T9600
 2011-08-08 18:20:29 +00:00
Stanislav Shwartsman
2ee0029749 extract ffxsr support to separate CPU feature 2011-08-04 19:02:49 +00:00
Stanislav Shwartsman
1068b4bd8c cleanup 2011-08-03 21:46:46 +00:00
Stanislav Shwartsman
5ffb201184 fixed CPU leaf 0xD 2011-08-03 21:23:08 +00:00
Stanislav Shwartsman
1adda7bf64 Fixed MWAIT leaf CPUID - required for Fedora15 startup 2011-08-03 20:29:24 +00:00
Stanislav Shwartsman
b9a44a9dbf added const to all cpudb methods 2011-08-01 18:10:48 +00:00
Stanislav Shwartsman
ea7d5e74ee fixed cpuid_limit_winnt mode 2011-07-31 21:02:04 +00:00
Stanislav Shwartsman
1d89709e62 Added another CPU to CPUDB: p4_willamette (one more without x86-64 support). 
Reimplemented CPUDB using pure C macros magic.
Fixed compilation errors when compiling with SMP on.
 2011-07-31 18:43:46 +00:00
Stanislav Shwartsman
6e6db04b8f Fixed compilation errors, dos2unix, added missed p3_katmai.txt 2011-07-31 14:56:45 +00:00
Stanislav Shwartsman
5e291e0860 Added Athlon64 Clawhammer CPUID to CPUDB 2011-07-30 21:28:16 +00:00
Stanislav Shwartsman
6aaf9297f8 ability to turn off rdtscp 2011-07-30 09:35:20 +00:00
Stanislav Shwartsman
919fbd95da fixed CPUID after correlation with real HW CPUZ output 2011-07-29 15:18:39 +00:00
Stanislav Shwartsman
74fc3da79d conditional compile for generic cpuid 2011-07-28 19:20:16 +00:00
Stanislav Shwartsman
5da595e603 fixed OSXSAVE CPUID reporting 2011-07-28 16:38:22 +00:00
Stanislav Shwartsman
78327d3e5e First step toward completely configurable CPU. 
Change CPUID to generic interface which could be chosen from .bochsrc.
Bochs CPU emulation will enable/disable features (like instruction sets) according to CPUID that is selected.
TODO: Add database of CPUID from real hardware CPUs
 2011-07-28 16:17:42 +00:00