Stanislav Shwartsman
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81edc636d4
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remove duplicate opcodes from decoder definitions
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2020-03-28 14:36:27 +00:00 |
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Stanislav Shwartsman
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a030d03935
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fixed bug in instruction decoding - regression before release
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2019-11-20 20:18:22 +00:00 |
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Stanislav Shwartsman
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83846cc821
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fixed bug in instruction decoding - regression before release
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2019-11-20 20:11:00 +00:00 |
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Stanislav Shwartsman
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82b6f7cb6c
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fixed bug in instruction decoding - regression before release
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2019-11-20 19:58:51 +00:00 |
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Stanislav Shwartsman
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4f625b23e0
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enable yet another Bochs new decoder. It is a bit slower than old one but it is much more extendable so adding new opcode won't be nightmare anymore
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2019-02-16 15:23:24 +00:00 |
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Stanislav Shwartsman
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61dcc4ace7
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remove unreferenced decode table
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2019-01-29 13:44:39 +00:00 |
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Stanislav Shwartsman
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180386cd74
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VMOVSS/VMOVSD are VEX.VL ignore form and not VEX.L0
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2017-11-11 11:58:07 +00:00 |
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Stanislav Shwartsman
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8261a91ce9
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implemented GFNI instructions
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2017-10-21 19:57:12 +00:00 |
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Stanislav Shwartsman
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15ba88c195
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implemented VAES/VPCLMULDQ instructions - VEX/EVEX extensions of AES/PCLMULQDQ
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2017-10-19 19:12:55 +00:00 |
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Stanislav Shwartsman
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10eb193e01
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step 1 of rewrite Bochs decoder: legacy decoder tables done. TODO: avx/evex decoder tables, merge decoder and disasm together
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2017-01-10 20:15:17 +00:00 |
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Stanislav Shwartsman
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7a34f00f99
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extracted fetchdecode into separated folder under cpu and also out of BX_CPU_C class into stand-alone module. Next step: wrap it up nicely and define clear interace to CPU model to minimize dependencies. Ideally I need fetchdecode to not include CPU at all
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2016-06-12 21:23:48 +00:00 |
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