Stanislav Shwartsman
81edc636d4
remove duplicate opcodes from decoder definitions
2020-03-28 14:36:27 +00:00
Stanislav Shwartsman
b686c8d423
add into ia_opcodes.def disasm field for every instruction
2020-03-28 14:23:54 +00:00
Stanislav Shwartsman
7d989b34a3
fixed recent segoverride assignment bug in SVN
2020-02-28 15:03:52 +00:00
Stanislav Shwartsman
6e2541daa6
CET: DS Seg override is kept for CET Endranch suppress hint even if overridden by other prefixes later
2020-02-21 19:38:23 +00:00
Stanislav Shwartsman
086f2779f5
fixed compilation with avx but without EVEX
2020-02-20 05:29:13 +00:00
Stanislav Shwartsman
b09126aa34
use enums for assign_srcs error output - help with debugging unexpected #UD cases
2019-12-27 19:34:32 +00:00
Stanislav Shwartsman
6879feebf5
SHA: SHA instructions in 128-bit memory operand require to be explicitly aligned
2019-12-27 14:24:43 +00:00
Stanislav Shwartsman
5c45f6b324
AVX512: EVEX.Z is forbidden for any vector instruction using opmask as source or destination (should cause #UD)
2019-12-27 14:23:53 +00:00
Stanislav Shwartsman
8bd5272591
correctly handle CET Enbranch override prefix 0x3E in 64-bit mode
2019-12-27 13:44:57 +00:00
Stanislav Shwartsman
596c197cea
fix decoder: SHA1RNDS4 instruction should be with no SSE prefix
2019-12-27 13:08:20 +00:00
Stanislav Shwartsman
d6c3dcf033
revert for full vector read until figured out the right behavior for VPSHUFBITQMB
2019-12-24 20:08:33 +00:00
Stanislav Shwartsman
e38cca20be
disable fault suppression for VPEXPAND* until fugured out how it should work in real life
2019-12-21 20:54:45 +00:00
Stanislav Shwartsman
c16816485e
use optimized function for broadcastss
2019-12-21 20:20:33 +00:00
Stanislav Shwartsman
1a0237e9af
make order in AVX512 broadcast handlers, extract them into separate file
2019-12-21 20:07:03 +00:00
Stanislav Shwartsman
11585e4982
AVX512: VPBROADCASTB/W/D/Q with GPR source are only reg/reg
2019-12-21 18:29:51 +00:00
Stanislav Shwartsman
afa3626eb3
AVX512: fixed compressed immediate size (and memory access size) for VPBROADCASTB_Eb form
2019-12-21 18:17:51 +00:00
Stanislav Shwartsman
0169605f79
seems like GFNI VGF2P8AFFINEQB and VGF2P8AFFINEINVQB do not have fault suppression
2019-12-21 18:01:58 +00:00
Stanislav Shwartsman
4ac2122f3a
rename function to correct English, add broadcast and fault suppression support for EVEX encoded GFNI instructions
2019-12-21 16:12:06 +00:00
Stanislav Shwartsman
dd1ab303df
rename function to correct English
2019-12-21 15:54:52 +00:00
Stanislav Shwartsman
723554d535
AVX512: Allow masked fault suppression for many AVX512 instructions - not all cases reviewed yet, more to come
2019-12-21 15:47:29 +00:00
Stanislav Shwartsman
74c73e5a76
AVX512: Allow masked fault suppression for many AVX512 instructions - not all cases reviewed yet, more to come
2019-12-20 15:34:14 +00:00
Stanislav Shwartsman
0e5d843597
AVX512: Allow masked fault suppression for many AVX512 instructions - not all cases reviewed yet, more to come
2019-12-20 14:58:56 +00:00
Stanislav Shwartsman
cff6a67adb
AVX512: Allow masked fault suppression for many AVX512 instructions - not all cases reviewed yet, more to come
2019-12-20 14:57:42 +00:00
Stanislav Shwartsman
9fbf974e6b
AVX512: Allow masked fault suppression for many AVX512 instructions - not all cases reviewed yet, more to come
2019-12-20 13:45:00 +00:00
Stanislav Shwartsman
222185ad11
AVX512: Allow masked fault suppression for many AVX512 instructions - not all cases reviewed yet, more to come
2019-12-20 13:42:59 +00:00
Stanislav Shwartsman
ec5f526ac0
ENBRANCH and RDSSP should remain NOP when CET not enabled, this means they not require an specifical CPU feature to be decoded into the hnadler
2019-12-20 13:16:52 +00:00
Stanislav Shwartsman
f90e5f4f44
Add initial implementation of the CET (Control Flow Enforcement Technology) emulation according to SDM071
...
Only missing items (to be added soon):
- Supervisor Shadow Stack EPT Control is not implemented yet
- SMM placing for SSP
Currently have to be added manually to some CPUID model, for example to ICL-U
To enable configure with --enable-cet
2019-12-20 07:42:07 +00:00
Stanislav Shwartsman
39aee8773f
AVX512: Allow masked fault suppression for many AVX512 instructions - not all cases reviewed yet, more to come
2019-12-19 21:21:24 +00:00
Stanislav Shwartsman
682fbda5af
AVX512: Allow masked fault suppression for many AVX512 instructions - not all cases reviewed yet, more to come
2019-12-19 21:12:47 +00:00
Stanislav Shwartsman
2df60c3b3f
AVX512: Allow masked fault suppression for many AVX512 instructions - not all cases reviewed yet, more to come
2019-12-19 20:08:49 +00:00
Stanislav Shwartsman
019c934cfd
decode GFNI opcodes in 64-bit mode too
2019-12-18 19:55:04 +00:00
Stanislav Shwartsman
6d612df280
AVX512_BITALG: Fixed decoding of VPSHUFBITQMB instruction
2019-12-13 14:11:08 +00:00
Stanislav Shwartsman
c9ac9a1e43
AVX512_VBMI: Fixed decoding of VPERMB instruction
2019-12-13 13:24:02 +00:00
Stanislav Shwartsman
fc79466dcb
AVX512_VBMI: Fixed decoding of VPERMI2B/VPERMT2B instructions
2019-12-13 13:08:45 +00:00
Stanislav Shwartsman
eb009ddd00
fixed VPACKSSDW/VPACKUSDW opcodes - allow broadcast
2019-12-13 12:53:48 +00:00
Stanislav Shwartsman
f9d04849b3
fixed decoding for VPSHLDVW/VPSHRDVW/VPSHLDVD/VPSHLDVQ/VPSHRDVD/VPSHRDVQ
2019-12-13 12:34:16 +00:00
Stanislav Shwartsman
9bbf43ed4b
fixed decoding of AVX512_VNNI instructions
2019-12-13 08:39:23 +00:00
Stanislav Shwartsman
27e96c807c
fixed decoding of VPBROADCASTMW2D opcode
2019-12-13 08:09:18 +00:00
Stanislav Shwartsman
44b3ebeca2
remove BX_TRUE/BX_FALSE macros, use stdc++ true/false instead
2019-12-09 16:44:36 +00:00
Stanislav Shwartsman
4e9e3f85de
simplify code by merging two opcodes with similar behavior
2019-11-27 15:31:32 +00:00
Stanislav Shwartsman
7833a82347
fixed bug in instruction decoding - regression before release
2019-11-22 17:46:54 +00:00
Stanislav Shwartsman
46b862fe5e
do not truncate disasm branch target in 64-bit mode
2019-11-20 20:41:03 +00:00
Stanislav Shwartsman
a030d03935
fixed bug in instruction decoding - regression before release
2019-11-20 20:18:22 +00:00
Stanislav Shwartsman
83846cc821
fixed bug in instruction decoding - regression before release
2019-11-20 20:11:00 +00:00
Stanislav Shwartsman
82b6f7cb6c
fixed bug in instruction decoding - regression before release
2019-11-20 19:58:51 +00:00
Stanislav Shwartsman
d766cc8112
implemented SCA (Side-Channel-Attack) Prevention reporting and corresponding MSR registers, enabled for Icelake-U CPU definition
2019-10-26 20:09:30 +00:00
Stanislav Shwartsman
eec720c62b
convert bochs.h macros to inline functions with strong types
2019-10-16 20:46:00 +00:00
Stanislav Shwartsman
f0245b5f2b
introduce special handlers for zero-idiom instructions - ~1% speedup to simulation. infra for fast string emulation in 64-bit mode
2019-10-14 06:40:19 +00:00
Stanislav Shwartsman
49ebaf8397
typofix: attached MASK_K0 attr to wrong opcode
2019-05-25 19:10:55 +00:00
Stanislav Shwartsman
bc4af1b08d
add missing break statement in disasm.cc
2019-05-25 19:08:39 +00:00
