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7,013 Commits 11 Branches 185 Tags 48 MiB
67f302352c
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497 Commits

Author SHA1 Message Date
Stanislav Shwartsman
67f302352c Implement PDPE cache to support faster PAE paging tranlsation 2008-08-01 13:28:44 +00:00
Stanislav Shwartsman
59514dcbfb Fixed compilation err typo 2008-07-26 20:50:20 +00:00
Stanislav Shwartsman
c388f48fff - Fixed memory bug in tripple fault detection 
- Implement 16-byte memory accessor for SSEx - speedup SSE code emulation by >20%
 2008-07-26 14:19:06 +00:00
Stanislav Shwartsman
85686db212 Removed unused methods 2008-07-13 14:22:43 +00:00
Stanislav Shwartsman
3f5efb6475 Remove more duplicated methods 2008-07-13 10:06:07 +00:00
Stanislav Shwartsman
0127415ba6 Clear some duplicated arithmetic opcodes - difference only in operands order 2008-07-13 09:59:59 +00:00
Stanislav Shwartsman
c1f308d80d Push error code if segment violation occurs when pushing arguments into a new stack 2008-06-25 02:28:31 +00:00
Stanislav Shwartsman
a6fda9a971 Instrumentation code updated, some PANIC messages fixed 2008-06-23 02:56:31 +00:00
Stanislav Shwartsman
678ac970aa Reorganize ctrl_xfer8.cc code, allows to inline branch32 method 2008-06-22 03:45:55 +00:00
Stanislav Shwartsman
98581c44d3 Fixed compilation when use64 is disabled 2008-06-13 08:17:52 +00:00
Stanislav Shwartsman
1a355e270e split io repeat methods by address size 2008-06-12 20:12:25 +00:00
Stanislav Shwartsman
92568f7525 Faster 32-bit emulation wwith 64-bit enabled mode. 
~10% speedup byu optimization of 32-bit mem access
 2008-06-12 19:14:40 +00:00
Stanislav Shwartsman
607900dd4d very small cleeanup 2008-06-12 16:40:53 +00:00
Stanislav Shwartsman
424f316e07 Fixed comment 2008-06-02 20:11:03 +00:00
Stanislav Shwartsman
7494b8823b - Support of AES CPU extensions, to enable configure with 
--enable-aes option
 2008-05-30 20:35:08 +00:00
Stanislav Shwartsman
d295371450 - Correctly handle segment a byte in BIG real mode 2008-05-26 21:46:39 +00:00
Stanislav Shwartsman
77fbc2c187 Fixed LAR/LSL in 64-bit mode, compilation error fixes 2008-05-25 15:53:29 +00:00
Stanislav Shwartsman
3619c0f6b4 Some changes to make x86-debugger feature working back 2008-05-23 17:49:46 +00:00
Stanislav Shwartsman
4e5d10d02e Code reorganization + small bug fixes in translate linear code 2008-05-19 18:10:32 +00:00
Stanislav Shwartsman
76fc10e3d4 Added ability to override exception class to TRAP (#DB) 2008-05-15 20:10:00 +00:00
Stanislav Shwartsman
d934190370 Fixed data type for cr3_masked 2008-05-11 19:58:41 +00:00
Stanislav Shwartsman
4a76bd2169 Fixed setting of reserved bits in CR3 register 2008-05-11 19:36:06 +00:00
Stanislav Shwartsman
d3528cccd6 Style fixes - name convention for push to new stack methods 2008-05-10 20:35:03 +00:00
Stanislav Shwartsman
ec1ff39a5f Splitted memory access methods for 32 and 64-bit code. 
The 64-bit code got >10% speedup, the 32-bit code also got about 2% because laddr cacluation optimization
 2008-05-10 18:10:53 +00:00
Stanislav Shwartsman
3634c6f892 Compress FPU tag word 2008-05-10 13:34:47 +00:00
Stanislav Shwartsman
8e7cf2bf3a - Fixed CPUID 
- Merged jmp_call_gate16 and jmp_call_gate32 to single function
 2008-05-09 18:09:04 +00:00
Stanislav Shwartsman
5da460b6dc Clear segment descriptor cache when loading null selector 2008-05-06 19:45:17 +00:00
Stanislav Shwartsman
f642b57a54 Lazy falgs optimizations by Darek Mihocka 2008-05-04 15:07:08 +00:00
Stanislav Shwartsman
ed4be45a8b Split shift/rotate opcodes in 32-bit mode and 64-bit mode 2008-05-02 22:47:07 +00:00
Stanislav Shwartsman
f5780a5f5c Hide some BX_MEM_C variables 
Optimize resolve16 methods - by reducing their amount again - reduce chance for misspredictin
 2008-05-01 20:08:37 +00:00
Stanislav Shwartsman
81deffd65d More fetchdecode fixes 2008-04-30 21:32:33 +00:00
Stanislav Shwartsman
06c6ac0060 - Fixed effective address wrap in 64-bit mode with 32-bit address size 
- Fixed SMSW instruction in 32-bit and 64-bit modes
 2008-04-28 18:18:08 +00:00
Stanislav Shwartsman
67e534832b Remove from CPU reference to MEM object - it is only one and could be static 2008-04-27 19:49:02 +00:00
Stanislav Shwartsman
e86102eea5 Fixed 2nd dword of 64-bit descriptor check 2008-04-26 19:41:28 +00:00
Stanislav Shwartsman
9047c9be96 Support for reserved bits checking in paging 
Check for page is in DTLB before invalidating by INVLPG
 2008-04-25 20:08:23 +00:00
Stanislav Shwartsman
64f2489afb Correctly implement opcode group G11 i.e. instructions C6 and C7 should @UD when modrm nnn field != 0 (1st instr in the group 2008-04-24 21:52:28 +00:00
Stanislav Shwartsman
d24a274909 Eliminate can_pop function - with bugfix in retf 2008-04-23 17:25:21 +00:00
Stanislav Shwartsman
d9bf2b8453 Small emulation speed optimization 2008-04-19 22:29:44 +00:00
Stanislav Shwartsman
bdaef81603 Added debugger memory trace functionality. Enable by 'trace-mem on' command 2008-04-19 13:21:23 +00:00
Stanislav Shwartsman
cacec881cf Fixed param type for set_TSC 2008-04-18 18:37:29 +00:00
Stanislav Shwartsman
15e9dca062 - support 64-bit write to MSR_TSC using WRMSR instruction 
- fixed save/restore param type for async_event
- fixed setting of reserved bits in upper part of CR4 in 64-bit mode
 2008-04-18 18:32:40 +00:00
Stanislav Shwartsman
892fa99c6f - prefetch hint should be NOP when use in register mode 
- #GP when trying to set reserved bits of CR4_HI in 64-bit mode
- #GP when trying to set reserved bits of EFER MSR
- clear upper part of RSI/RDI when executing rep instructions with 32-bit asize
  even if no repeat iterations were executed (because of RCX=0 for example)
- write SYSENTER_EIP_MSR and SYSENTER_ESP_MSR as 64-bit when x86_64 supported
- set MSR_FMASK reset value
- MSR_FMASK should be 32-bit only
- check for fetch permissions when doing ITLB lookup
- #GP when trying to write non-canonical address to MSR_CSTAR or MSR_LSTAR
- correct repeat instructions timing
- mark TSS busy in TR after it is loaded
 2008-04-16 16:44:06 +00:00
Stanislav Shwartsman
4c26043969 Fixed 3rd fault detection (shutdown condition) 2008-04-15 17:22:11 +00:00
Stanislav Shwartsman
fab4042cad SYSENTER/SYSEXIT in long mode 2008-04-15 14:41:50 +00:00
Stanislav Shwartsman
a98cd9f781 small cpu code reorganization 2008-04-08 17:58:56 +00:00
Stanislav Shwartsman
a33d8c6008 Make get_laddr and get_segment_base BX_SMF 2008-04-08 05:36:30 +00:00
Stanislav Shwartsman
a851cfd8f0 Re-implemented modebp debugger function in simple and more clean way 2008-04-07 19:59:53 +00:00
Stanislav Shwartsman
fea49bb270 Fixed linear address wrap in legacy (not long64) mode 2008-04-07 18:39:17 +00:00
Stanislav Shwartsman
77d91d59aa Inline prepare_SSE and prepare_XSAVE functions 2008-04-06 18:00:20 +00:00
Stanislav Shwartsman
90f1973bef Removed BX_USE_TLB - TLB is always used, only Guest2HostTLB is optional feature 
Use Guest2HostTLB in prefetch code for IFETCHES - speedup above 3%
 2008-04-05 20:41:00 +00:00