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91 Commits

Author SHA1 Message Date
Stanislav Shwartsman
d17eb99f76 fixed allocated physical memory limit check in memory.cc 
Force eflags before saving them - register eflags using param handlers
 2006-06-01 20:05:15 +00:00
Stanislav Shwartsman
02aa59886c Fix APIC tmr/isr/irr registers reading problem 2006-06-01 14:05:23 +00:00
Stanislav Shwartsman
32a6e4c561 Added more debug messages to apic 2006-06-01 11:59:23 +00:00
Stanislav Shwartsman
fee48d74e0 Avoid doing strdup for param name field - most of the strdups elliminated ! 2006-05-29 22:33:38 +00:00
Stanislav Shwartsman
286b89d763 Several x86-64 MSRs were not-initilized ! 
Fixed small save-restore bug in dma.cc
First step to make save-restore code look better (only several files processed for example)
 2006-05-28 17:07:57 +00:00
Stanislav Shwartsman
8ed9a2fa4e Use MAX_LFV_ENTRIES constant 2006-05-27 21:44:40 +00:00
Stanislav Shwartsman
8b0df8e99b Merge SAVE_RESTORE branch to CVS 2006-05-27 15:54:49 +00:00
Stanislav Shwartsman
c120d5dc70 remove unused and not required apic vars 2006-05-23 16:42:50 +00:00
Stanislav Shwartsman
8db1de7124 - Fixed several issues, each cause to NullTimer function never be called, the method is required for icache correct functionalit 
- Speed-up icache by correct purging of Icache entries
- Several new assertions for timers, to prevent bugs in future
 2006-05-16 20:55:55 +00:00
Stanislav Shwartsman
d972e4a4b7 Fixed CR3 restore in RSM instruction 
Added HALT state indication (actually make existant one working for single CPU)
 2006-04-10 19:05:21 +00:00
Stanislav Shwartsman
45f30f0a4c some code written to enter CPU to shutdown state. 
finally the shutdown handling should be done exactly as in VmWare - the GUI should ask user if the CPU should reset and go to HLT/IF=0 if user choosed to stay in shutdown mode.
CPU configure option reset-on-triple-failt should be extended to shutdown-reset=0|1
small code cleanups and fixes
 2006-04-07 20:47:32 +00:00
Stanislav Shwartsman
f8c3968d42 Changes list made after CVS service crash: 
- Fixed critical bug in CPU code added with one of the prev commits
  - Disasm support for SSE4
  - Rename PNI->SSE3 everywhere in the code
  - Correctly decode, disassemble and execute 'XCHG R8, rAX' x86-64 instruction
  - Correctly decode, disassemble and execute multi-byte NOP 0F F1 opcode
  - Fixed ENTER and LEAVE instructions in x86-64 mode
  - Added ability to turn ON instruction trace, only GUI support is missed.
    Instruction trace could be enabled if Bochs was compiled with disasm
  - More changes Bit32u -> bx_phy_address
  - Complete preliminary implementation of SMM in Bochs, SMI is still PANICs but if you press 'continue' everything should work OK
  - Small code cleanup
  - Update CHANGES and user docs
 2006-04-05 17:31:35 +00:00
Stanislav Shwartsman
7b6c2587a9 Now devices could be compiled separatelly from CPU 
Averything that required cpu.h include now has it explicitly and there are a lot of files not dependant by CPU at all which will compile a lot faster now ...
 2006-03-06 22:03:16 +00:00
Stanislav Shwartsman
e297df457a Roll back the try to move Local APIC memory access to CPU. 
It was fast and fine but had serious correctness problems with RMW apic access
 2006-03-02 23:16:13 +00:00
Stanislav Shwartsman
6d513ed6f2 Fix indent corruption 2006-03-02 20:17:54 +00:00
Stanislav Shwartsman
6c392e7f3f optimize apic code 2006-03-02 20:09:21 +00:00
Stanislav Shwartsman
5fad793989 move local apic handling to the access_linear function for the memory class. 
speedup the whole simulation by 2% !
 2006-03-01 22:32:24 +00:00
Stanislav Shwartsman
7cfa31492c Removed --enable-pni configure option, to compile with PNI use 
--enable-sse=3 instead (Stanislav Shwartsman)
 2006-02-20 19:28:57 +00:00
Stanislav Shwartsman
024ce249bf Define SMM mode for future implementation. 
I would like all next commits be aware of SMM mode.
It can't be implemented right now (too many questions w/o answers) but it will be done till next major release definitelly.
 2006-02-14 19:00:08 +00:00
Stanislav Shwartsman
652ce3c0dc Fix for bug report: 
bochs-Bugs-1406383 ] Local APIC TPR is ignored due to signed/unsigned mismatch
 2006-01-15 17:38:40 +00:00
Stanislav Shwartsman
5899932f0c Merge APIC patch to the CVS. 
- Fix lowest priority interrupt delivery from I/O APIC
 - XAPIC support
 - Implemented APIC bus functionality
 - cleanup APIC code
 2006-01-10 06:13:26 +00:00
Volker Ruppert
97e1f39d8f - I/O APIC signal handling rewritten ("backported" from qemu) 
- don't flood the logfile if APIC EOI has no effect
- fixed a warning in the APIC code
- TODO: fix IRQ 0 handling, implement ExtINT
 2006-01-01 11:33:06 +00:00
Stanislav Shwartsman
9e4a3675d3 Cleanup APIC code 
Fixed APIC timer problem (too many registered timers) reported by Brendan
 2005-12-26 19:42:09 +00:00
Stanislav Shwartsman
8627bc1596 Fixed bug from prev commit 2005-12-13 20:42:22 +00:00
Stanislav Shwartsman
5f339a5fd8 Small debug fixes 2005-12-12 22:01:22 +00:00
Stanislav Shwartsman
1f2cde53f0 Fix arbitration of local apic when issuing lowest priority interrupt or arbitrating between different local apics. APR (arbitration priority register) should be used for lowest priority interrupt delivery and available to user software and ARB_ID should be software transparent APIC internal 2005-12-11 21:58:53 +00:00
Stanislav Shwartsman
8b8d4900ed Implement read/write of ESR register 2005-12-11 20:01:54 +00:00
Stanislav Shwartsman
faff702f44 GP(0) on cross segment boundaryu instruction 2005-12-09 21:21:29 +00:00
Stanislav Shwartsman
abe9791fe6 Fix typo 2005-11-28 22:42:29 +00:00
Stanislav Shwartsman
1f2913477e Fix typo ... 2005-11-28 22:35:43 +00:00
Stanislav Shwartsman
82ccada927 Merged and committed #SF patch from wmrieker 
[ 857235 ] task priority and other APIC bugs, etc
 2005-11-28 22:19:01 +00:00
Stanislav Shwartsman
49ed4e95a1 Fixed bug in set_id 2005-11-22 17:41:07 +00:00
Stanislav Shwartsman
9314752bb1 Rewritten task_switch mechnism according to AMD docs 
This should fix the #SF bug report
736279  Jump to Task
 2005-11-21 21:10:59 +00:00
Stanislav Shwartsman
2c5b72fce5 Apply patch 
[ bochs-Patches-1311170 ] small APIC bug fix (interrupt sent to the wrong CPU)
 2005-10-10 20:45:41 +00:00
Stanislav Shwartsman
2c6393dd8b Fixed memory corruption in APIC 2005-08-01 18:55:58 +00:00
Stanislav Shwartsman
e04b4c5856 Allow zero apic timer count: 
terminate the counting if apic timer initial count register was set to zero during the counting.
 2005-06-16 16:56:30 +00:00
Volker Ruppert
821ff1e87c - clarify operator precedence (needed by MSVC) 
- defined symbol BOCHSAPI_MSVCONLY for special cases in MSVC
 2005-06-09 17:42:34 +00:00
Stanislav Shwartsman
b5514f42de Merged patch for "compilation outside source directory" 
Added missed copyrights for APIC.CC
 2005-06-07 05:54:57 +00:00
Stanislav Shwartsman
a86002a8bc Improve Bochs instrumentation 
Small changes in APIC timer, should fix the bug report
[ 957660 ] >>PANIC<< APIC: R(curr timer count): delta < initial
 2005-04-29 21:28:59 +00:00
Stanislav Shwartsman
dbbef1bc1a A lot of debug prints added to APIC.CC 
Comment raise of APIC_ERR_TX_ACCEPT_ERR in trigger interrupt when err already set for this vector
 2005-04-29 18:38:35 +00:00
Stanislav Shwartsman
19750b0324 Fixed highest_priority_int calculation function 
Fixed I/O APIC ID for 8CPU configuration to match BIOS tables
Remove I/O APIC initialization when INIT IPI received
 2005-04-27 18:09:27 +00:00
Stanislav Shwartsman
494af8b1f3 Fixed segmentation fault for 2CPU cfg 2005-04-26 19:19:58 +00:00
Stanislav Shwartsman
76af95a9a7 Added debug prints for APIC 2005-04-26 18:30:30 +00:00
Stanislav Shwartsman
4444dc095b Fixed SIGSEGV in 8cpu configuration 2005-04-23 17:52:51 +00:00
Stanislav Shwartsman
fd02a03516 Fixed broadcast mode 2005-04-16 15:55:00 +00:00
Stanislav Shwartsman
1755589376 Separate pageWriteStamp from ICACHE. The pageWriteStamp has totally independant structure and could be used in future with icache structure. Also it could be significantly speeded up using BX_SMF analog constructions. 2005-04-10 19:42:48 +00:00
Stanislav Shwartsman
6fd9f82c35 Fixed typo in apic.cc 
Small speedup for arith64.cc (redundant modC0() call ellimination)
Cleanup
 2005-04-02 18:49:44 +00:00
Stanislav Shwartsman
c3fd89eceb More accurate fix for cpu_online_map ellimination 2005-03-20 18:33:02 +00:00
Stanislav Shwartsman
3074078297 Added CVS version header to all the files. 
One more small change in APIC
 2005-03-19 20:44:01 +00:00
Stanislav Shwartsman
f77ddd9701 Remove cpu_onlline_map varaible, it wasn't initialized properly and might cause APIC problems 2005-03-19 18:43:00 +00:00