Commit Graph

170 Commits

Author SHA1 Message Date
Stanislav Shwartsman
7be90a7426 forgot to enable local_apic in init() 2009-02-18 22:38:58 +00:00
Stanislav Shwartsman
3564ef3162 small fixes 2009-02-18 22:33:06 +00:00
Stanislav Shwartsman
1b72e66bb3 support for apic global disable
separate between I/O apic and local apic
2009-02-18 22:25:04 +00:00
Stanislav Shwartsman
87b705d036 Changes in lapicbase msr 2009-02-17 19:44:02 +00:00
Stanislav Shwartsman
3a1852ea23 take local APIC read/write access into CPU class from BX_MEM (needed for APIC virtualization later) 2009-02-17 19:20:47 +00:00
Stanislav Shwartsman
7d5e058dfe write to apic must be 16-byte aligned 2009-02-03 20:42:15 +00:00
Stanislav Shwartsman
4499ae8d02 more info abourt SIPI 2009-02-03 19:25:37 +00:00
Stanislav Shwartsman
aa982c27d8 move startup_SIPI code to CPU 2009-01-27 21:13:38 +00:00
Volker Ruppert
501952efdd - removed unused logfunctions member 'type' and related method 'settype()'
- updated FSF address in copyright
2009-01-10 11:30:20 +00:00
Stanislav Shwartsman
098308dd9f some variable renames + comp warn fix 2008-12-01 19:06:14 +00:00
Stanislav Shwartsman
cde9595e86 implement cluster addressing model in local apic
deliver INIT IPI through local apic
2008-11-20 18:44:15 +00:00
Stanislav Shwartsman
97bf141fc3 Added paramter to APIC reset method 2008-06-17 21:21:17 +00:00
Stanislav Shwartsman
5b4c29e2de Fixed warnings found by icc compiler 2008-06-17 20:23:16 +00:00
Stanislav Shwartsman
6ebae41ad7 print physcial address with special format - preparations for 64-bit physical address emu 2008-05-09 22:33:37 +00:00
Stanislav Shwartsman
cdcd7522aa Added RIP to the GPR register file as lst register
This allowed to optimize (read - remove) two more BxResolve methods in 64-bit mode
+ Some white space cleanup
2008-02-15 19:03:54 +00:00
Stanislav Shwartsman
a2897933a3 white space cleanup 2008-02-02 21:46:54 +00:00
Stanislav Shwartsman
976af56f6d Split bit.cc to 4 files - new files bit16/32/64.cc 2007-12-07 10:59:18 +00:00
Stanislav Shwartsman
d1e71ec4a7 deliver smi should be available even if apic is OFF 2007-11-30 17:59:10 +00:00
Stanislav Shwartsman
c51888f43f Split last BxLockable opcodes -> this allows to eliminate mod==0xc0 check from fetchdecode of every instruction
reduce ACPU.CC dependencies - now that file doesn't depend of CPU
2007-11-25 20:22:10 +00:00
Stanislav Shwartsman
83f6eb6945 Changes copyrights for the files I wrote :)
Also split EqId G1 group for x86-64
2007-11-17 23:28:33 +00:00
Stanislav Shwartsman
e137560b14 Complete MONITOR/MWAIT implemntation (including monitoring of memory range)
Fixed PANIC in read/write Cr/Dr - should #UD with unkown register used
2007-11-01 18:03:48 +00:00
Stanislav Shwartsman
4ec7f5df39 Optimize access to IP (16 bit) - made IP register similar to GPR 2007-10-18 22:44:39 +00:00
Stanislav Shwartsman
f69a21ab2b Fix some copyright messages 2007-10-15 22:07:52 +00:00
Stanislav Shwartsman
f6ed95785f added cpu state param - for future use and for dbg info
started to move debugger to info bx_param interface -> info sse and info mmx commands modified
2007-10-11 18:12:00 +00:00
Stanislav Shwartsman
071c5c1a26 A lot of changes but everything is really trivial.
Make save/restore default feature, the configure option for save/restore removed from configure script and save/restore made available forever. All code now assume it is exists. Bochs save/restore tree previosly called "save_restore" renamed to "bochs" tree and it will be havily used everywhere, starting from save/restore and ending by various bochs debugger functions. I am going to rework debugger code to get rid of debug CPU access functions and use this "bochs" param tree instead
2007-09-28 19:52:08 +00:00
Stanislav Shwartsman
65b9b46de3 Fix for legacy compilers 2007-04-04 16:55:50 +00:00
Stanislav Shwartsman
1aa7ae677d Small cleanup in he APIC code, removed unused methods 2006-10-02 21:49:49 +00:00
Stanislav Shwartsman
6468398104 Fixed APIC interrupt priority bug 2006-06-20 16:51:03 +00:00
Stanislav Shwartsman
1aaf19cd09 Support for partial read/write in APIC space 2006-06-05 05:39:21 +00:00
Stanislav Shwartsman
d17eb99f76 fixed allocated physical memory limit check in memory.cc
Force eflags before saving them - register eflags using param handlers
2006-06-01 20:05:15 +00:00
Stanislav Shwartsman
02aa59886c Fix APIC tmr/isr/irr registers reading problem 2006-06-01 14:05:23 +00:00
Stanislav Shwartsman
32a6e4c561 Added more debug messages to apic 2006-06-01 11:59:23 +00:00
Stanislav Shwartsman
fee48d74e0 Avoid doing strdup for param name field - most of the strdups elliminated ! 2006-05-29 22:33:38 +00:00
Stanislav Shwartsman
286b89d763 Several x86-64 MSRs were not-initilized !
Fixed small save-restore bug in dma.cc
First step to make save-restore code look better (only several files processed for example)
2006-05-28 17:07:57 +00:00
Stanislav Shwartsman
8ed9a2fa4e Use MAX_LFV_ENTRIES constant 2006-05-27 21:44:40 +00:00
Stanislav Shwartsman
8b0df8e99b Merge SAVE_RESTORE branch to CVS 2006-05-27 15:54:49 +00:00
Stanislav Shwartsman
c120d5dc70 remove unused and not required apic vars 2006-05-23 16:42:50 +00:00
Stanislav Shwartsman
8db1de7124 - Fixed several issues, each cause to NullTimer function never be called, the method is required for icache correct functionalit
- Speed-up icache by correct purging of Icache entries
- Several new assertions for timers, to prevent bugs in future
2006-05-16 20:55:55 +00:00
Stanislav Shwartsman
d972e4a4b7 Fixed CR3 restore in RSM instruction
Added HALT state indication (actually make existant one working for single CPU)
2006-04-10 19:05:21 +00:00
Stanislav Shwartsman
45f30f0a4c some code written to enter CPU to shutdown state.
finally the shutdown handling should be done exactly as in VmWare - the GUI should ask user if the CPU should reset and go to HLT/IF=0 if user choosed to stay in shutdown mode.
CPU configure option reset-on-triple-failt should be extended to shutdown-reset=0|1
small code cleanups and fixes
2006-04-07 20:47:32 +00:00
Stanislav Shwartsman
f8c3968d42 Changes list made after CVS service crash:
- Fixed critical bug in CPU code added with one of the prev commits
  - Disasm support for SSE4
  - Rename PNI->SSE3 everywhere in the code
  - Correctly decode, disassemble and execute 'XCHG R8, rAX' x86-64 instruction
  - Correctly decode, disassemble and execute multi-byte NOP 0F F1 opcode
  - Fixed ENTER and LEAVE instructions in x86-64 mode
  - Added ability to turn ON instruction trace, only GUI support is missed.
    Instruction trace could be enabled if Bochs was compiled with disasm
  - More changes Bit32u -> bx_phy_address
  - Complete preliminary implementation of SMM in Bochs, SMI is still PANICs but if you press 'continue' everything should work OK
  - Small code cleanup
  - Update CHANGES and user docs
2006-04-05 17:31:35 +00:00
Stanislav Shwartsman
7b6c2587a9 Now devices could be compiled separatelly from CPU
Averything that required cpu.h include now has it explicitly and there are a lot of files not dependant by CPU at all which will compile a lot faster now ...
2006-03-06 22:03:16 +00:00
Stanislav Shwartsman
e297df457a Roll back the try to move Local APIC memory access to CPU.
It was fast and fine but had serious correctness problems with RMW apic access
2006-03-02 23:16:13 +00:00
Stanislav Shwartsman
6d513ed6f2 Fix indent corruption 2006-03-02 20:17:54 +00:00
Stanislav Shwartsman
6c392e7f3f optimize apic code 2006-03-02 20:09:21 +00:00
Stanislav Shwartsman
5fad793989 move local apic handling to the access_linear function for the memory class.
speedup the whole simulation by 2% !
2006-03-01 22:32:24 +00:00
Stanislav Shwartsman
7cfa31492c Removed --enable-pni configure option, to compile with PNI use
--enable-sse=3 instead (Stanislav Shwartsman)
2006-02-20 19:28:57 +00:00
Stanislav Shwartsman
024ce249bf Define SMM mode for future implementation.
I would like all next commits be aware of SMM mode.
It can't be implemented right now (too many questions w/o answers) but it will be done till next major release definitelly.
2006-02-14 19:00:08 +00:00
Stanislav Shwartsman
652ce3c0dc Fix for bug report:
bochs-Bugs-1406383 ] Local APIC TPR is ignored due to signed/unsigned mismatch
2006-01-15 17:38:40 +00:00
Stanislav Shwartsman
5899932f0c Merge APIC patch to the CVS.
- Fix lowest priority interrupt delivery from I/O APIC
 - XAPIC support
 - Implemented APIC bus functionality
 - cleanup APIC code
2006-01-10 06:13:26 +00:00
Volker Ruppert
97e1f39d8f - I/O APIC signal handling rewritten ("backported" from qemu)
- don't flood the logfile if APIC EOI has no effect
- fixed a warning in the APIC code
- TODO: fix IRQ 0 handling, implement ExtINT
2006-01-01 11:33:06 +00:00
Stanislav Shwartsman
9e4a3675d3 Cleanup APIC code
Fixed APIC timer problem (too many registered timers) reported by Brendan
2005-12-26 19:42:09 +00:00
Stanislav Shwartsman
8627bc1596 Fixed bug from prev commit 2005-12-13 20:42:22 +00:00
Stanislav Shwartsman
5f339a5fd8 Small debug fixes 2005-12-12 22:01:22 +00:00
Stanislav Shwartsman
1f2cde53f0 Fix arbitration of local apic when issuing lowest priority interrupt or arbitrating between different local apics. APR (arbitration priority register) should be used for lowest priority interrupt delivery and available to user software and ARB_ID should be software transparent APIC internal 2005-12-11 21:58:53 +00:00
Stanislav Shwartsman
8b8d4900ed Implement read/write of ESR register 2005-12-11 20:01:54 +00:00
Stanislav Shwartsman
faff702f44 GP(0) on cross segment boundaryu instruction 2005-12-09 21:21:29 +00:00
Stanislav Shwartsman
abe9791fe6 Fix typo 2005-11-28 22:42:29 +00:00
Stanislav Shwartsman
1f2913477e Fix typo ... 2005-11-28 22:35:43 +00:00
Stanislav Shwartsman
82ccada927 Merged and committed #SF patch from wmrieker
[ 857235 ] task priority and other APIC bugs, etc
2005-11-28 22:19:01 +00:00
Stanislav Shwartsman
49ed4e95a1 Fixed bug in set_id 2005-11-22 17:41:07 +00:00
Stanislav Shwartsman
9314752bb1 Rewritten task_switch mechnism according to AMD docs
This should fix the #SF bug report
736279  Jump to Task
2005-11-21 21:10:59 +00:00
Stanislav Shwartsman
2c5b72fce5 Apply patch
[ bochs-Patches-1311170 ] small APIC bug fix (interrupt sent to the wrong CPU)
2005-10-10 20:45:41 +00:00
Stanislav Shwartsman
2c6393dd8b Fixed memory corruption in APIC 2005-08-01 18:55:58 +00:00
Stanislav Shwartsman
e04b4c5856 Allow zero apic timer count:
terminate the counting if apic timer initial count register was set to zero during the counting.
2005-06-16 16:56:30 +00:00
Volker Ruppert
821ff1e87c - clarify operator precedence (needed by MSVC)
- defined symbol BOCHSAPI_MSVCONLY for special cases in MSVC
2005-06-09 17:42:34 +00:00
Stanislav Shwartsman
b5514f42de Merged patch for "compilation outside source directory"
Added missed copyrights for APIC.CC
2005-06-07 05:54:57 +00:00
Stanislav Shwartsman
a86002a8bc Improve Bochs instrumentation
Small changes in APIC timer, should fix the bug report
[ 957660 ] >>PANIC<< APIC: R(curr timer count): delta < initial
2005-04-29 21:28:59 +00:00
Stanislav Shwartsman
dbbef1bc1a A lot of debug prints added to APIC.CC
Comment raise of APIC_ERR_TX_ACCEPT_ERR in trigger interrupt when err already set for this vector
2005-04-29 18:38:35 +00:00
Stanislav Shwartsman
19750b0324 Fixed highest_priority_int calculation function
Fixed I/O APIC ID for 8CPU configuration to match BIOS tables
Remove I/O APIC initialization when INIT IPI received
2005-04-27 18:09:27 +00:00
Stanislav Shwartsman
494af8b1f3 Fixed segmentation fault for 2CPU cfg 2005-04-26 19:19:58 +00:00
Stanislav Shwartsman
76af95a9a7 Added debug prints for APIC 2005-04-26 18:30:30 +00:00
Stanislav Shwartsman
4444dc095b Fixed SIGSEGV in 8cpu configuration 2005-04-23 17:52:51 +00:00
Stanislav Shwartsman
fd02a03516 Fixed broadcast mode 2005-04-16 15:55:00 +00:00
Stanislav Shwartsman
1755589376 Separate pageWriteStamp from ICACHE. The pageWriteStamp has totally independant structure and could be used in future with icache structure. Also it could be significantly speeded up using BX_SMF analog constructions. 2005-04-10 19:42:48 +00:00
Stanislav Shwartsman
6fd9f82c35 Fixed typo in apic.cc
Small speedup for arith64.cc (redundant modC0() call ellimination)
Cleanup
2005-04-02 18:49:44 +00:00
Stanislav Shwartsman
c3fd89eceb More accurate fix for cpu_online_map ellimination 2005-03-20 18:33:02 +00:00
Stanislav Shwartsman
3074078297 Added CVS version header to all the files.
One more small change in APIC
2005-03-19 20:44:01 +00:00
Stanislav Shwartsman
f77ddd9701 Remove cpu_onlline_map varaible, it wasn't initialized properly and might cause APIC problems 2005-03-19 18:43:00 +00:00
Stanislav Shwartsman
f483bcfd70 Fixed possible memory corruption in case of wrong size APIC read (used by WinNT MP)
Compiler compitability fixes (use 0 and 1 instead of true and false)
2005-02-25 20:53:14 +00:00
Stanislav Shwartsman
ef197b2a56 Fixed compilation error in paging.cc
Some fixed for APIC in P4 processor
APIC patch by mrieker cleaned even more
2005-02-23 21:18:24 +00:00
Stanislav Shwartsman
e7e149d21a Changed PANIC message to ERROR message. This should fix an error message reported in Bug Tracker - PANIC after Reset button is pushed. 2005-02-13 18:36:52 +00:00
Stanislav Shwartsman
c1284af614 Removed already obsolete patch.smp-pge-pic-poll
Small cleanup in apic.cc/apic.h
I would like to test patch.apic-mrieker so I need more clean apic code
2005-02-08 18:41:33 +00:00
Stanislav Shwartsman
3fdbf48a69 Fixed bug in interrupt function in real mode
Style change
Update CHANGES
Remove patch.v8086-exception.lightcone because it already in CVS
2005-02-01 21:17:57 +00:00
Stanislav Shwartsman
3cd646004f Fixed bug "1101168 APIC base address change" 2005-01-13 19:03:40 +00:00
Stanislav Shwartsman
5955549a8d Fixed bug report [#879050]
Bochs reports enabled APIC without support
2004-12-14 20:41:55 +00:00
Stanislav Shwartsman
1a6656ce91 Fixed compilation warnings (g++, -Wall)
Improve speed and precision of FPATAN FPU instruction
2004-11-04 22:41:24 +00:00
Stanislav Shwartsman
75e0c5b421 Little speed optimizations in cpu_loop function
change apic classes to more c++ friendly
2004-10-16 19:34:17 +00:00
Stanislav Shwartsman
80ee150d83 Imlemented CR8 register for X86-64 mode 2004-10-13 20:58:16 +00:00
Stanislav Shwartsman
bbd55fe16f Merge and commit patch.apic-zwane from CVS patches directory.
the patch release notes by Zwane:

o Define symbols for constants like
o APIC arbitration
o Processor priority
o Various interrupt delivery fixes
o Focus processor checking
o ExtINT delivery

I need to release this now so that i don't fall too far behind CVS, when
it was part of the bochs-smp patch it could boot 2.4.18 4way. Apologies
for the whitespace changes.


Also remove patch.apic-ppr-zwane patch because it already included in
patch.apic-zwane.

I hope it will help to boot x86-64 or cmp systems required missed APIC
features !
2004-09-15 21:48:57 +00:00
Christophe Bothamy
45bd1edfbf - apply patch #894595 MSR_APICBASE always returns APIC ADDRESS 0
by Kangmo Kim
2004-02-12 00:56:21 +00:00
Christophe Bothamy
77e33ccf26 - fix a "too many arguments for format" warning 2003-01-22 21:43:34 +00:00
Bryce Denney
90d711e5d1 - add missing break stmts, pointed out by Shai Fultheim 2002-12-22 15:15:56 +00:00
Bryce Denney
9a204569b7 - patch from Zwane on December 9. He writes:
> It's safe to deliver ExtINT as Fixed in our setup and just leave a comment
  > there instead of the panic.
2002-12-14 08:48:20 +00:00
Bryce Denney
97f911d1fe - when VC++ sees local variables in a for statement, it doesn't think
that they go out of scope at the end, so it complains about duplicate
  definitions.
2002-11-19 05:51:52 +00:00
Bryce Denney
0a7cb3a43c - apply patch.ifdef-disabled-options. Comments from that patch are below:
For a whole lot of configure options, I put #if...#endif around code that
  is specific to the option, even in files which are normally only compiled
  when the option is on.  This allows me to create a MS Visual C++ 6.0
  workspace that supports many of these options.  The workspace will basically
  compile every file all the time, but the code for disabled options will
  be commented out by the #if...#endif.

  This may one day lead to simplification of the Makefiles and configure
  scripts, but for the moment I'm leaving Makefiles and configure scripts
  alone.

  Affected options:
    BX_SUPPORT_APIC (cpu/apic.cc)
    BX_SUPPORT_X86_64 (cpu/*64.cc)
    BX_DEBUGGER (debug/*)
    BX_DISASM (disasm/*)
    BX_WITH_nameofgui (gui/*)
    BX_SUPPORT_CDROM (iodev/cdrom.cc)
    BX_NE2K_SUPPORT (iodev/eth*.cc, iodev/ne2k.cc)
    BX_SUPPORT_APIC (iodev/ioapic.cc)
    BX_IODEBUG_SUPPORT (iodev/iodebug.cc)
    BX_PCI_SUPPORT (iodev/pci*.cc)
    BX_SUPPORT_SB16 (iodev/sb*.cc)

Modified Files:
  cpu/apic.cc cpu/arith64.cc cpu/ctrl_xfer64.cc
  cpu/data_xfer64.cc cpu/fetchdecode64.cc cpu/logical64.cc
  cpu/mult64.cc cpu/resolve64.cc cpu/shift64.cc cpu/stack64.cc
  debug/Makefile.in debug/crc.cc debug/dbg_main.cc debug/lexer.l
  debug/linux.cc debug/parser.c debug/parser.y
  disasm/dis_decode.cc disasm/dis_groups.cc gui/amigaos.cc
  gui/beos.cc gui/carbon.cc gui/macintosh.cc gui/rfb.cc
  gui/sdl.cc gui/term.cc gui/win32.cc gui/wx.cc gui/wxdialog.cc
  gui/wxmain.cc gui/x.cc iodev/cdrom.cc iodev/eth.cc
  iodev/eth_arpback.cc iodev/eth_fbsd.cc iodev/eth_linux.cc
  iodev/eth_null.cc iodev/eth_packetmaker.cc iodev/eth_tap.cc
  iodev/eth_tuntap.cc iodev/eth_win32.cc iodev/ioapic.cc
  iodev/iodebug.cc iodev/ne2k.cc iodev/pci.cc iodev/pci2isa.cc
  iodev/sb16.cc iodev/soundlnx.cc iodev/soundwin.cc
2002-11-19 05:47:45 +00:00
Bryce Denney
cec9135e9f - Apply patch.replace-Boolean rev 1.3. Every "Boolean" is now changed to a
"bx_bool" which is always defined as Bit32u on all platforms.  In Carbon
  specific code, Boolean is still used because the Carbon header files
  define it to unsigned char.
- this fixes bug [ 623152 ] MacOSX: Triple Exception Booting win95.
  The bug was that some code in Bochs depends on Boolean to be a
  32 bit value.  (This should be fixed, but I don't know all the places
  where it needs to be fixed yet.)  Because Carbon defined Boolean as
  an unsigned char, Bochs just followed along and used the unsigned char
  definition to avoid compile problems.  This exposed the dependency
  on 32 bit Boolean on MacOS X only and led to major simulation problems,
  that could only be reproduced and debugged on that platform.
- On the mailing list we debated whether to make all Booleans into "bool" or
  our own type.  I chose bx_bool for several reasons.
  1. Unlike C++'s bool, we can guarantee that bx_bool is the same size on all
     platforms, which makes it much less likely to have more platform-specific
     simulation differences in the future.  (I spent hours on a borrowed
     MacOSX machine chasing bug 618388 before discovering that different sized
     Booleans were the problem, and I don't want to repeat that.)
  2. We still have at least one dependency on 32 bit Booleans which must be
     fixed some time, but I don't want to risk introducing new bugs into the
     simulation just before the 2.0 release.

Modified Files:
    bochs.h config.h.in gdbstub.cc logio.cc main.cc pc_system.cc
    pc_system.h plugin.cc plugin.h bios/rombios.c cpu/apic.cc
    cpu/arith16.cc cpu/arith32.cc cpu/arith64.cc cpu/arith8.cc
    cpu/cpu.cc cpu/cpu.h cpu/ctrl_xfer16.cc cpu/ctrl_xfer32.cc
    cpu/ctrl_xfer64.cc cpu/data_xfer16.cc cpu/data_xfer32.cc
    cpu/data_xfer64.cc cpu/debugstuff.cc cpu/exception.cc
    cpu/fetchdecode.cc cpu/flag_ctrl_pro.cc cpu/init.cc
    cpu/io_pro.cc cpu/lazy_flags.cc cpu/lazy_flags.h cpu/mult16.cc
    cpu/mult32.cc cpu/mult64.cc cpu/mult8.cc cpu/paging.cc
    cpu/proc_ctrl.cc cpu/segment_ctrl_pro.cc cpu/stack_pro.cc
    cpu/tasking.cc debug/dbg_main.cc debug/debug.h debug/sim2.cc
    disasm/dis_decode.cc disasm/disasm.h doc/docbook/Makefile
    docs-html/cosimulation.html fpu/wmFPUemu_glue.cc
    gui/amigaos.cc gui/beos.cc gui/carbon.cc gui/gui.cc gui/gui.h
    gui/keymap.cc gui/keymap.h gui/macintosh.cc gui/nogui.cc
    gui/rfb.cc gui/sdl.cc gui/siminterface.cc gui/siminterface.h
    gui/term.cc gui/win32.cc gui/wx.cc gui/wxmain.cc gui/wxmain.h
    gui/x.cc instrument/example0/instrument.cc
    instrument/example0/instrument.h
    instrument/example1/instrument.cc
    instrument/example1/instrument.h
    instrument/stubs/instrument.cc instrument/stubs/instrument.h
    iodev/cdrom.cc iodev/cdrom.h iodev/cdrom_osx.cc iodev/cmos.cc
    iodev/devices.cc iodev/dma.cc iodev/dma.h iodev/eth_arpback.cc
    iodev/eth_packetmaker.cc iodev/eth_packetmaker.h
    iodev/floppy.cc iodev/floppy.h iodev/guest2host.h
    iodev/harddrv.cc iodev/harddrv.h iodev/ioapic.cc
    iodev/ioapic.h iodev/iodebug.cc iodev/iodev.h
    iodev/keyboard.cc iodev/keyboard.h iodev/ne2k.h
    iodev/parallel.h iodev/pci.cc iodev/pci.h iodev/pic.h
    iodev/pit.cc iodev/pit.h iodev/pit_wrap.cc iodev/pit_wrap.h
    iodev/sb16.cc iodev/sb16.h iodev/serial.cc iodev/serial.h
    iodev/vga.cc iodev/vga.h memory/memory.h memory/misc_mem.cc
2002-10-25 11:44:41 +00:00
Bryce Denney
5e520261db Add plugin support to Bochs by merging all the changes from the
BRANCH_PLUGINS branch!

Authors:
  Bryce Denney
  Christophe Bothamy
  Kevin Lawton (we grabbed a lot of plugin code from plex86)
Testing help from:
  Volker Ruppert
  Don Becker (Psyon)
  Jeremy Parsons (Br'fin)

The change log is too long to paste in here.  To read the change log, do
  cvs log patches/patch.final-from-BRANCH_PLUGINS.gz

All the changes and a detailed description are contained in a patch
called patch.final-from-BRANCH_PLUGINS.gz.  To look at the complete
patch, do
  cvs upd -r1.1 patches/patch.final-from-BRANCH_PLUGINS.gz

Then you will have a local copy of the patch, which you can gunzip and
play with however you want.

Modified Files:
    .bochsrc Makefile.in aclocal.m4 bochs.h config.h.in configure
    configure.in gdbstub.cc logio.cc main.cc pc_system.cc
    pc_system.h state_file.h bios/Makefile.in bios/rombios.c
    cpu/Makefile.in cpu/access.cc cpu/apic.cc cpu/arith16.cc
    cpu/arith32.cc cpu/arith8.cc cpu/cpu.cc cpu/cpu.h
    cpu/ctrl_xfer32.cc cpu/exception.cc cpu/fetchdecode.cc
    cpu/fetchdecode64.cc cpu/flag_ctrl.cc cpu/flag_ctrl_pro.cc
    cpu/init.cc cpu/io.cc cpu/logical16.cc cpu/logical32.cc
    cpu/logical8.cc cpu/paging.cc cpu/proc_ctrl.cc
    cpu/protect_ctrl.cc cpu/segment_ctrl_pro.cc cpu/shift16.cc
    cpu/shift32.cc cpu/stack64.cc cpu/string.cc cpu/tasking.cc
    debug/Makefile.in debug/dbg_main.cc disasm/Makefile.in
    doc/docbook/user/user.dbk dynamic/Makefile.in fpu/Makefile.in
    gui/Makefile.in gui/amigaos.cc gui/beos.cc gui/carbon.cc
    gui/control.cc gui/control.h gui/gui.cc gui/gui.h
    gui/keymap.cc gui/keymap.h gui/macintosh.cc gui/nogui.cc
    gui/rfb.cc gui/sdl.cc gui/sdlkeys.h gui/siminterface.cc
    gui/siminterface.h gui/term.cc gui/win32.cc gui/wx.cc
    gui/wxdialog.cc gui/wxdialog.h gui/wxmain.cc gui/wxmain.h
    gui/x.cc gui/keymaps/sdl-pc-de.map gui/keymaps/sdl-pc-us.map
    gui/keymaps/x11-pc-de.map instrument/example0/instrument.h
    instrument/example1/instrument.h
    instrument/stubs/instrument.cc instrument/stubs/instrument.h
    iodev/Makefile.in iodev/biosdev.cc iodev/biosdev.h
    iodev/cdrom.cc iodev/cmos.cc iodev/cmos.h iodev/devices.cc
    iodev/dma.cc iodev/dma.h iodev/eth_fbsd.cc iodev/eth_linux.cc
    iodev/eth_null.cc iodev/eth_tap.cc iodev/floppy.cc
    iodev/floppy.h iodev/guest2host.cc iodev/guest2host.h
    iodev/harddrv.cc iodev/harddrv.h iodev/iodebug.cc
    iodev/iodebug.h iodev/iodev.h iodev/keyboard.cc
    iodev/keyboard.h iodev/ne2k.cc iodev/ne2k.h iodev/parallel.cc
    iodev/parallel.h iodev/pci.cc iodev/pci.h iodev/pci2isa.cc
    iodev/pci2isa.h iodev/pic.cc iodev/pic.h iodev/pit.cc
    iodev/pit.h iodev/pit_wrap.cc iodev/pit_wrap.h iodev/sb16.cc
    iodev/sb16.h iodev/scancodes.cc iodev/scancodes.h
    iodev/serial.cc iodev/serial.h iodev/slowdown_timer.cc
    iodev/slowdown_timer.h iodev/unmapped.cc iodev/unmapped.h
    iodev/vga.cc iodev/vga.h memory/Makefile.in memory/memory.cc
    memory/memory.h memory/misc_mem.cc misc/bximage.c
    misc/niclist.c
Added Files:
    README-plugins extplugin.h ltdl.c ltdl.h ltdlconf.h.in
    ltmain.sh plugin.cc plugin.h
2002-10-24 21:07:56 +00:00
Peter Tattam
db0a37824c Fixed elusive APIC interrupt problems when bochs compiled for P6 or later.
Symptom:  Linux kernel 2.4.19 would hang in random places.  CPU still
running, but in dle loop.

Cause: if APIC interrupt occurred while a PIC interrupt was pending, the
PIC interrupt would be lost.  This is because either an APIC or PIC
interrupt would trash any pending interrupt event because INTR is only a state,
not an event queue.

Temporary fix: reworked apic.cc to have it's own copy of INTR state. cpu.cc now
checks for both cpu.INTR and local_apic.INTR.

Need to do further research to see if local_apic and pic can be integrated in such
a way as properly manage the combined effects of both devices accessing INTR state.
2002-10-05 10:25:31 +00:00
Kevin Lawton
66452e9898 Replaced tabs in cpu/*.{cc,h} files with spaces. 2002-10-04 17:04:33 +00:00