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110 Commits

Author SHA1 Message Date
Stanislav Shwartsman
744001e35e Implemented VMX APIC Registers Virtualization and VMX Virtual Interrupt Delivery emulation 
Bugfix: VMX: VmEntry should do TPR Virtualization (TPR Shadow + APIC Access Virtualization case is affected) and even could possibly cause TPR Threshold VMEXIT
 2012-10-26 18:43:53 +00:00
Stanislav Shwartsman
f69bc016d2 vmx: nmi blocking after NMI event injection. better dbg print for VMEXIT 2012-10-04 16:15:58 +00:00
Stanislav Shwartsman
2f3c7ff8e4 implemented SMAP (Supervisor Mode Access Protection) from [Intel Architecture Instruction Set Extensions Programming Reference] rev14 
fixed enabling of ADX extensions in generic CPUID when enabled through .bochsrc

Small code cleanups on the way to implementation of APIC Registers Virtualization features disclosed in recent Intel SDM rev043
 2012-09-10 15:22:26 +00:00
Stanislav Shwartsman
86a06ff9f6 more new vmx defines 2012-08-31 15:38:28 +00:00
Stanislav Shwartsman
2a459fb9be add more disclosed VMCS fields and vmexit codes to enums (from rev44 published today) 2012-08-31 09:25:13 +00:00
Stanislav Shwartsman
bafde35c9c Intel Architecture 
Instruction Set Extensions
Programming Reference
rev013

was published including RDSEED and ADCX/ADOX instructions

add CPUID bits and VMX controls mentioned in the document
 2012-07-11 18:58:00 +00:00
Stanislav Shwartsman
f528290652 fixed bug EPT Access Dirty support 2012-05-27 19:17:13 +00:00
Stanislav Shwartsman
39c14ef0d1 Implemented EPT A/D extensions support. 
Bochs is fully aligned with the latest published revision of
Intel Architecture Manual (revision 043) now.
 2012-05-02 18:11:39 +00:00
Stanislav Shwartsman
f5d55f5eb6 - Implemented Task Switch intercept in SVM, cleanup in task switch handling code 
- Changed (c) year in several cpu files
- Cleanup and indent fixes in VMX code
 2012-01-11 20:21:29 +00:00
Stanislav Shwartsman
9be8552b80 - Implemented VM Functions support and EPTP-Switching VM Functions 
- Added VMEXIT conditions for INVPCID instruction

Now Bochs is fully aligned with latest pulished Intel's SDM rev040.
 2011-11-05 07:31:51 +00:00
Stanislav Shwartsman
8ada4ce5e4 added to cpudb: Intel(R) Core(TM) i5 M 520 (Arrandale) - based on Westmere arch 2011-10-07 19:32:44 +00:00
Stanislav Shwartsman
0547c8823e compilation w/o x86-64 2011-09-26 19:48:58 +00:00
Stanislav Shwartsman
12ad45395b enable Penryn VMX capabilities with VMX=1, VMX=2 is required for EPT and heavier stuff 2011-09-26 19:36:20 +00:00
Stanislav Shwartsman
0aadf88c07 more polishing for vmx configurability 2011-09-26 18:08:31 +00:00
Stanislav Shwartsman
c28c7f6a06 Supply real VMX capabilities together with the CPU MODEL .bochsrc option. 
So now the same single option will choose not only the CPUID flags but also VMX capabilities matching real HW machine.

Removed cpuid of core2_extreme_x9770 from the cpudb. I don't remember its VMX capabilities anyway.
There is another Penryn model in the cpudb - core2_penryn_t9600.
 2011-09-26 12:31:40 +00:00
Stanislav Shwartsman
8d95830562 first step to configuration of VMX through cpuid_t class 2011-09-25 19:04:55 +00:00
Stanislav Shwartsman
1b27438146 cleanups + small code reorg 2011-08-10 20:31:29 +00:00
Stanislav Shwartsman
0171324877 small favor to VMX OFF for code that compiled with VMX ON 
avoid function call when not in vmx guest.
 2011-08-09 20:50:51 +00:00
Stanislav Shwartsman
e48765a511 VMX fixed, cleanups 2011-07-29 20:22:35 +00:00
Stanislav Shwartsman
1e2c7de064 register state for pause-loop exiting 2011-07-22 09:28:31 +00:00
Stanislav Shwartsman
9c3a4b8dab impemented pause-loop exiting VMX2 control 2011-07-22 09:19:35 +00:00
Stanislav Shwartsman
002c86660a reword all the CPU code in preparation for future CPU speedup implementation. 
Bochs emulation can be another 10-15% faster using technique described in paper
"Fast Microcode Interpretation with Transactional Commit/Abort"
http://amas-bt.cs.virginia.edu/2011proceedings/amasbt2011-p3.pdf
 2011-07-06 20:01:18 +00:00
Stanislav Shwartsman
909e750549 Implemented VMX preemption timer VMEXIT control (patch by Jianan Hao) 2011-07-03 15:59:48 +00:00
Stanislav Shwartsman
31be835056 bugfix + rename function 2011-06-14 19:56:28 +00:00
Volker Ruppert
c78026a9a2 - deleted executable properties from source files 2011-04-03 10:29:19 +00:00
Stanislav Shwartsman
acd320699d small cleanups 2011-03-14 06:25:54 +00:00
Stanislav Shwartsman
7d80a6ebe0 Adding Id and Rev property to all files 2011-02-24 21:54:04 +00:00
Stanislav Shwartsman
d60b7c0919 rename accessor for opcodeReg() in instruction 2010-12-06 21:45:56 +00:00
Stanislav Shwartsman
e6981218dc next step for fully configurable CPU + more optimal VMX execution 
- check at startup time which VMX fields are accessible
- next step: simplify VMREAD and VMWRITE instructions - eliminate switch statements
 2010-11-11 21:41:03 +00:00
Stanislav Shwartsman
ca95477b7f Implement x86-64 PCID extension 2010-04-29 19:34:32 +00:00
Stanislav Shwartsman
1c2fa8cd0c move 1G_pages support to runtime option 2010-04-24 09:36:04 +00:00
Stanislav Shwartsman
955e237e46 unrestricted guests support (VMXx2) 2010-04-09 11:31:55 +00:00
Stanislav Shwartsman
6e1204cb84 Merged X2APIC + X2APIC virtualization 2010-04-08 15:50:39 +00:00
Stanislav Shwartsman
df7db31fb4 EPT + VPID - VMXx2 support 2010-04-07 17:12:17 +00:00
Stanislav Shwartsman
aea9f50b4a implemented Descriptor Table exiting control 2010-04-04 19:23:47 +00:00
Stanislav Shwartsman
9cece96d14 fixes 2010-04-04 18:46:03 +00:00
Stanislav Shwartsman
7c42447c77 move secondary VMEXEC controls to -enable-vmx=2 option 
EPT coming next
 2010-04-03 07:30:23 +00:00
Stanislav Shwartsman
d39d485ece changes variable name to better one 2010-04-03 05:59:07 +00:00
Stanislav Shwartsman
929ea0e071 update VMX msrs + bugfix in VMENTRY capabilities MSR 2010-04-01 21:32:25 +00:00
Stanislav Shwartsman
a625abaaf0 small fixes 2010-04-01 20:08:57 +00:00
Stanislav Shwartsman
3a2fbd0aae VMREAD for APIC virtualization 2010-04-01 11:43:45 +00:00
Stanislav Shwartsman
2f01469007 fix 2010-03-27 10:42:43 +00:00
Stanislav Shwartsman
e7933d9dc2 enable EFER_MSR VMX controls 2010-03-27 09:27:40 +00:00
Stanislav Shwartsman
dc732f21bc MSR_PAT VMX support 2010-03-26 21:26:08 +00:00
Stanislav Shwartsman
a220edc5bb compile fixes 2010-03-26 11:09:12 +00:00
Stanislav Shwartsman
79466dffe2 apic virtualization + vmx fixes 2010-03-16 14:51:20 +00:00
Stanislav Shwartsman
514a375cc5 fix 2010-03-15 15:49:55 +00:00
Stanislav Shwartsman
f0ac7c576e enable secondary proc-based ctrls 2010-03-15 15:48:01 +00:00
Stanislav Shwartsman
77b4c671b2 optimization 2010-03-15 13:57:12 +00:00
Stanislav Shwartsman
3b3b920795 vmx updates 2010-03-15 13:47:18 +00:00
Stanislav Shwartsman
97b4155f31 VMX_MSR_MISC implemented 2010-03-12 21:20:42 +00:00
Stanislav Shwartsman
5d2c2879a7 IA32_FEATURE_CONTROL_MSR is implemented 2010-03-06 16:59:05 +00:00
Stanislav Shwartsman
eb13ccdb10 extra vmexit info for ins/outs 2010-02-11 14:19:11 +00:00
Stanislav Shwartsman
7254ea36a1 copyright fixes + small optimization 2009-10-14 20:45:29 +00:00
Stanislav Shwartsman
733491871d copy/paste typo fix 2009-06-15 15:10:05 +00:00
Stanislav Shwartsman
222129db4b Rewritten long mode page walk - large code cleanup and few bugfixes 2009-05-30 15:09:38 +00:00
Stanislav Shwartsman
3d7bbf4356 fixed VMXON pointer concept 2009-05-28 08:26:17 +00:00
Stanislav Shwartsman
9e092a86c3 merge "system" and "segment" blocks of descriptor 2009-04-05 19:09:44 +00:00
Stanislav Shwartsman
592484408f Initial NMI virtualization for VMX, clean out CPU pins set/clear code 2009-02-03 19:17:15 +00:00
Stanislav Shwartsman
f8185a6bc6 Added Intel VMX emulation to Bochs CPU 2009-01-31 10:43:24 +00:00