Commit Graph

72 Commits

Author SHA1 Message Date
Stanislav Shwartsman
5213e903bd mov duplicate opcode groups from fectchdecode*.cc to .h
use common register accessor macroses instead of direct register file structure access
2004-11-26 20:21:28 +00:00
Stanislav Shwartsman
69c0b06955 fixes in disassembler
split REPEAT instructions according to opsize to speedup execution
now each REPEATABLE instruction splitted to 3 different instructions, one for 16-bit operand size, one for 32-bit and one for 64-bit. Choosing of correct instruction occure in fetchdecode step.
2004-11-20 23:26:32 +00:00
Stanislav Shwartsman
08810d54c4 Fix fetchdecode for FPU instructions when FPU is not present 2004-11-12 16:47:35 +00:00
Stanislav Shwartsman
4f1f070c37 Fix comments for code 2004-10-08 19:29:04 +00:00
Stanislav Shwartsman
760a195c9d * Fix LOCK prefix handling for x86-64
* Split BT*_EvGv functions to 3 different function according to exec mode
2004-09-17 20:47:19 +00:00
Stanislav Shwartsman
fc631037ff remove obsolete comments from fetchdecode 2004-09-06 20:22:39 +00:00
Stanislav Shwartsman
77b3886f8b Cleanup and optimize 2004-08-28 08:41:46 +00:00
Stanislav Shwartsman
4eea772270 LOADALL for cpu-level=2 in fetchdecode 2004-05-11 16:44:58 +00:00
Stanislav Shwartsman
3274e0dd12 Commit patch
[ 950905 ] Do not PANIC on rare, bad input from user-mode
by h.johansson
with little changes and fixes
2004-05-10 21:05:51 +00:00
Stanislav Shwartsman
279d207d45 Fix fetchdecode bugs reported by Gilbert Netzer
(opcode patches for x86_64 cpu)
2004-05-03 17:58:36 +00:00
Stanislav Shwartsman
cf6d1b8bd9 port some changes from spftfloat-fpu branch to the MT 2004-04-09 15:34:59 +00:00
Stanislav Shwartsman
0eb71999db Added missed 287 opcodes which should be executed as NOP in 387+ 2003-12-28 18:19:41 +00:00
Stanislav Shwartsman
9ccb363ec3 bochs style decode/execute of FPU instructions.
With this coding style each instruction could be implemented separatelly even not together with current Bochs FPU emulator.
Step-by-step I am going to transfer all FPU instructions from current Bochs FPU emulator to new style and remove an old bugged emulator.
Anyway, now I could implement all currently missed FPU instructions without hacking wm-fpu-emu.
2003-12-27 13:50:06 +00:00
Stanislav Shwartsman
ac20b6405a - FXSAVE/FXRSTOR instructions should be available in P6 mode
- Added second UD2 opcode to fetchdecode
- Added RDPMC instruction to fetchdecode
- 'changes' updated
2003-10-24 18:34:16 +00:00
Stanislav Shwartsman
7f570b0150 Added PNI new streaming extensions instructions
PNI could be enabled by setting BX_SUPPORT_PNI in config.h
After the feature will be fully validation I'll also add configure option.

The implemntation is ~complete. I've missed only three FPU new opcodes of FUSTTP instruction and MONITOR/WAIT instructions.

Enjoy ! ;)
2003-08-29 21:20:52 +00:00
Stanislav Shwartsman
254ad17328 Changes method of resolving opcode/attributes from group table
New method more flexible and easy to understanding.
Reorganizing fetchdecode code and make it more easy and understandable
2003-08-28 19:25:23 +00:00
Stanislav Shwartsman
6aa0a62fe7 Optimizing fetchdecode 2003-08-15 13:08:24 +00:00
Stanislav Shwartsman
96984cb6cb Added missed fetchdecode table entry for SYSENTER/SYSEXIT 2003-06-20 08:58:12 +00:00
Stanislav Shwartsman
58efdfb31f An illegal lock prefix was not checked for instructions without any attributes (i.e. without immediate, modrm or any other additional bytes except prefixes). 2003-06-12 17:01:37 +00:00
Stanislav Shwartsman
3c00944998 I hope this is the last one ... 2003-05-29 19:44:59 +00:00
Stanislav Shwartsman
f933d604d3 Fixed missed BxLockable for XCHG instruction 2003-05-29 17:15:08 +00:00
Stanislav Shwartsman
1d45167e5b Merged NEW-INSTRUCTIONS branch 2003-05-15 16:41:17 +00:00
Volker Ruppert
79b811f23f - fixed warnings in these files:
cpu/fetchdecode.cc
  cpu/mmx.cc
  cpu/proc_ctrl.cc
  iodev/virt_timer.cc
  plugin.cc
2003-05-02 12:22:48 +00:00
Stanislav Shwartsman
446fca9ed0 Superfluous braces in initializers in fetchdecode.cc 2003-04-23 17:52:59 +00:00
Stanislav Shwartsman
40bd4f138b Little style changes
Elliminated i387_t alimit field (not used in FPU)
2003-04-16 18:38:53 +00:00
Stanislav Shwartsman
7db893970c Read attributes bits even for BxSplit11b opcodes
Move lock prefix check later in fetchdecode function when all attributes is ready.
2003-04-06 19:08:31 +00:00
Stanislav Shwartsman
1e71c9e56e Merged patch-unallowed-lock-cases patch.
According to the Intel manuals:

  The  LOCK  prefix  can be prepended only to the following instructions
  and  only  to  those  forms  of the instructions where the destination
  operand  is  a  memory operand: ADD, ADC, AND, BTC, BTR, BTS, CMPXCHG,
  CMPXCH8B,  DEC,  INC,  NEG, NOT, OR, SBB, SUB, XOR, XADD, and XCHG. If
  the  LOCK prefix is used with one of these instructions and the source
  operand  is a memory operand, an undefined opcode exception (#UD) will
  be  generated. An undefined opcode exception will also be generated if
  the  LOCK  prefix  is used with any instruction not in the above list.

 Checking of the LOCK prefix done in fetchDecode state and not overloads
 Bochs's execution.
2003-04-05 12:16:53 +00:00
Christophe Bothamy
1a518b81fe - add __attribute__((regparm(X))) performance trick with gcc on x86
on some cpu instructions (patch from Conn Clark)
- performance improvement is 1% on win95 boot
2003-03-17 00:41:01 +00:00
Stanislav Shwartsman
cdfc3cbce4 instrumentation enchancements:
* renamed CPU_ID to BX_CPU_ID.
  with this new name there is no possibility for name contentions and BX_CPU_ID
  definition could be moved out to NEED_CPU_REG_SHORTCUTS block

* returned back `unsigned BX_CPU::which_cpu(void)` function

* added BX_CPU_ID parameter for
	BX_INSTR_PHY_READ(a20addr, len);
	BX_INSTR_PHY_WRITE(a20addr, len);
    now it will be
	BX_INSTR_PHY_READ(cpu_id, a20addr, len);
	BX_INSTR_PHY_WRITE(cpu_id, a20addr, len);
2003-02-13 15:04:11 +00:00
Christophe Bothamy
c6abf1d0d1 - fix old #if BX_SUPPORT_SYSENTEREXIT found by Stanislav. The sysenter/exit code was not called at all! 2003-01-20 21:30:00 +00:00
Christophe Bothamy
939b558fdf - apply patch.sysenterexit-mrieker:
- adds sysenter/sysexit support for cpu-level>=6
  - enabled by ./configure --enable-sep
2003-01-20 20:10:31 +00:00
Stanislav Shwartsman
4b59ecbc62 Implemented SSE/SSE2 duplicate opcodes in more intellegent way ... 2002-12-22 21:48:23 +00:00
Stanislav Shwartsman
e73df72525 implementation of additional SSE/SSE2 instructions 2002-12-22 20:42:56 +00:00
Stanislav Shwartsman
4906ffef7c Clean Peter's commit with MOVNTDQ instruction implementation 2002-12-20 09:11:39 +00:00
Bryce Denney
9b2914fd1d - Temporarily revert Stanislav's changes between 2002-12-18 and 2002-12-19.
Because source files were added/removed it would require an update
  of the windows and macos project files, so I want to wait until after 2.0.
    M Makefile.in         1.51 back to 1.50
    M cpu.h               1.121 back to 1.120
    M fetchdecode.cc      1.37 back to 1.36
    M fetchdecode64.cc    1.33 back to 1.32
    M sse.cc              1.17 back to 1.16
    A sse2.cc             1.27 back to 1.26  (added back)
    R sse_move.cc         removed
    R sse_pfp.cc          removed
- to bring these changes back again, all we have to do is
  "cvs update -j tmp-before1 -j tmp-after1"
2002-12-19 05:53:18 +00:00
Stanislav Shwartsman
aa361badf2 Reorganized SSE/SSE2 code
sse.cc -> general SSE stuff and SSE integer (MMX extensions)
sse_move.cc -> memory transfer and shuffle opcodes
sse_pfp.cc -> packed floating point operations
2002-12-18 22:33:44 +00:00
Stanislav Shwartsman
bcd57bdcaf *** Current duplicate SSE/SSE2 instructions list ***
MOVUPS_VpsWps  (0f 10) = MOVUPD_VpdWpd  (66 0f 10) = MOVDQU_VdqWdq (f3 0f 6f)
MOVUPS_WpsVps  (0f 11) = MOVUPD_WpdVpd  (66 0f 11) = MOVDQU_WdqVdq (f3 0f 7f)
MOVAPS_VpsWps  (0f 28) = MOVAPD_VpdWpd  (66 0f 28) = MOVDQA_VdqWdq (66 0f 6f)
MOVAPS_WpsVps  (0f 29) = MOVAPD_WpdVpd  (66 0f 29) = MOVDQA_WdqVdq (66 0f 7f)

MOVNTPS_MdqVps (0f 2b) = MOVNTPD_MdqVpd (66 0f 2b)
MOVLPS_VpsMq   (0f 12) = MOVLPD_VsdMq   (66 0f 12)
MOVLPS_MqVps   (0f 13) = MOVLPD_MqVsd   (66 0f 13)
MOVHPS_VpsMq   (0f 16) = MOVHPD_VpdMq   (66 0f 16)
MOVHPS_MqVps   (0f 17) = MOVHPD_MqVpd   (66 0f 17)

ANDPS_VpsWps   (0f 54) = ANDPD_VpdWpd   (66 0f 54) = PAND_VpdWpd   (66 0f db)
ANDNPS_VpsWps  (0f 55) = ANDNPD_VpdWpd  (66 0f 55) = PANDN_VpdWpd  (66 0f df)
ORPS_VpsWps    (0f 56) = ORPD_VpdWpd    (66 0f 56) = POR_VpdWpd    (66 0f eb)
XORPS_VpsWps   (0f 57) = XORPD_VpdWpd   (66 0f 57) = PXOR_VpdWpd   (66 0f ef)

Removed dupes
2002-11-25 21:58:55 +00:00
Stanislav Shwartsman
121de7d960 Fixed bug with decoding of Group15 2002-11-15 13:05:19 +00:00
Stanislav Shwartsman
ccbc8e0ef7 MOVAPS/MOVAPD have a different exceptions 2002-11-15 12:44:39 +00:00
Stanislav Shwartsman
7ccf1de78f According to the Intel (and AMD) manuals a lot different SSE/SSE2 opcodes has EXACTLY the same operation.
Deleted first three redundant opcodes (move integer data):
   MOVLPS_VpsMq   (0f 12) = MOVLPD_VsdMq   (66 0f 12)
   MOVLPS_MqVps   (0f 13) = MOVLPD_MqVsd   (66 0f 13)
   MOVHPS_VpsMq   (0f 16) = MOVHPD_VpdMq   (66 0f 16)
   MOVHPS_MqVps   (0f 17) = MOVHPD_MqVpd   (66 0f 17)

Until under examination:
XORPS,XORPD
ORPS,ORPD
ANDPS,ANDPD
ANDNPS,ANDNPD
MOVUPS,MOVUPD
2002-11-13 22:24:03 +00:00
Stanislav Shwartsman
968b2744f4 According to the Intel (and AMD) manuals a lot different SSE/SSE2 opcodes
has EXACTLY the same operation.

Deleted first three redundant opcodes:
   MOVAPS_VpsWps  (0f 28) = MOVAPD_VpdWpd  (66 0f 28)
   MOVAPS_WpsVps  (0f 29) = MOVAPD_WpdVpd  (66 0f 29)
   MOVNTPS_MdqVps (0f 2b) = MOVNTPD_MdqVpd (66 0f 2b)

Until checking:
XORPS,XORPD
ORPS,ORPD
ANDPS,ANDPD
ANDNPS,ANDNPD
MOVUPS,MOVUPD
MOVLPS,MOVLPD
MOVHPS,MOVHPD
2002-11-13 21:35:17 +00:00
Stanislav Shwartsman
4363745725 Implemented SSE2 integer instructions:
PACKSSDW_VdqWdq
PUNPCKHDQ_VdqWq
PUNPCKHWD_VdqWq
PUNPCKHBW_VdqWq
PUNPCKHQDQ_VdqWq
MOVD_EdVd
MOVD_VdqEd
2002-11-08 12:47:24 +00:00
Bryce Denney
cec9135e9f - Apply patch.replace-Boolean rev 1.3. Every "Boolean" is now changed to a
"bx_bool" which is always defined as Bit32u on all platforms.  In Carbon
  specific code, Boolean is still used because the Carbon header files
  define it to unsigned char.
- this fixes bug [ 623152 ] MacOSX: Triple Exception Booting win95.
  The bug was that some code in Bochs depends on Boolean to be a
  32 bit value.  (This should be fixed, but I don't know all the places
  where it needs to be fixed yet.)  Because Carbon defined Boolean as
  an unsigned char, Bochs just followed along and used the unsigned char
  definition to avoid compile problems.  This exposed the dependency
  on 32 bit Boolean on MacOS X only and led to major simulation problems,
  that could only be reproduced and debugged on that platform.
- On the mailing list we debated whether to make all Booleans into "bool" or
  our own type.  I chose bx_bool for several reasons.
  1. Unlike C++'s bool, we can guarantee that bx_bool is the same size on all
     platforms, which makes it much less likely to have more platform-specific
     simulation differences in the future.  (I spent hours on a borrowed
     MacOSX machine chasing bug 618388 before discovering that different sized
     Booleans were the problem, and I don't want to repeat that.)
  2. We still have at least one dependency on 32 bit Booleans which must be
     fixed some time, but I don't want to risk introducing new bugs into the
     simulation just before the 2.0 release.

Modified Files:
    bochs.h config.h.in gdbstub.cc logio.cc main.cc pc_system.cc
    pc_system.h plugin.cc plugin.h bios/rombios.c cpu/apic.cc
    cpu/arith16.cc cpu/arith32.cc cpu/arith64.cc cpu/arith8.cc
    cpu/cpu.cc cpu/cpu.h cpu/ctrl_xfer16.cc cpu/ctrl_xfer32.cc
    cpu/ctrl_xfer64.cc cpu/data_xfer16.cc cpu/data_xfer32.cc
    cpu/data_xfer64.cc cpu/debugstuff.cc cpu/exception.cc
    cpu/fetchdecode.cc cpu/flag_ctrl_pro.cc cpu/init.cc
    cpu/io_pro.cc cpu/lazy_flags.cc cpu/lazy_flags.h cpu/mult16.cc
    cpu/mult32.cc cpu/mult64.cc cpu/mult8.cc cpu/paging.cc
    cpu/proc_ctrl.cc cpu/segment_ctrl_pro.cc cpu/stack_pro.cc
    cpu/tasking.cc debug/dbg_main.cc debug/debug.h debug/sim2.cc
    disasm/dis_decode.cc disasm/disasm.h doc/docbook/Makefile
    docs-html/cosimulation.html fpu/wmFPUemu_glue.cc
    gui/amigaos.cc gui/beos.cc gui/carbon.cc gui/gui.cc gui/gui.h
    gui/keymap.cc gui/keymap.h gui/macintosh.cc gui/nogui.cc
    gui/rfb.cc gui/sdl.cc gui/siminterface.cc gui/siminterface.h
    gui/term.cc gui/win32.cc gui/wx.cc gui/wxmain.cc gui/wxmain.h
    gui/x.cc instrument/example0/instrument.cc
    instrument/example0/instrument.h
    instrument/example1/instrument.cc
    instrument/example1/instrument.h
    instrument/stubs/instrument.cc instrument/stubs/instrument.h
    iodev/cdrom.cc iodev/cdrom.h iodev/cdrom_osx.cc iodev/cmos.cc
    iodev/devices.cc iodev/dma.cc iodev/dma.h iodev/eth_arpback.cc
    iodev/eth_packetmaker.cc iodev/eth_packetmaker.h
    iodev/floppy.cc iodev/floppy.h iodev/guest2host.h
    iodev/harddrv.cc iodev/harddrv.h iodev/ioapic.cc
    iodev/ioapic.h iodev/iodebug.cc iodev/iodev.h
    iodev/keyboard.cc iodev/keyboard.h iodev/ne2k.h
    iodev/parallel.h iodev/pci.cc iodev/pci.h iodev/pic.h
    iodev/pit.cc iodev/pit.h iodev/pit_wrap.cc iodev/pit_wrap.h
    iodev/sb16.cc iodev/sb16.h iodev/serial.cc iodev/serial.h
    iodev/vga.cc iodev/vga.h memory/memory.h memory/misc_mem.cc
2002-10-25 11:44:41 +00:00
Bryce Denney
5e520261db Add plugin support to Bochs by merging all the changes from the
BRANCH_PLUGINS branch!

Authors:
  Bryce Denney
  Christophe Bothamy
  Kevin Lawton (we grabbed a lot of plugin code from plex86)
Testing help from:
  Volker Ruppert
  Don Becker (Psyon)
  Jeremy Parsons (Br'fin)

The change log is too long to paste in here.  To read the change log, do
  cvs log patches/patch.final-from-BRANCH_PLUGINS.gz

All the changes and a detailed description are contained in a patch
called patch.final-from-BRANCH_PLUGINS.gz.  To look at the complete
patch, do
  cvs upd -r1.1 patches/patch.final-from-BRANCH_PLUGINS.gz

Then you will have a local copy of the patch, which you can gunzip and
play with however you want.

Modified Files:
    .bochsrc Makefile.in aclocal.m4 bochs.h config.h.in configure
    configure.in gdbstub.cc logio.cc main.cc pc_system.cc
    pc_system.h state_file.h bios/Makefile.in bios/rombios.c
    cpu/Makefile.in cpu/access.cc cpu/apic.cc cpu/arith16.cc
    cpu/arith32.cc cpu/arith8.cc cpu/cpu.cc cpu/cpu.h
    cpu/ctrl_xfer32.cc cpu/exception.cc cpu/fetchdecode.cc
    cpu/fetchdecode64.cc cpu/flag_ctrl.cc cpu/flag_ctrl_pro.cc
    cpu/init.cc cpu/io.cc cpu/logical16.cc cpu/logical32.cc
    cpu/logical8.cc cpu/paging.cc cpu/proc_ctrl.cc
    cpu/protect_ctrl.cc cpu/segment_ctrl_pro.cc cpu/shift16.cc
    cpu/shift32.cc cpu/stack64.cc cpu/string.cc cpu/tasking.cc
    debug/Makefile.in debug/dbg_main.cc disasm/Makefile.in
    doc/docbook/user/user.dbk dynamic/Makefile.in fpu/Makefile.in
    gui/Makefile.in gui/amigaos.cc gui/beos.cc gui/carbon.cc
    gui/control.cc gui/control.h gui/gui.cc gui/gui.h
    gui/keymap.cc gui/keymap.h gui/macintosh.cc gui/nogui.cc
    gui/rfb.cc gui/sdl.cc gui/sdlkeys.h gui/siminterface.cc
    gui/siminterface.h gui/term.cc gui/win32.cc gui/wx.cc
    gui/wxdialog.cc gui/wxdialog.h gui/wxmain.cc gui/wxmain.h
    gui/x.cc gui/keymaps/sdl-pc-de.map gui/keymaps/sdl-pc-us.map
    gui/keymaps/x11-pc-de.map instrument/example0/instrument.h
    instrument/example1/instrument.h
    instrument/stubs/instrument.cc instrument/stubs/instrument.h
    iodev/Makefile.in iodev/biosdev.cc iodev/biosdev.h
    iodev/cdrom.cc iodev/cmos.cc iodev/cmos.h iodev/devices.cc
    iodev/dma.cc iodev/dma.h iodev/eth_fbsd.cc iodev/eth_linux.cc
    iodev/eth_null.cc iodev/eth_tap.cc iodev/floppy.cc
    iodev/floppy.h iodev/guest2host.cc iodev/guest2host.h
    iodev/harddrv.cc iodev/harddrv.h iodev/iodebug.cc
    iodev/iodebug.h iodev/iodev.h iodev/keyboard.cc
    iodev/keyboard.h iodev/ne2k.cc iodev/ne2k.h iodev/parallel.cc
    iodev/parallel.h iodev/pci.cc iodev/pci.h iodev/pci2isa.cc
    iodev/pci2isa.h iodev/pic.cc iodev/pic.h iodev/pit.cc
    iodev/pit.h iodev/pit_wrap.cc iodev/pit_wrap.h iodev/sb16.cc
    iodev/sb16.h iodev/scancodes.cc iodev/scancodes.h
    iodev/serial.cc iodev/serial.h iodev/slowdown_timer.cc
    iodev/slowdown_timer.h iodev/unmapped.cc iodev/unmapped.h
    iodev/vga.cc iodev/vga.h memory/Makefile.in memory/memory.cc
    memory/memory.h memory/misc_mem.cc misc/bximage.c
    misc/niclist.c
Added Files:
    README-plugins extplugin.h ltdl.c ltdl.h ltdlconf.h.in
    ltmain.sh plugin.cc plugin.h
2002-10-24 21:07:56 +00:00
Stanislav Shwartsman
194952a53d Merged BOCHS-SSE branch 2002-10-16 17:37:35 +00:00
Kevin Lawton
66452e9898 Replaced tabs in cpu/*.{cc,h} files with spaces. 2002-10-04 17:04:33 +00:00
Kevin Lawton
a5537449cd Split out reg-reg and reg-memory cases for a few other high-profile
instructions, mainly variants of MOV.  Had to update fetchdecode64
  to keep it inline with the 32-bit mods.
2002-09-29 19:21:38 +00:00
Stanislav Shwartsman
d495bd75a6 fter integration of SplitMod11b changes Bochs failed to compile in SMP mode.
I fixed the compilation errors in CVS, smbd please check if the fix is property;
2002-09-28 09:38:58 +00:00
Kevin Lawton
08a89fe7b6 Performance mod: I implemented a suggestion from Peter Tattam
and Jas Sandys-Lumsdaine to split out common instructions into
  variants which deal with the mod=11b case (Reg-Reg) and the
  other cases (which do memory ops).  Actually, I only split
  MOV_GwEw and MOV_GdEd for now.  According to some instrumentation
  of a Win95 boot, they were the most frequently used opcode by far.
2002-09-28 05:38:11 +00:00
Kevin Lawton
13a1e55f20 Committed patches/patch-bochs-instrumentation from Stanislav.
Some things changed in the ctrl_xfer*.cc, fetchdecode*.cc,
and cpu.cc since the original patches, so I did some patch
integration by hand.  Check the placement of the
macros BX_INSTR_FETCH_DECODE_COMPLETED() and BX_INSTR_OPCODE()
in cpu.cc to make sure I go them right.  Also, I changed the
parameters to BX_INSTR_OPCODE() to update them to the new code.
I put some comments before each of these to help determine if
the placement is right.

These macros are only compiled in if you are gathering instrumentation
data from bochs, so they shouldn't effect others.
2002-09-28 00:54:05 +00:00