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1003 Commits

Author SHA1 Message Date
Stanislav Shwartsman
5eb781e45f cleanup after cpu features interface rework 2014-08-31 19:22:41 +00:00
Stanislav Shwartsman
b6147d9de8 fixed debugger enabled code 2014-08-31 18:48:04 +00:00
Stanislav Shwartsman
9f57e70d5f Rewritten handling of supported CPUID features to be able to handle large amount of CPU extensions 
Now enable support for up to 128 CPU extensions and could easily extend it more
Also reduce memory footprint for bx_ia_opcodes.h arrays
 2014-08-31 18:39:18 +00:00
Stanislav Shwartsman
fb526a0670 implemented (not yet 100% correct) VREDUCE* AVX512 opcode 2014-08-08 19:12:18 +00:00
Stanislav Shwartsman
4b03966176 Implemented VDBPSADBW AVX512BW instruction 
The only missing AVX512BW/AVX512DQ opcodes are now:

"NDS.512.66.0F3A.W0 56 VREDUCEPS
 NDS.512.66.0F3A.W1 56 VREDUCEPD"
"NDS.512.66.0F3A.W0 57 VREDUCESS
 NDS.512.66.0F3A.W1 57 VREDUCESD"
 2014-08-05 20:18:42 +00:00
Stanislav Shwartsman
fefa61a7cb Implemented VRANGE* AVX512DQ instructions 
The only missing AVX512BW/AVX512DQ opcodes are now:

"NDS.66.0F3A.W0 42 VDBPSADBW"

"NDS.512.66.0F3A.W0 56 VREDUCEPS
 NDS.512.66.0F3A.W1 56 VREDUCEPD"
"NDS.512.66.0F3A.W0 57 VREDUCESS
 NDS.512.66.0F3A.W1 57 VREDUCESD"
 2014-08-04 20:30:46 +00:00
Stanislav Shwartsman
b7f62cdf47 Implemented VPALIGNR AVX512BW instructions 
The only missing AVX512BW/AVX512DQ opcodes are now:

"NDS.66.0F3A.W0 42 VDBPSADBW"

"NDS.512.66.0F3A.W0 50 VRANGEPS
 NDS.512.66.0F3A.W1 50 VRANGEPD"
"NDS.512.66.0F3A.W0 51 VRANGESS
 NDS.512.66.0F3A.W1 51 VRANGESD"

"NDS.512.66.0F3A.W0 56 VREDUCEPS
 NDS.512.66.0F3A.W1 56 VREDUCEPD"
"NDS.512.66.0F3A.W0 57 VREDUCESS
 NDS.512.66.0F3A.W1 57 VREDUCESD"
 2014-07-26 18:59:01 +00:00
Stanislav Shwartsman
b70ed32ea5 support fault suppression for recently added avx512bw ops 2014-07-25 21:45:09 +00:00
Stanislav Shwartsman
d8d4d2f0c1 Implemented VPSRLVW/VPSRAVW/VPSLLVW AVX512BW instructions 
The only missing AVX512BW/AVX512DQ opcodes are now:

"512.66.0F3A.W1 0F VPALIGNR"
"NDS.66.0F3A.W0 42 VDBPSADBW"

"NDS.512.66.0F3A.W0 50 VRANGEPS
 NDS.512.66.0F3A.W1 50 VRANGEPD"
"NDS.512.66.0F3A.W0 51 VRANGESS
 NDS.512.66.0F3A.W1 51 VRANGESD"

"NDS.512.66.0F3A.W0 56 VREDUCEPS
 NDS.512.66.0F3A.W1 56 VREDUCEPD"
"NDS.512.66.0F3A.W0 57 VREDUCESS
 NDS.512.66.0F3A.W1 57 VREDUCESD"
 2014-07-25 21:15:48 +00:00
Stanislav Shwartsman
c4c8652a3b Implemented VPMOV?2? and VPMIN* AVX512 instructions 
The only missing AVX512BW/AVX512DQ opcodes are now:

"512.66.0F38.W1 10 VPSRLVW"
"512.66.0F38.W1 11 VPSRAVW"
"512.66.0F38.W1 12 VPSLLVW"

"512.66.0F3A.W1 0F VPALIGNR"
"NDS.66.0F3A.W0 42 VDBPSADBW"

"NDS.512.66.0F3A.W0 50 VRANGEPS
 NDS.512.66.0F3A.W1 50 VRANGEPD"
"NDS.512.66.0F3A.W0 51 VRANGESS
 NDS.512.66.0F3A.W1 51 VRANGESD"

"NDS.512.66.0F3A.W0 56 VREDUCEPS
 NDS.512.66.0F3A.W1 56 VREDUCEPD"
"NDS.512.66.0F3A.W0 57 VREDUCESS
 NDS.512.66.0F3A.W1 57 VREDUCESD"
 2014-07-22 20:36:55 +00:00
Stanislav Shwartsman
ad7ef68876 Implemented VMULLQ AVX512DQ instruction 
The only missing AVX512BW/AVX512DQ opcodes are now:

"512.66.0F38.W1 10 VPSRLVW"
"512.66.0F38.W1 11 VPSRAVW"
"512.66.0F38.W1 12 VPSLLVW"

"512.F3.0F38.W0 28 VPMOVM2B
 512.F3.0F38.W1 28 VPMOVM2W"
"512.F3.0F38.W0 29 VPMOVB2M
 512.F3.0F38.W1 29 VPMOVW2M"

"512.F3.0F38.W0 38 VPMOVM2D
 512.F3.0F38.W1 38 VPMOVM2Q"
"512.F3.0F38.W0 39 VPMOVD2M
 512.F3.0F38.W1 39 VPMOVQ2M"

"NDS.512.66.0F38.WIG 38 VPMINSB"
"NDS.512.66.0F38.WIG 3A VPMINUW"

"512.66.0F3A.W1 0F VPALIGNR"
"NDS.66.0F3A.W0 42 VDBPSADBW"

"NDS.512.66.0F3A.W0 50 VRANGEPS
 NDS.512.66.0F3A.W1 50 VRANGEPD"
"NDS.512.66.0F3A.W0 51 VRANGESS
 NDS.512.66.0F3A.W1 51 VRANGESD"

"NDS.512.66.0F3A.W0 56 VREDUCEPS
 NDS.512.66.0F3A.W1 56 VREDUCEPD"
"NDS.512.66.0F3A.W0 57 VREDUCESS
 NDS.512.66.0F3A.W1 57 VREDUCESD"
 2014-07-21 19:08:44 +00:00
Stanislav Shwartsman
009629f4d9 Implemented VEXTRACT* AVX512DQ instructions 
The only missing AVX512BW/AVX512DQ opcodes are now:

"512.66.0F38.W1 10 VPSRLVW"
"512.66.0F38.W1 11 VPSRAVW"
"512.66.0F38.W1 12 VPSLLVW"

"512.F3.0F38.W0 28 VPMOVM2B
 512.F3.0F38.W1 28 VPMOVM2W"
"512.F3.0F38.W0 29 VPMOVB2M
 512.F3.0F38.W1 29 VPMOVW2M"

"512.F3.0F38.W0 38 VPMOVM2D
 512.F3.0F38.W1 38 VPMOVM2Q"
"512.F3.0F38.W0 39 VPMOVD2M
 512.F3.0F38.W1 39 VPMOVQ2M"

"NDS.512.66.0F38.WIG 38 VPMINSB"
"NDS.512.66.0F38.WIG 3A VPMINUW"

"W1.NDS.512.66.0F38 40 VPMULLQ"

"512.66.0F3A.W1 0F VPALIGNR"
"NDS.66.0F3A.W0 42 VDBPSADBW"

"NDS.512.66.0F3A.W0 50 VRANGEPS
 NDS.512.66.0F3A.W1 50 VRANGEPD"
"NDS.512.66.0F3A.W0 51 VRANGESS
 NDS.512.66.0F3A.W1 51 VRANGESD"

"NDS.512.66.0F3A.W0 56 VREDUCEPS
 NDS.512.66.0F3A.W1 56 VREDUCEPD"
"NDS.512.66.0F3A.W0 57 VREDUCESS
 NDS.512.66.0F3A.W1 57 VREDUCESD"
 2014-07-20 20:46:48 +00:00
Stanislav Shwartsman
8ef5dcaca3 implement more avx512bw opcodes 2014-07-19 19:01:17 +00:00
Stanislav Shwartsman
7083e94077 implemented VBROADCAST*32x2 AVX512DQ opcodes 2014-07-19 18:36:38 +00:00
Stanislav Shwartsman
ca2859f449 implemented more AVX512BW opcodes 2014-07-19 13:30:54 +00:00
Stanislav Shwartsman
7a133766a8 implemented more AVX512BW opcodes 2014-07-18 19:40:27 +00:00
Stanislav Shwartsman
a556eb21fa implemented more AVX512BW opcodes 2014-07-18 16:28:44 +00:00
Stanislav Shwartsman
94864fb9bc Implement AVX512BW and AVX512DQ extensions published in recently published Intel Archtecture Extensions manual rev20. 
https://software.intel.com/sites/default/files/managed/c6/a9/319433-020.pdf

Most of the instructions are implemented, more on the way.

+ few bugfixes for legacy AVX-512 emulation

AVX-512: Fixed bug in VCMPPS masked instruction implementation with 512-bit data size
AVX-512: Fixed AVX-512 masked convert instructions with non-k0 mask (behaved as non masked versions)
AVX-512: Fixed missed #UD due to invalid EVEX prefix fields for several AVX-512 opcodes (VFIXUPIMMSS/SD, FMA)
 2014-07-18 11:14:25 +00:00
Stanislav Shwartsman
0f39ce58be fixed compilation warnings and errors with MSVCPP 2014-07-09 16:08:16 +00:00
Stanislav Shwartsman
816f5cc2d7 fixed massive code duplication 2014-07-03 06:40:42 +00:00
Stanislav Shwartsman
1e46de78ad add proper alignment of XMM/YMM/ZMM registers within CPU class 2014-06-25 19:12:14 +00:00
Stanislav Shwartsman
2fe0aaa472 added configure option for trace linking optimization and mention it in CHANGES 2014-05-01 18:30:23 +00:00
Stanislav Shwartsman
ab6230a9a8 Implemented XSAVEC instruction emulation and XINUSE optimization in the XSAVEOPT instruction 2014-03-17 20:29:44 +00:00
Stanislav Shwartsman
d8fa7aa28a implemented INIT optimization for XSAVEOPT instruction 2014-03-16 21:56:30 +00:00
Stanislav Shwartsman
97d2965d58 continue xsave code rework 2014-03-16 20:37:47 +00:00
Stanislav Shwartsman
d10fa93d89 fixed to VSCALEF instruction + one more step in the implementation in the softfloat 2014-03-14 20:26:50 +00:00
Stanislav Shwartsman
02e19de346 Added shape of implementation for last missing VSCALEF* AVX-512 instructons. 
The softfloat implementation is still missing (only corner cases are supported).
Extend softfloat floatNN_class methods to distinguish between SNaN and QNaN.
 2014-03-09 21:42:11 +00:00
Stanislav Shwartsman
bfe6ecabb8 xsave sse state using same interface as all other advanced states 2014-03-04 21:06:29 +00:00
Stanislav Shwartsman
402b2c01c9 Implemented AVX-512 conflict detection instructions (VPCONFLICT, VPLZCNT, VPBROADCASTMB2Q, VPBROADCASTMW2D) 
Only missed AVX-512 opcodes are:

512.66.0F38.W0 2C VSCALEFPS
512.66.0F38.W1 2C VSCALEFPD
NDS.LIG.66.0F38.W0 2D VSCALESS
NDS.LIG.66.0F38.W1 2D VSCALESD
 2014-02-27 21:12:02 +00:00
Stanislav Shwartsman
648221d419 rewritten xsave/xrestor for more modular functionality. todo: replace walk through state using simple for loop 2014-02-22 21:00:47 +00:00
Stanislav Shwartsman
0a1b4f1c7e added template for missing avx-512 instructions 2014-02-17 20:21:58 +00:00
Stanislav Shwartsman
7775483d5e Implemented VCVTPS2PH AVX-512 instruction 
Now only missed AVX-512 opcodes now are:

512.66.0F38.W0 2C VSCALEFPS
512.66.0F38.W1 2C VSCALEFPD
NDS.LIG.66.0F38.W0 2D VSCALESS
NDS.LIG.66.0F38.W1 2D VSCALESD

512.66.0F38.W0 4C VRCP14PS
512.66.0F38.W1 4C VRCP14PD
NDS.LIG.66.0F38.W0 4D VRCP14SS
NDS.LIG.66.0F38.W1 4D VRCP14SD
512.66.0F38.W0 4E VRSQRT14PS
512.66.0F38.W1 4E VRSQRT14PD
NDS.LIG.66.0F38.W0 4F VRSQRT14SS
NDS.LIG.66.0F38.W1 4F VRSQRT14SD

512.66.0F3A.W0 08 VRNDSCALEPS
512.66.0F3A.W1 09 VRNDSCALEPD
NDS.LIG.66.0F3A.W1 0A VRNDSCALESS
NDS.LIG.66.0F3A.W1 0B VRNDSCALESD
 2014-02-15 19:21:08 +00:00
Stanislav Shwartsman
09414f2f4b implemented access to opmask AVX-512 registers from debugger, fixed enhdbg buffer overflow with EVEX enabled 2014-02-11 20:51:18 +00:00
Stanislav Shwartsman
b510cf794b complete compressed displ feature support, bugfixes in AVX-512 code 2014-02-11 16:10:31 +00:00
Stanislav Shwartsman
9613e4b402 implementation of AVX-512 compressed displacement feature which is required for AVX-512 emu correctness (first step). todo: fix rest of EVEX opcodes 2014-02-10 21:12:08 +00:00
Stanislav Shwartsman
7a6727da34 implemented AVX-512 version of VCVTPH2PS 2014-02-04 20:32:54 +00:00
Stanislav Shwartsman
b33f93b9f3 Implemented VGETMANT* AVX-512 instructions 
Now only missed AVX-512 opcodes now are:

512.66.0F38.W0 13 VCVTPH2PS
512.66.0F3A.W0 1D VCVTPS2PH

512.66.0F38.W0 2C VSCALEFPS
512.66.0F38.W1 2C VSCALEFPD
NDS.LIG.66.0F38.W0 2D VSCALESS
NDS.LIG.66.0F38.W1 2D VSCALESD

512.66.0F38.W0 4C VRCP14PS
512.66.0F38.W1 4C VRCP14PD
NDS.LIG.66.0F38.W0 4D VRCP14SS
NDS.LIG.66.0F38.W1 4D VRCP14SD
512.66.0F38.W0 4E VRSQRT14PS
512.66.0F38.W1 4E VRSQRT14PD
NDS.LIG.66.0F38.W0 4F VRSQRT14SS
NDS.LIG.66.0F38.W1 4F VRSQRT14SD

512.66.0F3A.W0 08 VRNDSCALEPS
512.66.0F3A.W1 09 VRNDSCALEPD
NDS.LIG.66.0F3A.W1 0A VRNDSCALESS
NDS.LIG.66.0F3A.W1 0B VRNDSCALESD
 2014-02-03 20:40:46 +00:00
Stanislav Shwartsman
ac06ee46ae Implemented VPMOVSX*/VPMOVZX* AVX-512 instructions 
Now only missed AVX-512 opcodes now are:

512.66.0F38.W0 13 VCVTPH2PS
512.66.0F3A.W0 1D VCVTPS2PH

512.66.0F38.W0 2C VSCALEFPS
512.66.0F38.W1 2C VSCALEFPD
NDS.LIG.66.0F38.W0 2D VSCALESS
NDS.LIG.66.0F38.W1 2D VSCALESD

512.66.0F38.W0 4C VRCP14PS
512.66.0F38.W1 4C VRCP14PD
NDS.LIG.66.0F38.W0 4D VRCP14SS
NDS.LIG.66.0F38.W1 4D VRCP14SD
512.66.0F38.W0 4E VRSQRT14PS
512.66.0F38.W1 4E VRSQRT14PD
NDS.LIG.66.0F38.W0 4F VRSQRT14SS
NDS.LIG.66.0F38.W1 4F VRSQRT14SD

512.66.0F3A.W0 08 VRNDSCALEPS
512.66.0F3A.W1 09 VRNDSCALEPD
NDS.LIG.66.0F3A.W1 0A VRNDSCALESS
NDS.LIG.66.0F3A.W1 0B VRNDSCALESD

512.66.0F3A.W0 26 VGETMANTPS
512.66.0F3A.W1 26 VGETMANTPD
NDS.LIG.66.0F3A.W0 27 VGETMANTSS
NDS.LIG.66.0F3A.W1 27 VGETMANTSD
 2014-02-02 19:56:08 +00:00
Stanislav Shwartsman
55e1d53a48 implement DPPS/DPPD ops using existing primitives; added some missing defs 2014-02-02 18:57:25 +00:00
Stanislav Shwartsman
ef130ca145 convert some defines to enum 2014-01-31 19:40:34 +00:00
Stanislav Shwartsman
ccb003b0e1 fixed swapped sources of VEXTRACTF* 2014-01-30 20:48:41 +00:00
Stanislav Shwartsman
41e13703a3 Implemented VEXTRACT* AVX-512 instructions 
Now only missed AVX-512 opcodes now are:

512.66.0F38.W0 13 VCVTPH2PS
512.66.0F3A.W0 1D VCVTPS2PH

512.66.0F38.WIG 21 VPMOVSXBD
512.66.0F38.WIG 22 VPMOVSXBQ
512.66.0F38.WIG 23 VPMOVSXWD
512.66.0F38.WIG 24 VPMOVSXWQ
512.66.0F38.W0  25 VPMOVSXDQ

512.66.0F38.WIG 31 VPMOVSZBD
512.66.0F38.WIG 32 VPMOVSZBQ
512.66.0F38.WIG 33 VPMOVSZWD
512.66.0F38.WIG 34 VPMOVSZWQ
512.66.0F38.W0  35 VPMOVSzDQ

512.66.0F38.W0 2C VSCALEFPS
512.66.0F38.W1 2C VSCALEFPD
NDS.LIG.66.0F38.W0 2D VSCALESS
NDS.LIG.66.0F38.W1 2D VSCALESD

512.66.0F38.W0 4C VRCP14PS
512.66.0F38.W1 4C VRCP14PD
NDS.LIG.66.0F38.W0 4D VRCP14SS
NDS.LIG.66.0F38.W1 4D VRCP14SD
512.66.0F38.W0 4E VRSQRT14PS
512.66.0F38.W1 4E VRSQRT14PD
NDS.LIG.66.0F38.W0 4F VRSQRT14SS
NDS.LIG.66.0F38.W1 4F VRSQRT14SD

512.66.0F3A.W0 08 VRNDSCALEPS
512.66.0F3A.W1 09 VRNDSCALEPD
NDS.LIG.66.0F3A.W1 0A VRNDSCALESS
NDS.LIG.66.0F3A.W1 0B VRNDSCALESD

512.66.0F3A.W0 26 VGETMANTPS
512.66.0F3A.W1 26 VGETMANTPD
NDS.LIG.66.0F3A.W0 27 VGETMANTSS
NDS.LIG.66.0F3A.W1 27 VGETMANTSD
 2014-01-30 20:31:08 +00:00
Stanislav Shwartsman
63e99da4af Implemented VALIGN* AVX-512 instructions 
Now only missed AVX-512 opcodes now are:

512.66.0F38.W0 13 VCVTPH2PS
512.66.0F3A.W0 1D VCVTPS2PH

512.66.0F38.WIG 21 VPMOVSXBD
512.66.0F38.WIG 22 VPMOVSXBQ
512.66.0F38.WIG 23 VPMOVSXWD
512.66.0F38.WIG 24 VPMOVSXWQ
512.66.0F38.W0  25 VPMOVSXDQ

512.66.0F38.WIG 31 VPMOVSZBD
512.66.0F38.WIG 32 VPMOVSZBQ
512.66.0F38.WIG 33 VPMOVSZWD
512.66.0F38.WIG 34 VPMOVSZWQ
512.66.0F38.W0  35 VPMOVSzDQ

512.66.0F38.W0 2C VSCALEFPS
512.66.0F38.W1 2C VSCALEFPD
NDS.LIG.66.0F38.W0 2D VSCALESS
NDS.LIG.66.0F38.W1 2D VSCALESD

512.66.0F38.W0 4C VRCP14PS
512.66.0F38.W1 4C VRCP14PD
NDS.LIG.66.0F38.W0 4D VRCP14SS
NDS.LIG.66.0F38.W1 4D VRCP14SD
512.66.0F38.W0 4E VRSQRT14PS
512.66.0F38.W1 4E VRSQRT14PD
NDS.LIG.66.0F38.W0 4F VRSQRT14SS
NDS.LIG.66.0F38.W1 4F VRSQRT14SD

512.66.0F3A.W0 08 VRNDSCALEPS
512.66.0F3A.W1 09 VRNDSCALEPD
NDS.LIG.66.0F3A.W1 0A VRNDSCALESS
NDS.LIG.66.0F3A.W1 0B VRNDSCALESD

512.66.0F3A.W0 19 VEXTRACTF32x4
512.66.0F3A.W1 1B VEXTRACTF64x4
512.66.0F3A.W0 39 VEXTRACTI32x4
512.66.0F3A.W1 3B VEXTRACTI64x4

512.66.0F3A.W0 26 VGETMANTPS
512.66.0F3A.W1 26 VGETMANTPD
NDS.LIG.66.0F3A.W0 27 VGETMANTSS
NDS.LIG.66.0F3A.W1 27 VGETMANTSD
 2014-01-28 19:36:46 +00:00
Stanislav Shwartsman
36ba25847f Implemented last missed AVX-512 unsigned convert instructions 
The only missed AVX-512 opcodes now are:

512.66.0F38.W0 13 VCVTPH2PS
512.66.0F3A.W0 1D VCVTPS2PH

512.66.0F38.WIG 21 VPMOVSXBD
512.66.0F38.WIG 22 VPMOVSXBQ
512.66.0F38.WIG 23 VPMOVSXWD
512.66.0F38.WIG 24 VPMOVSXWQ
512.66.0F38.W0  25 VPMOVSXDQ

512.66.0F38.WIG 31 VPMOVSZBD
512.66.0F38.WIG 32 VPMOVSZBQ
512.66.0F38.WIG 33 VPMOVSZWD
512.66.0F38.WIG 34 VPMOVSZWQ
512.66.0F38.W0  35 VPMOVSzDQ

512.66.0F38.W0 2C VSCALEFPS
512.66.0F38.W1 2C VSCALEFPD
NDS.LIG.66.0F38.W0 2D VSCALESS
NDS.LIG.66.0F38.W1 2D VSCALESD

512.66.0F38.W0 4C VRCP14PS
 512.66.0F38.W1 4C VRCP14PD
NDS.LIG.66.0F38.W0 4D VRCP14SS
 NDS.LIG.66.0F38.W1 4D VRCP14SD
512.66.0F38.W0 4E VRSQRT14PS
 512.66.0F38.W1 4E VRSQRT14PD
NDS.LIG.66.0F38.W0 4F VRSQRT14SS
 NDS.LIG.66.0F38.W1 4F VRSQRT14SD

NDS.512.66.0F3A.W0 03 VALIGND
NDS.512.66.0F3A.W1 03 VALIGNQ

512.66.0F3A.W0 08 VRNDSCALEPS
512.66.0F3A.W1 09 VRNDSCALEPD
NDS.LIG.66.0F3A.W1 0A VRNDSCALESS
NDS.LIG.66.0F3A.W1 0B VRNDSCALESD

512.66.0F3A.W0 19 VEXTRACTF32x4
512.66.0F3A.W1 1B VEXTRACTF64x4
512.66.0F3A.W0 39 VEXTRACTI32x4
512.66.0F3A.W1 3B VEXTRACTI64x4

512.66.0F3A.W0 26 VGETMANTPS
 512.66.0F3A.W1 26 VGETMANTPD
NDS.LIG.66.0F3A.W0 27 VGETMANTSS
 NDS.LIG.66.0F3A.W1 27 VGETMANTSD
 2014-01-28 12:57:38 +00:00
Stanislav Shwartsman
15979a52b6 implemented avx-512 getexp instructions 2014-01-27 21:25:07 +00:00
Stanislav Shwartsman
3798ed66b5 new function for disasm. todo: support it independently of CPU 2014-01-26 20:01:50 +00:00
Stanislav Shwartsman
4d4d194c16 implemented missed vpmul* avx-512 opcodes 2014-01-24 20:04:36 +00:00
Stanislav Shwartsman
7beb85b850 implemented vperm* avx-512 opcodes 2014-01-24 19:23:19 +00:00
Stanislav Shwartsman
407681c98a implemented some more avx-512 opcodes 2014-01-24 12:02:47 +00:00
Stanislav Shwartsman
33889cd02e implemented avx-512 vpermq opcode 2014-01-22 21:21:32 +00:00