- Added initial version of the VGABIOS for Voodoo Banshee adapters.
- Several code optimizations to reduce binary size.
NOTE #1: Banshee version has no VBE support yet.
NOTE #2: Banshee binary uses PCI ID for Banshee PCI and Bochs temporarily
modifies the PCI data for Voodoo3 and AGP models.
- Disable i/o and memory access in PCI command register before probing and
setting up base addresses and re-enable it when complete for selected device.
- Legacy BIOS should not enable busmaster function in PCI init.
- Use 'iasl' for building ACPI table if present.
- Use the release date from README file for the BIOS_BUILD_DATE.
- Added Bochs VERSION string to the BIOS banner.
- Fixed the rombios32 delay loop for QEMU build.
- Improvement for rombios32.ld.
- rombios.c: return maximum bus number #1 for i440BX.
- Now using different i/o and memory base address regions for PCI and AGP.
- Added some init code for the i440BX PCI/AGP bridge.
- Some code cleanups.
- rombios.c: return maximum bus number #1 for i440BX.
- Now using different i/o and memory base address regions for PCI and AGP.
- Added some init code for the i440BX PCI/AGP bridge.
- Some code cleanups.
- Bochs BIOS: Improved calculating PCI slot number from device number to handle
the i440BX case correctly.
- Memory code: Detect and modify the PCI IRQ roouting table of the Bochs BIOS
for the i440BX chipset (TODO: this could be done by the BIOS itself after
copying to shadow RAM).
- Bochs BIOS: Improved calculating PCI slot number from device number to handle
the i440BX case correctly.
- Memory code: Detect and modify the PCI IRQ roouting table of the Bochs BIOS
for the i440BX chipset (TODO: this could be done by the BIOS itself after
copying to shadow RAM).
- Added symbols for the i440BX host bridge device ID.
- Probe and search for devices on PCI bus #1 (AGP).
- Set up memory and i/o regions only for header type 0.
- Set AGP aperture size to 64 MB.
- TODO: PCI IRQ routing, i440BX specific register setup.
- Added symbols for the i440BX host bridge device ID.
- Probe and search for devices on PCI bus #1 (AGP).
- Set up memory and i/o regions only for header type 0.
- Set AGP aperture size to 64 MB.
- TODO: PCI IRQ routing, i440BX specific register setup.
- Function ata_cmd_data_io: using fixed block size 512 only for 'identify'
commands. For read/write commands the hard disk sector size must be used.
- Take account of sector size when calculating hard disk size in MBytes (TODO:
calculation is not correct for not yet existing very big disks).
- updated comment.
- Function ata_cmd_data_io: using fixed block size 512 only for 'identify'
commands. For read/write commands the hard disk sector size must be used.
- Take account of sector size when calculating hard disk size in MBytes (TODO:
calculation is not correct for not yet existing very big disks).
- updated comment.
- Created framework based on our I/O APIC code and ported HPET core from Qemu
with some required changes for the Bochs timer and IRQ handling.
- Enabled HPET-specific code in the ACPI and rombios32 sources and generated
new ACPI table with iasl.
- The HPET device plugin is now always loaded if the i440FX chipset is selected
(same as ACPI). We have to rethink this when we have implemented a more
modern chipset.
- TODO: Rewrite of the virtual timer code for nanosecond support to make the
realtime synchronization possible with HPET.
Prepared "biosdetect" option in the harddrv code.
TODO #1: Add support for a comma-separated list of BIOS options.
TODO #2: Implement support for at least "biosdetect=none" in the Bochs BIOS.
