Stanislav Shwartsman
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4f625b23e0
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enable yet another Bochs new decoder. It is a bit slower than old one but it is much more extendable so adding new opcode won't be nightmare anymore
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2019-02-16 15:23:24 +00:00 |
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Stanislav Shwartsman
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61dcc4ace7
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remove unreferenced decode table
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2019-01-29 13:44:39 +00:00 |
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Stanislav Shwartsman
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f8ec18acd5
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fix decode/disasm of AVX512-VBMI2 VPSH*D* opcodes
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2019-01-27 18:52:03 +00:00 |
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Stanislav Shwartsman
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0b18a42e4e
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fixed decoding of AVX-512 opcodes
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2019-01-27 17:35:21 +00:00 |
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Stanislav Shwartsman
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5cb4639891
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fixed decoding of AVX-512 opcodes
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2019-01-27 17:31:28 +00:00 |
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Stanislav Shwartsman
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6dc5cfe80b
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fixed typo in opcode name
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2019-01-24 20:10:46 +00:00 |
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Stanislav Shwartsman
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af75c2a81e
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fixed comment in the opcode table for EVEX
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2019-01-22 18:31:39 +00:00 |
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Stanislav Shwartsman
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9bc7faf493
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dump all supported CPU fetures into Bochs log from CPUID object
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2019-01-05 20:17:39 +00:00 |
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Stanislav Shwartsman
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fcd9ce1634
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fix compilation without x86_64
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2018-04-15 14:22:16 +00:00 |
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Stanislav Shwartsman
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d000e21001
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added MOVDIRI opcode implementation
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2018-04-06 05:06:36 +00:00 |
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Stanislav Shwartsman
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fd15b61d94
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keep def of YMM/ZMM register even if AVX or EVEX are not compiled in and let reading/writing them to MEM
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2018-04-04 19:31:56 +00:00 |
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Stanislav Shwartsman
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8c9f7f54b6
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update CPUID definitions with recently published EAS-33 extensions document
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2018-04-04 18:15:44 +00:00 |
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Stanislav Shwartsman
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0cd49ddae4
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fixed compilation with EVEX disabled
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2018-03-29 08:50:38 +00:00 |
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Stanislav Shwartsman
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773f1b7e42
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cleanup return value of all instruction handlers
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2018-02-16 07:57:32 +00:00 |
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Stanislav Shwartsman
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769ed3ef88
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fixed MOVBE instruction decoding
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2018-01-23 19:53:34 +00:00 |
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Stanislav Shwartsman
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3c08cfedf2
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fixed buffer overflow when printing instruction disasm for opcode bytes which cannot be decoded
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2017-12-31 21:22:04 +00:00 |
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Stanislav Shwartsman
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6566cab8aa
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fixed new disasm for avx2 opcodes
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2017-12-30 18:45:21 +00:00 |
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Stanislav Shwartsman
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4c03fe3e2c
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fixed disasm of vcvtps2ph/ph2ps opcodes
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2017-12-28 19:59:42 +00:00 |
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Stanislav Shwartsman
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ed8fa8ac61
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fix compilation with no AVX enabled
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2017-12-24 15:38:21 +00:00 |
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Stanislav Shwartsman
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ca034f0642
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fixed disasm of sse insertps instruction
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2017-12-21 18:18:10 +00:00 |
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Stanislav Shwartsman
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59c542fb06
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fix disasm of FISTTP opcodes
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2017-12-19 20:36:55 +00:00 |
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Stanislav Shwartsman
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4337a062e2
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disasm memsize for gather opcodes
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2017-12-19 19:51:55 +00:00 |
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Stanislav Shwartsman
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15187110ef
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implement disasm of implicit memory reference for maskmovdqu/maskmovq opcodes. fix vmaskmovdqu disasm for legacy disasm as well
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2017-12-19 19:45:30 +00:00 |
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Stanislav Shwartsman
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e086f7ba19
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split INSERTPS opcode to reg and mem forms
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2017-12-19 19:25:40 +00:00 |
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Stanislav Shwartsman
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ce3eafa535
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disasm fix
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2017-12-17 18:47:21 +00:00 |
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Stanislav Shwartsman
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79ec183ff6
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fixup for MMX opcodes disasm
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2017-12-17 17:21:02 +00:00 |
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Stanislav Shwartsman
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5dc5e01a12
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disasm fixes and reorg of pinsr* opcodes
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2017-12-16 18:34:20 +00:00 |
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Stanislav Shwartsman
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6a4e8ff2f1
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fixed typo in prev commit
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2017-12-13 21:08:10 +00:00 |
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Stanislav Shwartsman
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f362f34ed6
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correctly decode PINSRQ instruction
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2017-12-13 20:59:41 +00:00 |
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Stanislav Shwartsman
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50a799ea11
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split handlers for PINSRD/Q opcodes. fix disasm for MULX instruction
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2017-12-13 20:18:59 +00:00 |
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Stanislav Shwartsman
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07bff3be43
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fixed decoding of VPINSRB/W/D/Q and VINSERTPS with EVEX prefix
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2017-12-13 20:02:12 +00:00 |
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Stanislav Shwartsman
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8a311515dd
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correctly decode VPEXTRB/W/D/Q - these opcodes allowed to be with VEX.L=0 only
fixed disasm module compilation with no AVX enabled
remove duplicate opcode handlers
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2017-12-13 19:51:25 +00:00 |
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Stanislav Shwartsman
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2f3c9d3c8c
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correct disasm for movsxd opcode
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2017-12-13 18:44:13 +00:00 |
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Stanislav Shwartsman
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c1dc514c2a
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clarify disasm of movlhps/movhlps opcodes
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2017-12-12 08:55:09 +00:00 |
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Stanislav Shwartsman
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fd953421f4
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new disasm: add correct memaccess size for FLDCW
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2017-12-11 19:58:09 +00:00 |
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Stanislav Shwartsman
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a84d9cf1c7
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disasm: fix crc32 operand description
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2017-12-11 19:45:50 +00:00 |
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Stanislav Shwartsman
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a028ef7c9c
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bugfix for decoder with EVEX enabled
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2017-12-11 19:29:11 +00:00 |
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Stanislav Shwartsman
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e46f37b40e
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fixed disasm of memsize for sse legacy instructions
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2017-12-11 18:33:33 +00:00 |
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Stanislav Shwartsman
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404a5f2c53
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bugfix for previous commit
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2017-12-11 16:41:48 +00:00 |
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Stanislav Shwartsman
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b03f78d652
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updates for bochs decoder and decoder based disasm
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2017-12-11 15:45:43 +00:00 |
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Stanislav Shwartsman
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c80e587ded
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properly handle kmask registers in modrm form
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2017-12-05 19:33:23 +00:00 |
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Stanislav Shwartsman
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8f15cfb514
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fixed link err with debugger enabled
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2017-12-05 19:23:41 +00:00 |
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Stanislav Shwartsman
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31ea453921
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fixed bogus assert
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2017-12-02 16:40:03 +00:00 |
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Stanislav Shwartsman
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eaa05c32e8
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link without LOGIO for standalone decoder mode
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2017-12-01 21:27:30 +00:00 |
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Stanislav Shwartsman
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60591800f1
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handle lock mov cr0 amd feature out decoder critical path
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2017-12-01 21:18:16 +00:00 |
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Stanislav Shwartsman
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01067cb4b9
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another compilation fix for new disasm stand-alone module
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2017-11-29 19:24:00 +00:00 |
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Stanislav Shwartsman
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a7e58973ce
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fixed typo
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2017-11-27 20:26:54 +00:00 |
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Stanislav Shwartsman
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c8d9aeb377
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mark blocks of code which not supposed to be compiled for stand-alone bochs cpu decoder
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2017-11-27 20:25:04 +00:00 |
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Stanislav Shwartsman
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cef6c7fb98
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fix for new disasm
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2017-11-26 19:38:58 +00:00 |
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Stanislav Shwartsman
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596b3b6eb8
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reduce CPU dependencies from fetchdecode module
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2017-11-25 20:20:34 +00:00 |
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