Stanislav Shwartsman
c41cbe6d56
Link traces over taken branch optimization which makes handlers chaining even more efficient.
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I observed 5% speedup in all disk images over 2.6pre1.
The change is safe (passed all regressions) and I will be glad to make it into Bochs 2.6!
2012-08-21 19:58:41 +00:00
Stanislav Shwartsman
9d802e2762
very small cleanup
2012-05-05 18:40:37 +00:00
Stanislav Shwartsman
cbbd8bfd46
fixed some warnings after compilation with msvcpp 2010
2011-12-10 18:58:25 +00:00
Stanislav Shwartsman
44241a1e56
- Added support for AVX and AVX2 instructions emulation, to enable configure
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with --enable-avx option. When compiled in, AVX still has to be enabled
using .bochsrc CPUID option. AVX2 FMA instructions still not implemented.
- Added support for Bit Manipulation Instructions (BMI) emulation. The BMI
instructions support can be enabled using .bochsrc CPUID option.
2011-08-27 13:47:16 +00:00
Stanislav Shwartsman
002c86660a
reword all the CPU code in preparation for future CPU speedup implementation.
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Bochs emulation can be another 10-15% faster using technique described in paper
"Fast Microcode Interpretation with Transactional Commit/Abort"
http://amas-bt.cs.virginia.edu/2011proceedings/amasbt2011-p3.pdf
2011-07-06 20:01:18 +00:00
Stanislav Shwartsman
31be835056
bugfix + rename function
2011-06-14 19:56:28 +00:00
Volker Ruppert
c78026a9a2
- deleted executable properties from source files
2011-04-03 10:29:19 +00:00
Stanislav Shwartsman
7ced718040
implemented AVX instructions support
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many changes - some cleanup will follow
please report ay found bugs !
2011-03-19 20:09:34 +00:00
Stanislav Shwartsman
7d80a6ebe0
Adding Id and Rev property to all files
2011-02-24 21:54:04 +00:00
Stanislav Shwartsman
b5ebe5865e
Fixes for incoming bug report, missed changes in CVS, repository fixups and etc
2011-02-11 09:56:23 +00:00
Stanislav Shwartsman
2ce1bd299c
conditional compiling with misaligned sse
2011-01-12 20:16:25 +00:00
Stanislav Shwartsman
f705cbbc63
rename functions
2010-12-25 19:34:43 +00:00
Stanislav Shwartsman
d0ee1c1b80
Fixed for compilation with cpu-level=3
2010-12-25 15:00:20 +00:00
Stanislav Shwartsman
040a8e1a3a
split bunch of SSE opcodes
2010-12-24 08:35:00 +00:00
Stanislav Shwartsman
709059ddcc
integrate misaligned SSE into code
2010-12-22 21:24:19 +00:00
Stanislav Shwartsman
43600f3756
complete rework of SSE code
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next step - split all SSE opcodes by ModC0
2010-12-22 21:16:02 +00:00
