Commit Graph

422 Commits

Author SHA1 Message Date
Stanislav Shwartsman
76ee7b499b svm updates 2012-01-08 14:09:51 +00:00
Stanislav Shwartsman
269d5e3443 more SVM fixes 2012-01-01 20:26:23 +00:00
Stanislav Shwartsman
93523a657d remove patch that always kept IF set after HLT - not needed anymore 2011-12-30 08:50:01 +00:00
Stanislav Shwartsman
abda3a967c added two AMD CPUs to CPUDB 2011-12-29 14:23:22 +00:00
Stanislav Shwartsman
7f5f917a34 more SVM implementation 2011-12-27 19:42:11 +00:00
Stanislav Shwartsman
c32eaa5d05 added more svm intercepts 2011-12-26 20:51:57 +00:00
Stanislav Shwartsman
8b4a2c2034 implemented some more intercepts.
fixed compilation without SVM
2011-12-26 16:33:13 +00:00
Stanislav Shwartsman
a44c1b8e1e SVM and VMX share tsc offset code 2011-12-25 19:53:23 +00:00
Stanislav Shwartsman
75bda1d5cd implemented SVM emulation support for Bochs (incomplete yet)
I am merging the code in order to start making shortcuts between VMX emulation and SVM emulation.
Of course SVM emulation is incomplete, completely untested and not expected to work.
But someone could already take a look one the code and give some suggestions.

Also looking for anybody with existing SVM kernels - as simple as possible - for testing.

Status:
 - exceptions intercept is not implemented yet
 - IO intercept is not implemented yet
 - MSR intercept is not implemented yet
 - virtual interrupts are not implemented yet
 - CPUID is not implemented yet

No advanced SVM featurez planned - I am implementing the very basic 'Pacifica' document from 2005 using QEMU code as reference.
2011-12-25 19:35:29 +00:00
Stanislav Shwartsman
cbbd8bfd46 fixed some warnings after compilation with msvcpp 2010 2011-12-10 18:58:25 +00:00
Stanislav Shwartsman
12ad45395b enable Penryn VMX capabilities with VMX=1, VMX=2 is required for EPT and heavier stuff 2011-09-26 19:36:20 +00:00
Stanislav Shwartsman
62d0c8abf7 - Now you could disable x86-64 from .bochsrc so now it is possible to emulate
32-bit CPU using Bochs binary compiled with x86-64 support.

The commit also fixes some init.cc issues with initialization of SYSCALL/SYSRET MSR in AMD hosts and also includes code reorg.
2011-09-25 17:36:20 +00:00
Stanislav Shwartsman
96cedbc756 continue handlers-chaining optimization: update time once per trace and not for every instruction 2011-09-06 15:35:39 +00:00
Stanislav Shwartsman
dfd769a102 - Fixed compilation issue with cpu-level=5
- SYSCALL/SYSRET: SYSCALL/SYSRET instructions are not supported in legacy mode for Intel processors
- CPUID: CPUID.0x80000001.EDX[11] SYSCALL/SYSRET support should not be reported outside long64 mode if legacy mode SYSCALL/SYSRET is not supported
- Added new CPUDB entry - AMD K6-2 3D proc3essor (Chomper)
2011-08-30 22:00:27 +00:00
Stanislav Shwartsman
fb9da23f9b syscall/sysret are not supported outside long64 mode in Intel CPUs 2011-08-30 21:32:40 +00:00
Stanislav Shwartsman
fa930961c2 small optimization 2011-08-23 21:25:34 +00:00
Stanislav Shwartsman
0171324877 small favor to VMX OFF for code that compiled with VMX ON
avoid function call when not in vmx guest.
2011-08-09 20:50:51 +00:00
Stanislav Shwartsman
17a94fc58e warning fixes 2011-08-09 18:00:19 +00:00
Stanislav Shwartsman
78327d3e5e First step toward completely configurable CPU.
Change CPUID to generic interface which could be chosen from .bochsrc.
Bochs CPU emulation will enable/disable features (like instruction sets) according to CPUID that is selected.
TODO: Add database of CPUID from real hardware CPUs
2011-07-28 16:17:42 +00:00
Stanislav Shwartsman
f8e4e7f16b clean up/fixed instrumentation examples + removed old 2-years old configure options check (deprecated) 2011-07-23 19:58:38 +00:00
Stanislav Shwartsman
cac3c836fa fixed typo 2011-07-18 21:47:14 +00:00
Stanislav Shwartsman
cddd1e3758 MONITOR/MWAIT: Do monitor on cache line granularity only + bugfix with possible TLB caching of monitored line 2011-07-18 21:44:22 +00:00
Stanislav Shwartsman
f81e47cca2 it is better to handle A20 in paging already 2011-07-18 20:22:59 +00:00
Stanislav Shwartsman
28a58f4ea5 fix rdtscp code 2011-07-09 22:28:08 +00:00
Stanislav Shwartsman
002c86660a reword all the CPU code in preparation for future CPU speedup implementation.
Bochs emulation can be another 10-15% faster using technique described in paper
"Fast Microcode Interpretation with Transactional Commit/Abort"
http://amas-bt.cs.virginia.edu/2011proceedings/amasbt2011-p3.pdf
2011-07-06 20:01:18 +00:00
Stanislav Shwartsman
ee3f9e36cb Implemented Supervisor Mode Execution Protection (SMEP) 2011-05-29 16:28:26 +00:00
Stanislav Shwartsman
024a1ace38 move X2APIC to be .bochsrc option, rework of the cpuid code 2011-04-21 13:27:42 +00:00
Stanislav Shwartsman
31dd6a70db small cleanups 2011-03-20 21:16:45 +00:00
Stanislav Shwartsman
7ced718040 implemented AVX instructions support
many changes - some cleanup will follow
please report ay found bugs !
2011-03-19 20:09:34 +00:00
Stanislav Shwartsman
7d80a6ebe0 Adding Id and Rev property to all files 2011-02-24 21:54:04 +00:00
Stanislav Shwartsman
a31103e7d8 optimize fetchdecode tables - part2 2011-01-21 16:07:51 +00:00
Stanislav Shwartsman
1bd512e98d split more SSE ops, optimizations in MMX code 2010-12-25 17:04:36 +00:00
Stanislav Shwartsman
43600f3756 complete rework of SSE code
next step - split all SSE opcodes by ModC0
2010-12-22 21:16:02 +00:00
Stanislav Shwartsman
4a85a8680e SSE optimization 2010-12-19 07:06:40 +00:00
Stanislav Shwartsman
8308a47168 trying to get rid of b1() in instruction class 2010-09-24 21:15:16 +00:00
Stanislav Shwartsman
1107ce138e small fetchdecode optimization 2010-09-07 19:54:50 +00:00
Stanislav Shwartsman
55cb12badf fixed missed canonical failure on system access 2010-07-22 20:12:25 +00:00
Stanislav Shwartsman
91ac0df65c implemented GS/FS BASE access instructions published in _319433-007.pdf document 2010-07-22 16:41:59 +00:00
Stanislav Shwartsman
59ad9d8de8 Fixes 2010-07-15 20:18:03 +00:00
Stanislav Shwartsman
30fecf9792 changes in comments only 2010-04-22 17:51:37 +00:00
Stanislav Shwartsman
50462dde9a RDTSCP could be run outside long64 2010-04-08 16:38:41 +00:00
Stanislav Shwartsman
9cece96d14 fixes 2010-04-04 18:46:03 +00:00
Stanislav Shwartsman
7c42447c77 move secondary VMEXEC controls to -enable-vmx=2 option
EPT coming next
2010-04-03 07:30:23 +00:00
Stanislav Shwartsman
d39d485ece changes variable name to better one 2010-04-03 05:59:07 +00:00
Stanislav Shwartsman
93220f6b6e fixes 2010-04-02 21:22:17 +00:00
Stanislav Shwartsman
33262356ec small optimization 2010-03-27 16:30:01 +00:00
Stanislav Shwartsman
f5ce2a7639 split crreg access functions to separate file 2010-03-25 21:33:07 +00:00
Stanislav Shwartsman
da656bf93d optimization for paging disable mode + preparing for future 2010-03-19 17:00:05 +00:00
Stanislav Shwartsman
79466dffe2 apic virtualization + vmx fixes 2010-03-16 14:51:20 +00:00
Stanislav Shwartsman
f0ac7c576e enable secondary proc-based ctrls 2010-03-15 15:48:01 +00:00
Stanislav Shwartsman
1c6cc35b06 fixed TPR shadow 2010-03-15 14:18:36 +00:00
Stanislav Shwartsman
3b3b920795 vmx updates 2010-03-15 13:47:18 +00:00
Stanislav Shwartsman
cffe32dd2c remove unused param from exception() call 2010-03-14 15:51:27 +00:00
Stanislav Shwartsman
b6f8ccb91c missed include 2010-03-12 11:35:34 +00:00
Stanislav Shwartsman
4ce211e358 MWAIT_IS_NOP option 2010-03-12 11:28:59 +00:00
Stanislav Shwartsman
173f4ed1f9 fixed perm check for MONITOR 2010-03-07 09:41:12 +00:00
Stanislav Shwartsman
11de02bd89 MONITOR/MWAIT: rewritten MONITOR/MWAIT implementation from scratch 2010-03-07 09:16:24 +00:00
Stanislav Shwartsman
14b578938d bugfixes and cleanups 2010-03-03 14:33:35 +00:00
Stanislav Shwartsman
5b6a14656d Make XSAVE as runtime option 2010-02-26 22:53:43 +00:00
Stanislav Shwartsman
927c3594d6 enable compilation with CPU_LEVEL <= 6
converted SEP to runtime option as well
2010-02-26 11:44:50 +00:00
Stanislav Shwartsman
033a20b3b2 allow to configure CPU features at runtime - implemened on example of SSE/AES/MOVBE/POPCNT 2010-02-25 22:04:31 +00:00
Stanislav Shwartsman
c201a53c76 cleanup and optimization 2010-02-15 14:04:48 +00:00
Stanislav Shwartsman
c3a73d3579 comment out CS.LIMIT demotion fix - it causes too big slowdown.
Need to think about better solution
+ small optimization
2010-01-31 18:06:45 +00:00
Stanislav Shwartsman
bd60e0264c change Copyright to Bochs Project 2009-12-04 16:53:12 +00:00
Stanislav Shwartsman
f57e382416 bugfix for Instruction SYSRET and SS(PL) 2009-11-21 09:57:10 +00:00
Stanislav Shwartsman
b3ad88f23d typofix 2009-11-08 21:03:59 +00:00
Stanislav Shwartsman
6f0db17b08 fixed #DB on rpeat instructions 2009-10-30 09:13:19 +00:00
Stanislav Shwartsman
d5c190ab2b Merged #SF patch: fix CS segment type during fast syscall invocation 2009-10-07 15:45:15 +00:00
Stanislav Shwartsman
85f1004ce0 implemented TPR shadow feature for VMX 2009-09-30 05:57:21 +00:00
Stanislav Shwartsman
d26660dac1 small fixes 2009-08-19 09:59:30 +00:00
Stanislav Shwartsman
54e3422e1b bugfix 2009-08-15 15:36:35 +00:00
Stanislav Shwartsman
8a95120e12 deprecate --enable-vme option, now it will be supported iff CPU_LEVEL >= 5 (like in real life) 2009-08-10 15:44:50 +00:00
Stanislav Shwartsman
cd445195dd cleanup configure options. All paging related stuff is now automatically set/unset according to cpu-level option.
Related configure options (--enable-pae, --enable-mtrr, --enable-global-pages, --enable-large-pages) are deprecated.
Less configure options - less configure problems :)
2009-06-15 09:30:56 +00:00
Stanislav Shwartsman
f59f067368 compilation err fixed 2009-06-12 11:45:05 +00:00
Stanislav Shwartsman
03ba2ec988 implement pdptr checks in legacy PAE mode 2009-05-31 07:49:04 +00:00
Stanislav Shwartsman
222129db4b Rewritten long mode page walk - large code cleanup and few bugfixes 2009-05-30 15:09:38 +00:00
Stanislav Shwartsman
6fe6da5f25 small fixes 2009-05-07 12:00:02 +00:00
Stanislav Shwartsman
4fc66aab31 Fixes for compilation by Visual Studio 2008 2009-04-07 16:12:19 +00:00
Stanislav Shwartsman
9e092a86c3 merge "system" and "segment" blocks of descriptor 2009-04-05 19:09:44 +00:00
Stanislav Shwartsman
c9383813f0 don't have to keep both limit and limit_scale 2009-04-05 18:16:29 +00:00
Stanislav Shwartsman
c9d63a4e53 redo x86 hw i/o breakpoint stuff 2009-03-28 08:27:01 +00:00
Stanislav Shwartsman
4470c6a1c8 make ICACHE always enabled option and deprecate it in the configure script
Trace cache still can be turned off
2009-03-13 18:48:08 +00:00
Stanislav Shwartsman
2bdc6ff231 insert updateFetchModeMask into handleCpuModeChange - avoid bugs in future 2009-03-10 22:28:08 +00:00
Stanislav Shwartsman
bc8be4ed06 Fixed CR8 read 2009-02-27 20:00:02 +00:00
Stanislav Shwartsman
3564ef3162 small fixes 2009-02-18 22:33:06 +00:00
Stanislav Shwartsman
3a1852ea23 take local APIC read/write access into CPU class from BX_MEM (needed for APIC virtualization later) 2009-02-17 19:20:47 +00:00
Stanislav Shwartsman
a5badd3b83 - bugfixes 2009-02-13 09:51:57 +00:00
Stanislav Shwartsman
6003f52704 Fixed compilation error + x86-64 correctness fix 2009-02-09 19:46:34 +00:00
Stanislav Shwartsman
aeaf51d33a FIxed #DB exception in 64-bit mode 2009-02-06 15:25:57 +00:00
Stanislav Shwartsman
7c0582e4ea Some fixes for X86-64 OFF mode 2009-02-04 16:05:47 +00:00
Stanislav Shwartsman
26fda0626d Added missed CR0 reserved bits #GP in long mode 2009-02-03 21:11:31 +00:00
Stanislav Shwartsman
f6cb9e529f Fixes for VMX emulation 2009-02-02 18:59:44 +00:00
Stanislav Shwartsman
2378d31998 Fixes for DR6 handling 2009-02-01 20:47:06 +00:00
Stanislav Shwartsman
f8185a6bc6 Added Intel VMX emulation to Bochs CPU 2009-01-31 10:43:24 +00:00
Stanislav Shwartsman
a1c11c788b sepatate activity state from debug trap 2009-01-29 20:27:57 +00:00
Stanislav Shwartsman
0325c120b2 Separate PAUSE instruction from regular NOP 2009-01-27 20:29:05 +00:00
Stanislav Shwartsman
62005d4fd9 Minimize diff with VMX support branch 2009-01-23 09:26:24 +00:00
Stanislav Shwartsman
29a252b26e final version of exceptions cleanups/interface changes 2009-01-21 22:09:59 +00:00
Stanislav Shwartsman
cc60240dc1 cleanup RDMSR 2009-01-19 17:43:54 +00:00
Stanislav Shwartsman
eaa00237c1 Notify debugger about MWAIT executed 2009-01-17 16:55:13 +00:00