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143 Commits

Author SHA1 Message Date
Stanislav Shwartsman
76def09c07 Complete the FXRSTOR fix 2005-09-06 19:12:02 +00:00
Stanislav Shwartsman
f09f1d8b98 Fixed restoring of XMM regs in fxrestor 2005-09-05 17:02:30 +00:00
Stanislav Shwartsman
80c895498e Fixed comments for code 2005-08-10 18:40:38 +00:00
Stanislav Shwartsman
a66b45e024 Fixed bug for masked writes in 64-bit mode 2005-08-10 18:34:00 +00:00
Stanislav Shwartsman
afe3ff691d Another fix for FPU tag word restore in FXRESTOR instruction (the tags were assigned to incorrect registers) 
Fixed FPU print state status word printing (printed partial status instead of normal status word)
 2005-06-18 20:46:08 +00:00
Stanislav Shwartsman
2f4a3367e4 Fixed FPU TAG WORD restore in FXRESTOR instruction 2005-06-13 20:25:16 +00:00
Volker Ruppert
821ff1e87c - clarify operator precedence (needed by MSVC) 
- defined symbol BOCHSAPI_MSVCONLY for special cases in MSVC
 2005-06-09 17:42:34 +00:00
Stanislav Shwartsman
d10731f162 Update my e-mail in source files 
Update committed SF patches in changes
 2005-05-12 18:07:48 +00:00
Stanislav Shwartsman
3074078297 Added CVS version header to all the files. 
One more small change in APIC
 2005-03-19 20:44:01 +00:00
Stanislav Shwartsman
02dec84af9 Fix FXSAVE/FXRSTOR instructions exceptions handling 2004-07-03 11:02:43 +00:00
Stanislav Shwartsman
cc61e5d5d5 Leave aligment in floatx80 reg to compiler. 
CPU code no longer assume that floatx80 register is 16-byte aligned
 2004-07-02 20:24:47 +00:00
Stanislav Shwartsman
5c5b556f24 Merge softfloat-fpu-implementation_ver4_branch branch 2004-06-18 14:11:11 +00:00
Stanislav Shwartsman
33b50ec4c4 For spammers o 2004-04-08 17:17:47 +00:00
Stanislav Shwartsman
cc7b85ae7e just update release dates 2004-02-13 21:27:45 +00:00
Stanislav Shwartsman
be9c0aeeec Enable FXSAVE/FXRESTOR instructions for BX_HACKED_CPU_LEVEL=6 also 2003-12-29 21:23:46 +00:00
Stanislav Shwartsman
2f20c087c3 Remove code duplication from FXRSTOR functioN 2003-10-25 10:32:54 +00:00
Stanislav Shwartsman
ac20b6405a - FXSAVE/FXRSTOR instructions should be available in P6 mode 
- Added second UD2 opcode to fetchdecode
- Added RDPMC instruction to fetchdecode
- 'changes' updated
 2003-10-24 18:34:16 +00:00
Stanislav Shwartsman
7f570b0150 Added PNI new streaming extensions instructions 
PNI could be enabled by setting BX_SUPPORT_PNI in config.h
After the feature will be fully validation I'll also add configure option.

The implemntation is ~complete. I've missed only three FPU new opcodes of FUSTTP instruction and MONITOR/WAIT instructions.

Enjoy ! ;)
 2003-08-29 21:20:52 +00:00
Stanislav Shwartsman
1616539667 additional FPU changes 2003-08-01 09:32:33 +00:00
Stanislav Shwartsman
b6ff1e6d9d dos2unix for softfloat 
fixed denormals handling for MUL/DIV instructions
 2003-05-26 19:30:33 +00:00
Stanislav Shwartsman
928e20bd49 Changed some BX_INFO messages to BX_DEBUG 2003-05-15 18:32:27 +00:00
Stanislav Shwartsman
1d45167e5b Merged NEW-INSTRUCTIONS branch 2003-05-15 16:41:17 +00:00
Stanislav Shwartsman
3485368ead Ups, forgot smth ;) 2003-04-23 18:55:25 +00:00
Stanislav Shwartsman
ba2b84e604 Implemented MASKMOVQ and MASKMOVDQU instructions 2003-04-23 18:51:37 +00:00
Stanislav Shwartsman
40bd4f138b Little style changes 
Elliminated i387_t alimit field (not used in FPU)
 2003-04-16 18:38:53 +00:00
Stanislav Shwartsman
aa9152129c Changes in i387 register file definition. Define common FPU/MMX register file. 2003-04-12 21:02:08 +00:00
Stanislav Shwartsman
7db893970c Read attributes bits even for BxSplit11b opcodes 
Move lock prefix check later in fetchdecode function when all attributes is ready.
 2003-04-06 19:08:31 +00:00
Stanislav Shwartsman
8193a710ad Changed MMX/SSE/SSE2 diagnostic messages to be more informative 2003-03-21 20:33:23 +00:00
Stanislav Shwartsman
5991599dca Added BX_INFO messages when execution FXSAVE/FXRSTOR instructions 2003-01-23 18:50:37 +00:00
Stanislav Shwartsman
5222261080 Save/Restore FPU TOP-OF-STACK in FXSAVE/FXRSTOR instructions 2003-01-23 18:33:35 +00:00
Stanislav Shwartsman
e1b8e5b9f9 Fixed FTW save/restore in FXSAVE/FXRSTOR opcodes 2003-01-23 17:53:11 +00:00
Stanislav Shwartsman
d1edcde9ed Cleanup Peter's change in MOVNTI instruction 2003-01-14 14:58:56 +00:00
Peter Tattam
b2622c5d04 Temporary tweak to reinstate a change that disappeared when sse2.cc was removed. 
The 64 bit variant of MOVNTI was not decoded.  The proper fix for this is to work on
fetchdecode64.cc to call a 64 bit variant of SSE instructions or fail it with a
invalid op.  A careful check needs to be done with the AMD manuals to determine if
there are any other SSE instructions that have a special 64 bit decoding.
 2003-01-14 06:50:01 +00:00
Stanislav Shwartsman
513db033ab fixed compilation error and a logic bug together 2003-01-09 05:21:22 +00:00
Stanislav Shwartsman
e6eacd984f Implemented MOVD 64bit extensions 2003-01-08 20:33:28 +00:00
Stanislav Shwartsman
7dcd9ab8ec * implemented MOVLHS/MOVHPS/MOVHLPS/MOVLHPS opcodes 
* another reorganization of SSE code
 2002-12-30 18:10:10 +00:00
Stanislav Shwartsman
b08f208b9f Fixed compilation error 2002-12-24 20:59:55 +00:00
Stanislav Shwartsman
6acff47112 Implemented the following SSE instructions (sse_move.cc): 
MOVSS_VssWss
MOVSS_WssVss
MOVSD_VsdWsd
MOVSD_WsdVsd
MOVMSKPS_GdVRps
MOVMSKPD_EdVRpd
MOVQ_VqWq
MOVQ_WqVq
SHUFPS_VpsWpsIb
SHUFPD_VpdWpdIb
 2002-12-24 20:19:35 +00:00
Stanislav Shwartsman
4b59ecbc62 Implemented SSE/SSE2 duplicate opcodes in more intellegent way ... 2002-12-22 21:48:23 +00:00
Stanislav Shwartsman
e73df72525 implementation of additional SSE/SSE2 instructions 2002-12-22 20:42:56 +00:00
Stanislav Shwartsman
1cd38bb7dd Recommitted SSE code reorganization. 
Fix in FXSAVE/FXRESTOR opcodes -> If the OSFXSR bitCR4 is not set, the FXRSTOR instruction does not restore the states of the XMM and MXCSR registers.
 2002-12-22 20:13:00 +00:00
Bryce Denney
9b2914fd1d - Temporarily revert Stanislav's changes between 2002-12-18 and 2002-12-19. 
Because source files were added/removed it would require an update
  of the windows and macos project files, so I want to wait until after 2.0.
    M Makefile.in         1.51 back to 1.50
    M cpu.h               1.121 back to 1.120
    M fetchdecode.cc      1.37 back to 1.36
    M fetchdecode64.cc    1.33 back to 1.32
    M sse.cc              1.17 back to 1.16
    A sse2.cc             1.27 back to 1.26  (added back)
    R sse_move.cc         removed
    R sse_pfp.cc          removed
- to bring these changes back again, all we have to do is
  "cvs update -j tmp-before1 -j tmp-after1"
 2002-12-19 05:53:18 +00:00
Stanislav Shwartsman
aa361badf2 Reorganized SSE/SSE2 code 
sse.cc -> general SSE stuff and SSE integer (MMX extensions)
sse_move.cc -> memory transfer and shuffle opcodes
sse_pfp.cc -> packed floating point operations
 2002-12-18 22:33:44 +00:00