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88 Commits

Author SHA1 Message Date
Stanislav Shwartsman
2f582db722 compile less stuff for cpu-level=5 2011-06-26 19:15:30 +00:00
Stanislav Shwartsman
d440a5eda0 avx bug fix 2011-04-29 23:06:50 +00:00
Stanislav Shwartsman
7ced718040 implemented AVX instructions support 
many changes - some cleanup will follow
please report ay found bugs !
 2011-03-19 20:09:34 +00:00
Stanislav Shwartsman
7d80a6ebe0 Adding Id and Rev property to all files 2011-02-24 21:54:04 +00:00
Stanislav Shwartsman
57d01889b1 Fixed PCMPGTQ instruction 2011-02-19 11:00:43 +00:00
Stanislav Shwartsman
b5ebe5865e Fixes for incoming bug report, missed changes in CVS, repository fixups and etc 2011-02-11 09:56:23 +00:00
Stanislav Shwartsman
5915d92775 very small optimizations + indent 2011-01-25 20:59:26 +00:00
Stanislav Shwartsman
5917eb29ab sse + mmx optimizations 2011-01-16 21:01:28 +00:00
Stanislav Shwartsman
8c5c078b13 optimize sse and mmx code 2011-01-16 20:42:28 +00:00
Stanislav Shwartsman
a80b44b6db split more sse ops 2011-01-09 20:18:02 +00:00
Stanislav Shwartsman
37204c0aaa split more SSE ops 2011-01-08 12:28:25 +00:00
Stanislav Shwartsman
a1bc92a46b split more SSE opcodes 2011-01-08 11:20:29 +00:00
Stanislav Shwartsman
f9f868247a split more SSE ops 2010-12-30 20:35:10 +00:00
Stanislav Shwartsman
1bd512e98d split more SSE ops, optimizations in MMX code 2010-12-25 17:04:36 +00:00
Stanislav Shwartsman
c005444d5b split more SSE opcodes 2010-12-25 07:59:15 +00:00
Stanislav Shwartsman
040a8e1a3a split bunch of SSE opcodes 2010-12-24 08:35:00 +00:00
Stanislav Shwartsman
43600f3756 complete rework of SSE code 
next step - split all SSE opcodes by ModC0
 2010-12-22 21:16:02 +00:00
Stanislav Shwartsman
9aa503cb9d fixed warnings for win64 compilation 2010-11-23 14:59:36 +00:00
Stanislav Shwartsman
3dfcfd0ccd Split shift opcodes | optimize SAR opcode 2010-05-18 07:28:05 +00:00
Stanislav Shwartsman
01de3e1926 PEXTRB/W/D/EXTRACTPS fixed 2010-04-02 19:03:47 +00:00
Stanislav Shwartsman
927c3594d6 enable compilation with CPU_LEVEL <= 6 
converted SEP to runtime option as well
 2010-02-26 11:44:50 +00:00
Stanislav Shwartsman
033a20b3b2 allow to configure CPU features at runtime - implemened on example of SSE/AES/MOVBE/POPCNT 2010-02-25 22:04:31 +00:00
Stanislav Shwartsman
70dc124b3a 1st step of moving CPU options to runtime 2010-02-24 19:27:51 +00:00
Stanislav Shwartsman
7254ea36a1 copyright fixes + small optimization 2009-10-14 20:45:29 +00:00
Stanislav Shwartsman
08de514d9c code cleanup for future optimization 2009-03-10 21:43:11 +00:00
Stanislav Shwartsman
9929e6ed78 - updated FSF address 2009-01-16 18:18:59 +00:00
Stanislav Shwartsman
bc381e51da very small cleanups 2008-09-19 19:18:57 +00:00
Stanislav Shwartsman
a8adb36dc2 Implemented MOVBE Intel Atom(R) instruction 2008-08-11 18:53:24 +00:00
Stanislav Shwartsman
5dd02b26e3 Make even more efficient RmAddr calculation - good optimizing compiler could make more efficient code than it was before 2008-08-08 09:22:49 +00:00
Stanislav Shwartsman
709d74728d Call #UD exception directly instead of UndefinedOpcode function - for future use 2008-07-13 15:35:10 +00:00
Stanislav Shwartsman
81b1a0ddb7 Fixed bug in BLENDVPS/PD instructions 2008-05-10 22:20:05 +00:00
Stanislav Shwartsman
ec1ff39a5f Splitted memory access methods for 32 and 64-bit code. 
The 64-bit code got >10% speedup, the 32-bit code also got about 2% because laddr cacluation optimization
 2008-05-10 18:10:53 +00:00
Stanislav Shwartsman
167c7075fb Use fastcall gcc attribute for all cpu execution functions - this pure "compiler helper" optimization brings additional 2% speedup to Bochs code 2008-03-22 21:29:41 +00:00
Stanislav Shwartsman
7e490699d4 Removing hooks for not-implemented SSE4A from the Bochs code. 2008-03-21 20:04:42 +00:00
Stanislav Shwartsman
a2897933a3 white space cleanup 2008-02-02 21:46:54 +00:00
Stanislav Shwartsman
d9984bb3a1 Eliminate BxResolve call from the heart of cpu loop and move into instructions that really require this calculation. Yes, it blows the code of EVERY CPU method but it has >15% speedup ! 2008-01-10 19:37:56 +00:00
Stanislav Shwartsman
5d4e32b8da Avoid pointer params for every read_virtual_* except 16-byte SSE and 10-byte x87 reads 2007-12-20 20:58:38 +00:00
Stanislav Shwartsman
b516589e4e Changes in write_virtual_* and pop_* functions -> avoid moving parameteres by pointer 2007-12-20 18:29:42 +00:00
Stanislav Shwartsman
1e843cb462 Decode SSE4A 
Rework immediate bytes decoding to make it faster
 2007-12-15 17:42:24 +00:00
Stanislav Shwartsman
83f6eb6945 Changes copyrights for the files I wrote :) 
Also split EqId G1 group for x86-64
 2007-11-17 23:28:33 +00:00
Stanislav Shwartsman
dbb91069f4 Added SSE4_2 instructions emulation 2007-10-01 19:59:37 +00:00
Stanislav Shwartsman
3e3254ecc4 some speedup for SSE code - achived by code simplification 2007-09-20 22:55:03 +00:00
Stanislav Shwartsman
895891b673 Implemented #AC check under configure option 
Fixes in misaligned SSE support
 2007-07-31 20:25:52 +00:00
Stanislav Shwartsman
5189cfbf10 SSE4 support 2007-04-19 16:12:21 +00:00
Stanislav Shwartsman
bdc4905c8a Correctly detect SSE2 and SSE instructions and #UD when SSE2 is OFF for SSE 2007-04-02 10:46:33 +00:00
Stanislav Shwartsman
26f08fdb2c Change my e-mail to #SF one 2007-03-23 21:27:13 +00:00
Stanislav Shwartsman
1ec33ec518 Correctly #UD on aliased instructions when no SSE2 is configured 2007-03-22 22:51:41 +00:00
Stanislav Shwartsman
f8003098b1 Rename SSE4 to SSE3E to match intel docs. SSE4 coming later ;) 
Fixed "last prefix" for REX in 64-bit mode
 2007-01-25 19:09:41 +00:00
Stanislav Shwartsman
16713b309d PALIGNR fixed 2006-05-16 16:20:26 +00:00
Stanislav Shwartsman
03eac64013 Added decoding of new SSE4 instructions (recently published in Intel docs) 
At least CPUID detects them correctly
The code is never tested (still) ! (but should work fine)
 2006-04-06 18:30:05 +00:00