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1eb1a8d641
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12173 Commits

Author SHA1 Message Date
Dreg
1eb1a8d641
add dbginfo support for 64 bit entries (LDT,GDT) long mode (#33) 2022-08-21 11:06:03 +03:00
Stanislav Shwartsman
fac15a7d03 updates to MTF code: 
if VMEntry delivered an event of event happen right after VMEntry - MTF becomes pending immediatelly
 2022-08-16 21:37:36 +03:00
Stanislav Shwartsman
b946570838 implemented VMX Monitor Trap Flag handling 2022-08-16 21:17:05 +03:00
Stanislav Shwartsman
180c1f09d5 fixed compilation 2022-08-14 21:18:25 +03:00
Stanislav Shwartsman
c9d8413422 allow TLB caching of SPP paging writes 
it is possible that SPP-protected subpage block is allowing write but all others are not.
the TLB entry cannot be cached as writeOK based on SPP subblock check
 2022-08-14 21:09:18 +03:00
Stanislav Shwartsman
97a2cdd85f update VMEXIT reasons according to published docs 
update list of trap-like VMEXITs
 2022-08-13 23:25:10 +03:00
Stanislav Shwartsman
df849619be more SPP limitations 2022-07-31 22:07:16 +03:00
Stanislav Shwartsman
f052c0f5b2 - VMX: Implemented missing SPP Misconfiguration condition (odd bits of SPP PTE entry are reserved) 
- VMX: Fix SPP walk and VMCS access memory type to WB (match memory type listed in IA32_VMX_BASIC MSR)
 2022-07-31 19:57:38 +03:00
Stanislav Shwartsman
13aa25919a Revert "do not ignore MSR=0 even if ignore_bad_msrs is set" 
MSR=0 is valid MSR (used for Machine Check Architecture)

This reverts commit cf03c00ef0.
 2022-07-31 18:47:13 +03:00
Stanislav Shwartsman
4d227d15fb remove instrument.h from bochs.h so it won't be included everywhere 
include it only where required
move PHY_ADDRESS reserved bits consts to cpu.h
 2022-07-30 22:35:43 +03:00
Stanislav Shwartsman
cf03c00ef0 do not ignore MSR=0 even if ignore_bad_msrs is set 2022-07-30 19:53:10 +03:00
Stanislav Shwartsman
d576eaa7c1 list in debug CR4 more already published bits (UINTR) 
fix debug print of XCR0
 2022-07-30 19:15:32 +03:00
Stanislav Shwartsman
3f65841714
use boolean constants true/false instead of 0/1 (#26) 
* use boolean constants true/false instead of 0/1

* fix code comment

Co-authored-by: Stanislav Shwartsman <sshwarts@users.sourceforge.net>
 2022-07-30 18:38:22 +03:00
Stanislav Shwartsman
0f9aec0e1a Merge branch 'master' of https://github.com/stlintel/Bochs 2022-07-30 15:43:25 +03:00
Stanislav Shwartsman
2093c2b1a3 allow 'Save guest MSR_PERF_GLOBAL_CTRL on VMEXIT' VMX control 
at least fake it
 2022-07-30 15:43:09 +03:00
Stanislav Shwartsman
f44f4ae753
MBE (Mode Based Execution Control) emulation (#22) 
* MBE (Mode Based Execution Control) emulation
 2022-07-30 15:26:47 +03:00
Stanislav Shwartsman
fb09790846 dos2unix to all files 2022-07-30 14:31:16 +03:00
Stanislav Shwartsman
e32d536abe
added ability to select memory block size configurable (#25) 
very large memory configurations require large memory block (or very large amount of blocks)
 2022-07-30 13:56:09 +03:00
Stanislav Shwartsman
8afd14972e
convert many consts from #define to enum or const variables (#23) 2022-07-27 23:20:47 +03:00
Stanislav Shwartsman
94503e7a0b
cpu/vmx definitions (#20) 
* update vmx.h with recently published definition
* update actions after conflicts
 2022-07-27 20:51:25 +03:00
Stanislav Shwartsman
430ba44b0e
Create hc-cpp.yml (#19) 
* Create hc-cpp.yml

* update actions

* update actions

* update actions

* update actions

* update actions

* fix format string for VMX preemption timer dbg message
Fix compilation with BX_HAVE_XRANDR_H = 0: XRRQueryExtension is not available

* update actions

* add .conf.everything to testing

Co-authored-by: Stanislav Shwartsman <sshwarts@users.sourceforge.net>
 2022-07-27 01:26:55 +03:00
Satoshi Tanda
88f881c6d5
Fix that the INIT signal remains pending even after delivery of VM-exit/#VMEXIT(INIT) (#16) 
* Clear pending INIT signal

When the INIT signal is translated into corresponding VM-exit/#VMEXIT,
the signal should no longer be marked as pending. Otherwise, the signal
would be (incorrectly) delivered again.

* Remove trailing space and fix an incorrect indent
 2022-07-24 07:14:01 +03:00
Satoshi Tanda
0ae5e67894
Fix that the blocking by SMI bit maybe set when a VM-exit ends outside SMM (#15) 
* Fix that the blocking by SMI bit is set

The blocking by SMI bit of the guest interruptibility state VMCS should
not be set unless the VM-exit ends in SMM. This only happens under the
dual-monitor treatment, which is not implemented in Bochs.

* Remove trailing whitespaces
 2022-07-23 19:36:31 +03:00
Dreg
112afe5693
Add "bt" command to help (#9) 2022-07-18 13:10:22 +03:00
Dreg
35277e61f5
add string argument for instrument command (#8) 2022-07-18 10:25:35 +03:00
Stanislav Shwartsman
a8ef631a39
define and mention newly disclosed CPUID bits (#7) 
Co-authored-by: Stanislav Shwartsman <sshwarts@users.sourceforge.net>
 2022-07-17 18:45:36 +03:00
Stanislav Shwartsman
c25b9d3509
fixing coding style in bios source files (#6) 
Co-authored-by: Stanislav Shwartsman <sshwarts@users.sourceforge.net>
 2022-07-17 18:16:44 +03:00
Dreg
d861786fd3 port instrument/examples to current version 2022-07-16 14:30:00 +02:00
ughoavgfhw
b8f38eb8d3 Fix two bugs around monitor/mwait 
MONITOR relies on tickle_read_virtual to set the physical address, but it was
only doing so on TLB miss. So a MONITOR with a TLB hit would arm the most
recently accessed address instead of the requested one.

TLB invalidations disarmed the monitoring range, but didn't wake a CPU that
had already MWAIT-ed. Any instruction that invalidated TLB entries on other
CPUs could have caused an MWAIT-ing CPU to never wake.
 2022-07-13 21:51:15 -05:00
Volker Ruppert
92622f16b9 Updated / improved information about configure shortcut scripts. 2021-11-04 17:44:57 +00:00
Volker Ruppert
7356cbce4d Updated developer doc: the legacy disassembler has been removed. 2021-10-25 15:51:36 +00:00
Volker Ruppert
693a8746d7 Added variable CONFIGURE_ARGS to simplify adding/overriding options. 2021-10-24 15:32:23 +00:00
Volker Ruppert
eef679a8a4 Some documentation fixes. 2021-10-18 19:31:16 +00:00
Volker Ruppert
1408de3ad2 Fixed and improved PCI slot config error handling. 2021-10-14 17:59:08 +00:00
Volker Ruppert
631e839046 Added changes after release. 2021-09-12 15:47:28 +00:00
Volker Ruppert
3e333a0d79 Removed APIC timer handles from save/restore list. They are set by the 
constructor and should not be modified. Timer activation after restore is not
necessary.
 2021-09-12 15:13:20 +00:00
Volker Ruppert
26914d0058 MWAIT timer fixes (to be completed). 
- Fixed MWAIT timer activation.
- A timer handle should not appear in the save/restore list.
- TODO: Activate MWAIT timer after restore if necessary.
 2021-09-10 16:54:54 +00:00
Volker Ruppert
52b0000db7 Applied two patches from Debian. 
- Apply standard flags from environment everywhere (SF patch #546).
- Allow overriding ld and objcopy for building bios on non-x86 platforms.
 2021-09-10 15:33:22 +00:00
Stanislav Shwartsman
f074c10b75 merge memory handling fix by Nikolai Zhubr 2021-08-25 17:42:08 +00:00
Volker Ruppert
412285baed Fixed compilation for big endian architectures (SF patch #563). 2021-08-24 19:06:01 +00:00
Volker Ruppert
d684c5cd57 Added missing updates after release. 2021-08-08 16:03:16 +00:00
Volker Ruppert
c9c3416098 Regenerated configure script. 2021-08-01 21:45:35 +00:00
Volker Ruppert
fbb7e29154 Updates after release. 2021-08-01 21:44:37 +00:00
Volker Ruppert
50b0ab2895 Regenerated configure script and recompiled BIOS images for release. 2021-08-01 08:12:28 +00:00
Volker Ruppert
b924b92ecc Preparing final release 2.7. 2021-08-01 08:07:38 +00:00
Volker Ruppert
0a956e2cf1 Fixed two external links. 2021-08-01 07:40:18 +00:00
Volker Ruppert
4c32ca7b16 Fixed some MSVC warnings in the cpu code (unsafe use of bool type). 2021-07-27 19:18:34 +00:00
Volker Ruppert
a1058990ba Trailing '../\' breaks compilation with MSVC nmake. Regenerated dependencies. 2021-07-27 18:13:26 +00:00
Volker Ruppert
452201a231 Fixed two compiler warnings in the cpu code. 2021-07-27 15:36:11 +00:00
Stanislav Shwartsman
1455788fe4 remove cpudb.h from some Makefile dependencies. it should be only in cpu/init.cc and config.cc 2021-07-25 18:21:41 +00:00