Stanislav Shwartsman
6a4e8ff2f1
fixed typo in prev commit
2017-12-13 21:08:10 +00:00
Stanislav Shwartsman
f362f34ed6
correctly decode PINSRQ instruction
2017-12-13 20:59:41 +00:00
Stanislav Shwartsman
50a799ea11
split handlers for PINSRD/Q opcodes. fix disasm for MULX instruction
2017-12-13 20:18:59 +00:00
Stanislav Shwartsman
07bff3be43
fixed decoding of VPINSRB/W/D/Q and VINSERTPS with EVEX prefix
2017-12-13 20:02:12 +00:00
Stanislav Shwartsman
8a311515dd
correctly decode VPEXTRB/W/D/Q - these opcodes allowed to be with VEX.L=0 only
...
fixed disasm module compilation with no AVX enabled
remove duplicate opcode handlers
2017-12-13 19:51:25 +00:00
Stanislav Shwartsman
2f3c9d3c8c
correct disasm for movsxd opcode
2017-12-13 18:44:13 +00:00
Stanislav Shwartsman
c1dc514c2a
clarify disasm of movlhps/movhlps opcodes
2017-12-12 08:55:09 +00:00
Stanislav Shwartsman
fd953421f4
new disasm: add correct memaccess size for FLDCW
2017-12-11 19:58:09 +00:00
Stanislav Shwartsman
a84d9cf1c7
disasm: fix crc32 operand description
2017-12-11 19:45:50 +00:00
Stanislav Shwartsman
a028ef7c9c
bugfix for decoder with EVEX enabled
2017-12-11 19:29:11 +00:00
Stanislav Shwartsman
e46f37b40e
fixed disasm of memsize for sse legacy instructions
2017-12-11 18:33:33 +00:00
Stanislav Shwartsman
404a5f2c53
bugfix for previous commit
2017-12-11 16:41:48 +00:00
Stanislav Shwartsman
b03f78d652
updates for bochs decoder and decoder based disasm
2017-12-11 15:45:43 +00:00
Stanislav Shwartsman
c80e587ded
properly handle kmask registers in modrm form
2017-12-05 19:33:23 +00:00
Stanislav Shwartsman
8f15cfb514
fixed link err with debugger enabled
2017-12-05 19:23:41 +00:00
Stanislav Shwartsman
31ea453921
fixed bogus assert
2017-12-02 16:40:03 +00:00
Stanislav Shwartsman
eaa05c32e8
link without LOGIO for standalone decoder mode
2017-12-01 21:27:30 +00:00
Stanislav Shwartsman
60591800f1
handle lock mov cr0 amd feature out decoder critical path
2017-12-01 21:18:16 +00:00
Stanislav Shwartsman
01067cb4b9
another compilation fix for new disasm stand-alone module
2017-11-29 19:24:00 +00:00
Stanislav Shwartsman
a7e58973ce
fixed typo
2017-11-27 20:26:54 +00:00
Stanislav Shwartsman
c8d9aeb377
mark blocks of code which not supposed to be compiled for stand-alone bochs cpu decoder
2017-11-27 20:25:04 +00:00
Stanislav Shwartsman
cef6c7fb98
fix for new disasm
2017-11-26 19:38:58 +00:00
Stanislav Shwartsman
596b3b6eb8
reduce CPU dependencies from fetchdecode module
2017-11-25 20:20:34 +00:00
Stanislav Shwartsman
0c604d27d1
fixed compilation with no PKEYS enabled
2017-11-12 20:15:48 +00:00
Stanislav Shwartsman
875c38a05c
POPFD/POPFQ always clear RF flag (instead of reading it from stack image)
2017-11-11 12:27:50 +00:00
Stanislav Shwartsman
045a1cd637
XSAVEC/XSAVES should be supported in SKL-X CPUID
2017-11-11 12:04:26 +00:00
Stanislav Shwartsman
180386cd74
VMOVSS/VMOVSD are VEX.VL ignore form and not VEX.L0
2017-11-11 11:58:07 +00:00
Stanislav Shwartsman
f89b8a2742
fixed opcode of ADOX instr
2017-11-11 10:42:21 +00:00
Stanislav Shwartsman
8261a91ce9
implemented GFNI instructions
2017-10-21 19:57:12 +00:00
Stanislav Shwartsman
b7f62a291c
fixed compressed displ form for more avx512 instructions
2017-10-20 19:41:32 +00:00
Stanislav Shwartsman
da8d6e793f
fixed compilation issues
2017-10-20 19:24:10 +00:00
Stanislav Shwartsman
bca076889b
decode all the vbmi2 opcodes, fix vpcompress/vpexpand instruction handler names (affects disasm)
2017-10-20 18:50:10 +00:00
Stanislav Shwartsman
77a62a4dcd
implemented (experimental, still untested) AVX512 VBMI2 extensions
2017-10-20 18:38:15 +00:00
Stanislav Shwartsman
0afbb6cd3d
fixed compilation when AVX is not configured in
2017-10-20 12:27:42 +00:00
Stanislav Shwartsman
5439647254
small change to extract ia_opcodes.h from instr.h to dedicated file. this would remove compilation dep of all files on ia_opcodes.h (now called ia_opcdes.def). regenerating dep ober all files in Makefiles.in
2017-10-19 21:27:25 +00:00
Stanislav Shwartsman
ba1e5bbffa
fixed accidentially broken XMM versions of AES instrructions
2017-10-19 20:25:05 +00:00
Stanislav Shwartsman
15ba88c195
implemented VAES/VPCLMULDQ instructions - VEX/EVEX extensions of AES/PCLMULQDQ
2017-10-19 19:12:55 +00:00
Stanislav Shwartsman
ac442009aa
lazy flags code small refactoring
2017-10-15 22:01:32 +00:00
Stanislav Shwartsman
6daa1ba9ba
fixed compilation issue with EVEX enabled
2017-10-15 20:40:56 +00:00
Stanislav Shwartsman
944f37b1f2
implemented AVX-512 BITALG instructions/bugfix for VPOPCNT instructions
2017-10-15 20:33:19 +00:00
Stanislav Shwartsman
0d190eec8e
implemented AVX-512 VNNI instructions
2017-10-15 19:17:07 +00:00
Stanislav Shwartsman
4179e6f939
add some const
2017-10-14 18:42:12 +00:00
Stanislav Shwartsman
69f27439db
added new cpuid flags mentioned in new Intel SDM future extensions rev030 doc
2017-10-13 20:27:52 +00:00
Stanislav Shwartsman
2d3d62db5f
cleaned cr2 print in 32-bit mode
2017-08-22 21:14:39 +00:00
Stanislav Shwartsman
2a55ba0a39
Merge set of debugger improvements by Doug Gale <doug16k>
...
Here is his original comment:
I have made several improvements in the debugger.
I have fixed several issues with proper handling of 64-bit addresses, and added support for 64 bit symbols.
I also have added several symbol lookups.
2017-08-22 21:03:58 +00:00
Stanislav Shwartsman
f490b00beb
added support for conditional breakpoints in Bochs debugger
2017-08-22 18:47:18 +00:00
Stanislav Shwartsman
7f4a9b4b08
skylake CPUID should compile also with no EVEX
2017-08-09 21:04:15 +00:00
Stanislav Shwartsman
7f01a7d9b6
remove obsolete comment
2017-08-09 20:37:43 +00:00
Stanislav Shwartsman
b2fdbd1274
added Skylake-X model to CPUDB -> with EVEX and AVX512 support
2017-08-09 20:36:17 +00:00
Stanislav Shwartsman
54e969b749
disasm update
2017-06-05 21:05:47 +00:00
Stanislav Shwartsman
20e9e33662
internal disasm updates
2017-06-05 20:49:04 +00:00
Stanislav Shwartsman
3f4f18de7a
internal disasm updates
2017-06-05 20:28:33 +00:00
Stanislav Shwartsman
46ef85ce0f
avoid using magic constants for disasm source metadata
2017-06-05 19:55:40 +00:00
Stanislav Shwartsman
555bb8f8b6
updates to prev commit
2017-06-01 08:41:41 +00:00
Stanislav Shwartsman
6ab4fd597b
implement another form of AR field packing used in SKL, in addition on present NHM format
2017-06-01 08:31:20 +00:00
Stanislav Shwartsman
bde8a1f69d
fixed ifdef typo
2017-06-01 07:48:54 +00:00
Stanislav Shwartsman
22e9051716
implemented correct VM-exit instruction information for INVPCID, RDRAND/RDSEED and XSAVES/XRSTORS instruction Vmexits
2017-05-31 13:16:49 +00:00
Stanislav Shwartsman
bb43ac527b
fixed decoder issue when decoding opcode 8f (aka xop prefix) as well
2017-05-27 10:32:44 +00:00
Stanislav Shwartsman
54c109ceb4
VEX and EVEX opcodes should be considered as 2-byte opcode, always attempt to fetch 2nd byte even if #UD is already detected
2017-05-26 11:46:02 +00:00
Stanislav Shwartsman
af76e0c412
fixes for debugger and disasm
2017-05-10 18:31:59 +00:00
Stanislav Shwartsman
1ca366609f
add memsize for non-evex memory refrences in disasm
2017-05-09 19:49:27 +00:00
Stanislav Shwartsman
f8abddafcf
bugfix in disasm
2017-05-09 19:34:03 +00:00
Stanislav Shwartsman
1d48973c80
updates in fetchdecode.h to help automatic disasm to determined memaccess size
2017-05-09 12:06:02 +00:00
Stanislav Shwartsman
e357da9150
update (c) for fpu files
2017-05-05 21:09:27 +00:00
Stanislav Shwartsman
1abfcd39ff
implement FOPCODE and FDP deprecation CPU features
2017-05-05 20:56:13 +00:00
Stanislav Shwartsman
fce7476bda
convert magic defines into static const variables
2017-05-03 18:20:13 +00:00
Stanislav Shwartsman
3d51439090
fixed compilation err for CPU_LEVEL=5
2017-04-13 05:33:29 +00:00
Stanislav Shwartsman
1a3ff4b438
fixed bogus error message
2017-04-11 18:35:17 +00:00
Stanislav Shwartsman
bad84e48cd
remove redundant memory access from IRET
2017-04-01 05:49:01 +00:00
Stanislav Shwartsman
e351aaa28a
update (c) for tlb.h
2017-03-31 07:34:44 +00:00
Stanislav Shwartsman
a51eb1cc39
added more debug info for TLB through param tree, update year in the (c)
2017-03-31 07:34:08 +00:00
Stanislav Shwartsman
c9c3672509
allow monitor to UC memory type but not MONITORX
2017-03-31 07:00:36 +00:00
Stanislav Shwartsman
566a7aa82b
fixed softfloat FUZ condition. fixed/optimized pmaddwd computing function
2017-03-30 22:11:38 +00:00
Stanislav Shwartsman
a6e7ffb284
implemented undefined flags behavior for SHRD instruction matching HW
2017-03-30 22:03:38 +00:00
Stanislav Shwartsman
097310cd00
fixed integer overflow while computing shift flags, avoid using bx_bool while working with flags for more robust code
2017-03-30 21:53:39 +00:00
Stanislav Shwartsman
862e817884
fixed typo caused compilation err
2017-03-28 19:13:20 +00:00
Stanislav Shwartsman
31d29734d6
some comments about more CPUID leaf 80000008.EBX by Ryzen
2017-03-28 19:11:42 +00:00
Stanislav Shwartsman
b7b0165d3c
new naming convention for UD opcodes
2017-03-28 19:00:00 +00:00
Stanislav Shwartsman
a673612784
fixed permission checks performed by CLFLUSH/CLFLUSHOPT/MONITOR* instructions
2017-03-28 18:52:53 +00:00
Stanislav Shwartsman
e5c64b3b56
cleanup of warning messages from cpuid code
2017-03-26 20:12:14 +00:00
Stanislav Shwartsman
2b79061127
Implemented MONITORX/MWAITX instructions (AMD), enabled in Ryzen CPU model
2017-03-26 19:14:15 +00:00
Volker Ruppert
dd2d03ec0a
The 'del' command doesn't like forward slashes, so the MSVC nmake 'clean'
...
target skipped files in subfolders. Updated cpu makefile dependencies.
2017-03-26 15:55:57 +00:00
Stanislav Shwartsman
411ea954b4
implemented CLZERO instruction from AMD Ryzen CPU
2017-03-25 20:12:31 +00:00
Volker Ruppert
9bef555f3e
Updated build test script and fixed compilation without FPU.
2017-03-19 09:50:16 +00:00
Volker Ruppert
640f5e2ce9
Fixed compilation error.
2017-03-19 07:26:56 +00:00
Stanislav Shwartsman
2c5588cda0
convert some defines to enums and consts
2017-03-18 21:25:06 +00:00
Stanislav Shwartsman
2809e7f5ad
fixed warnings in the cpu code
2017-03-18 07:32:17 +00:00
Stanislav Shwartsman
15d9b068a3
fix msvc warnings
2017-03-17 17:35:15 +00:00
Stanislav Shwartsman
99bfbdf139
add xss exiting bitmap to save/restore
2017-03-16 20:23:49 +00:00
Stanislav Shwartsman
3f80447a10
fixed compilation err with x86-64 disabled
2017-03-16 20:13:42 +00:00
Stanislav Shwartsman
be4c6c7ae5
SMAP opcodes are No-SSE-Prefix
2017-03-16 16:20:58 +00:00
Stanislav Shwartsman
172b0106ac
imvent a bochs feature for AMD TCE and enable EFER.TCE bit
2017-03-15 22:52:08 +00:00
Stanislav Shwartsman
6edf22e754
finally figured out what TCE means in AMD CPUID - and it has EFER.TCE bit related to it
2017-03-15 22:48:27 +00:00
Stanislav Shwartsman
ebbf8f9e0f
adjustments in AMD Ryzen CPUID
2017-03-15 22:14:10 +00:00
Stanislav Shwartsman
3a033fa6db
implemented xsaves/xrstors extensions (supported by Intel Skylake core and AMD Ryzen)
2017-03-15 21:44:15 +00:00
Volker Ruppert
8796abeea6
Some fixes in the build system.
...
- Makefile: cleanup of the 'clean' target (adds missing 'bxhub').
- configure script: create cpudb subdirectories if necessary for building
outside of the source tree.
- cpudb Makefile: clean object files from new location.
2017-03-15 16:51:32 +00:00
Stanislav Shwartsman
c0701a6d42
fixup for Ryzen cpuid
2017-03-13 20:23:39 +00:00
Stanislav Shwartsman
402e2cfad0
move cpuid warning messages to base cpuid class - reduce code cleanup
2017-03-13 19:59:48 +00:00
Stanislav Shwartsman
07166f14b7
reorg of cpudb folder, added AMD Ryzen CPUID placeholder module (still not 100% correct)
2017-03-13 19:44:14 +00:00
Stanislav Shwartsman
980eaa7937
move cpuid leaf 80000008 to base bx_cpuid_t class to remove code dupolication
2017-03-09 21:25:18 +00:00
Stanislav Shwartsman
8664f8f21e
add vex.w into bxInstruction to be used in disasm
2017-01-28 19:25:30 +00:00
Stanislav Shwartsman
49c537521a
simplify disasm code by splitting it into functions
2017-01-22 19:53:42 +00:00
Volker Ruppert
6cf6f6967a
Fixed cpu "make clean" target.
2017-01-13 16:13:42 +00:00
Stanislav Shwartsman
af1d83f35d
update (c)
2017-01-11 20:54:09 +00:00
Stanislav Shwartsman
521d2d10c4
correctly fixed x32 emu compilation err + bugfix for AVX decoder
2017-01-11 20:51:58 +00:00
Stanislav Shwartsman
72e5213ff4
compilation fix and code simplifcation
2017-01-11 19:12:06 +00:00
Stanislav Shwartsman
90c4cb31c5
add SVN header to newly added files
2017-01-10 20:16:24 +00:00
Stanislav Shwartsman
10eb193e01
step 1 of rewrite Bochs decoder: legacy decoder tables done. TODO: avx/evex decoder tables, merge decoder and disasm together
2017-01-10 20:15:17 +00:00
Stanislav Shwartsman
9bd99a604f
implemented recently announced AVX-512 extension VPOPCNT
2016-12-17 13:47:45 +00:00
Stanislav Shwartsman
e613e9ff86
fixed compilation err when no AVX is enabled
2016-12-12 06:18:57 +00:00
Stanislav Shwartsman
7b2a8bb340
added missing EPT misconfig condition check
2016-12-10 05:06:59 +00:00
Stanislav Shwartsman
46b4a76cd3
fetchdecode rework step 0.1, no impact on correctness, small speedup
2016-12-09 12:34:37 +00:00
Stanislav Shwartsman
bd24d7fb17
fixed reset value of xcr0 as published in latest Intel SDM update
2016-10-08 15:17:12 +00:00
Stanislav Shwartsman
1543034fb7
in the latest intel docs PCOMMIT CPUID bit doesn't exists anymore
2016-10-02 11:56:18 +00:00
Stanislav Shwartsman
239f793f37
in the latest intel docs PCOMMIT CPUID bit doesn't exists anymore
2016-10-02 11:54:19 +00:00
Stanislav Shwartsman
42b0714992
rename fetchdecode.cc -> fetchdecode32.cc
2016-09-25 18:25:47 +00:00
Stanislav Shwartsman
d9e818cd5d
refactoring in the Bochs decoder code
2016-09-25 18:19:59 +00:00
Stanislav Shwartsman
8f20cecbae
fixed code style in fetchdecode.cc, avoid code duplication
2016-09-08 17:29:09 +00:00
Stanislav Shwartsman
b7091b09f6
cleanup in fetchdecode functions
2016-09-08 15:09:29 +00:00
Stanislav Shwartsman
14b7fff442
remove unexpected change in fetchdecode.cc
2016-08-30 18:43:36 +00:00
Stanislav Shwartsman
032da78e52
remove SMP and AVX from Android build script. reduce the binary size and make faster binary (SMP makes binary a lot slower)
2016-08-30 18:42:39 +00:00
Volker Ruppert
cd68194269
Added Android host platform support to Bochs based on SF patch #534 .
...
- added Android case to the configure script.
- renamed file memory.h to memory-bochs.h to fix conflict with NDK.
- fixed Android issues in some files.
2016-08-12 17:06:14 +00:00
Stanislav Shwartsman
46e932d04e
fixed INIT cpu state according to clarification published in SDM rev059
2016-07-17 19:16:58 +00:00
Stanislav Shwartsman
88637aa9ef
fixed potential uninitialized variable access when decoding AVX/XOP/EVEX
2016-07-06 09:09:49 +00:00
Stanislav Shwartsman
6761495f7e
second step if Bochs decoder refactoring: extracted assign_srcs code to separate methods
2016-07-05 20:42:25 +00:00
Stanislav Shwartsman
bccc0d40a3
more correct fix for load segment register instruction
2016-07-05 19:37:37 +00:00
Stanislav Shwartsman
2a98e7bc63
fixed decoder bug introduced in svn rev12927
2016-07-05 18:04:23 +00:00
Stanislav Shwartsman
152591469b
bugfix in lfs/lgs in long mode, introduced in svn rev12923
2016-07-05 17:47:36 +00:00
Stanislav Shwartsman
033303399d
properly set segment register for 64-bit decode
2016-07-03 20:07:16 +00:00
Stanislav Shwartsman
98da36a63f
extract decoding of modrm into dedicated function in decoder
2016-07-03 19:51:33 +00:00
Volker Ruppert
586031ca9f
Fixed makefile error.
2016-06-13 18:42:27 +00:00
Stanislav Shwartsman
7a34f00f99
extracted fetchdecode into separated folder under cpu and also out of BX_CPU_C class into stand-alone module. Next step: wrap it up nicely and define clear interace to CPU model to minimize dependencies. Ideally I need fetchdecode to not include CPU at all
2016-06-12 21:23:48 +00:00
Stanislav Shwartsman
8824539630
fix code duplication in segload instr emulation
2016-06-01 20:11:54 +00:00
Stanislav Shwartsman
09e6ee3143
compile disasm module when x86-64 is not compiled in
2016-05-12 11:16:05 +00:00
Stanislav Shwartsman
12ece81e19
look only on valid tlb entries in check_addr_in_tlb_buffers and tlb invalidation methods
2016-05-06 06:57:00 +00:00
Stanislav Shwartsman
dff5e9587b
fixed SMP mode compilation err
2016-05-05 14:15:17 +00:00
Stanislav Shwartsman
009bc7388b
implement more correct vmentry to shutdown sanity check
2016-05-03 19:29:22 +00:00
Stanislav Shwartsman
6a35ceb51a
fixed err msg description
2016-05-03 19:24:52 +00:00
Stanislav Shwartsman
405d7776e8
fixed typo
2016-05-03 19:20:26 +00:00
Stanislav Shwartsman
e1532260e4
fixe compilation on cpu model missing cr4
2016-05-02 17:33:06 +00:00
Stanislav Shwartsman
e24c7e403a
take a funtion from BX_CPU_C:: into fetchdecode.cc standalone function
2016-04-30 19:13:15 +00:00
Stanislav Shwartsman
793ceb0d8c
fix massive code dupliction between disasm, debugger and cpu by introducing new cpu decoder.h header
2016-04-29 21:01:28 +00:00
Stanislav Shwartsman
cc49b504b3
fix small issue on the way to Bochs decoder separation into stand-alone module
2016-04-26 12:46:44 +00:00
Stanislav Shwartsman
ca5882b310
fixed compilation with cpu-level < 5
2016-04-21 15:39:49 +00:00
Stanislav Shwartsman
87cb831a37
fixed compilation w/o x86-64 enabled
2016-04-20 14:46:02 +00:00
Stanislav Shwartsman
adc143684b
implemented Intel architecture extensions published in recently published SDM 058:
...
! Implemented UMIP: User Mode Instruction Prevention (don't allow execution of SLDT/SIDT/SGDT/STR/SMSW with CPL>0)
! Implemented RDPID instruction
Bugfixes in RDPKRU/WRPKRU instructions implementation (Protection Keys feature)
2016-04-15 11:35:32 +00:00
Stanislav Shwartsman
e4832af5ab
clean pkeys when not enabled to avoid side-effects
2016-03-19 21:15:56 +00:00
Stanislav Shwartsman
5b481fe34d
correctly set up pkeys when enabling through cr4
2016-03-19 19:48:38 +00:00
Stanislav Shwartsman
cbe50a9539
enable PKE bit in CR4
2016-03-16 19:44:24 +00:00
Stanislav Shwartsman
8fe26816dc
recalculate protection keys if cr0.wp change
2016-03-04 11:59:32 +00:00
Stanislav Shwartsman
bcb36e81fa
experimental implementation of protection keys paging extension published in SDM rev054. to enable configure with --enable-protection-keys
2016-03-02 20:44:42 +00:00
Stanislav Shwartsman
9308ad31c6
remove unused param from serveIcacheMiss
2016-02-22 19:57:24 +00:00
Stanislav Shwartsman
591039e588
removed debug print
2016-02-21 20:14:15 +00:00
Stanislav Shwartsman
de85547932
update popcnt functions to faster versions
2016-02-21 18:39:10 +00:00
Stanislav Shwartsman
88be61c3d9
add new cpuid bit announced in sdm rev057
2015-12-29 20:21:08 +00:00
Stanislav Shwartsman
9557cafcef
revertng commit #12854 because it broke MT simulation with debugger enabled. Until investigted.
2015-12-20 22:44:54 +00:00
Stanislav Shwartsman
a8a325f2f5
#define to enum or inline function convertion
2015-10-09 19:33:36 +00:00
Stanislav Shwartsman
ea3c1c77eb
added vmx consistency checks related to recently implemented support for vm-entering shutdown/wait-for-sipi state
2015-10-09 06:18:14 +00:00
Stanislav Shwartsman
cd2129ec3b
avoid calling prefetch() each time when linking traces cross page
2015-10-09 05:33:44 +00:00
Stanislav Shwartsman
9f77a6c3b0
full debugger support together with handler-chaining speedups optimization enabled (experimental)
...
should speedup emulation with debugger enabled
2015-10-09 05:28:47 +00:00
Stanislav Shwartsman
12f6857968
fixed smm restore of segment register's selector
2015-09-30 18:55:21 +00:00
Stanislav Shwartsman
18fced44ae
clean wrongly committed line
2015-09-30 18:45:01 +00:00
Stanislav Shwartsman
8d13b61319
implemented TSC Scaling VMX feature according to timestamp-counter for virtualization whitepaper published by Intel
2015-09-30 18:44:01 +00:00
Stanislav Shwartsman
ad52e15860
added few tlb specific cpustat counters
2015-09-28 19:09:32 +00:00
Stanislav Shwartsman
0e37969e32
stop flooding log by messages which not necesary indicate guest code error
2015-09-28 18:45:26 +00:00
Stanislav Shwartsman
dd1ec977c2
enable vmenter to wait-for-sipi state
2015-09-28 18:42:05 +00:00
Stanislav Shwartsman
3a563a6573
use segment rok4g and wok4g in the fast string optimizations for correctness
2015-09-28 18:37:35 +00:00
Stanislav Shwartsman
8232928096
small code optimization and simplification
2015-09-23 19:25:07 +00:00
Stanislav Shwartsman
c44cb6ed81
more cases applicable for BX_TLB_ENTRY_OF
2015-09-22 20:10:22 +00:00
Stanislav Shwartsman
a66ed15d26
added missing tlb.h
2015-09-21 20:07:06 +00:00
Stanislav Shwartsman
be4b73c6d2
extracted tlb specific code to tlb.h; extracted xsave cpuid leaf function to base cpuid class
2015-09-21 13:16:17 +00:00
Stanislav Shwartsman
da39e57196
comment fixes
2015-09-08 19:14:58 +00:00
Stanislav Shwartsman
f76b972fed
bugfix in call gate handling from call far instruction - found with rdos
2015-09-02 19:14:47 +00:00
Stanislav Shwartsman
250cf02981
x86-64: Fixed bug in OR_EqGqM handler used with FS or GS segment
2015-07-26 19:20:21 +00:00
Stanislav Shwartsman
f6af0443bb
small optimization and elimination of several defines from cpu.h - replace by inline functions and const variables
2015-07-13 20:24:14 +00:00
Stanislav Shwartsman
ea255b5bf7
fixed VMCS memory type calculation
2015-07-12 20:10:43 +00:00
Stanislav Shwartsman
129db3bfaf
fixed typo in the list of the vmcs exits
2015-07-12 15:26:34 +00:00
Stanislav Shwartsman
9315742f3d
cleanups of vmcs mapping related stuff
2015-07-07 21:06:56 +00:00
Stanislav Shwartsman
e9f9f824be
return value from clear/set_mapping functions
2015-07-06 20:16:34 +00:00
Stanislav Shwartsman
28c19ecec7
more interfaces to VMCS Mapping class
2015-07-06 20:14:56 +00:00
Stanislav Shwartsman
5fe1423ab6
introducr new class for VMCS mapping so it can be customized per cpuid
2015-07-06 18:46:57 +00:00
Stanislav Shwartsman
b86f01d410
update TODO
2015-06-29 19:57:04 +00:00
Stanislav Shwartsman
3fef7f32f6
added new bits definitions recently published
2015-06-29 19:53:56 +00:00
Stanislav Shwartsman
bc25883087
add new definitions from most recent AMD Software Developers Manual update. TODO: implement new AMD's MONITORX/MWAITX extensions
2015-06-22 21:46:50 +00:00
Stanislav Shwartsman
91086d0627
remove not relevant comments
2015-06-14 20:36:16 +00:00
Stanislav Shwartsman
3a0dff9b36
fixed Bochs compiled for 386 with FPU enabled
2015-06-10 20:36:46 +00:00
Stanislav Shwartsman
c43ea147bf
~1% emulation speedup by skipping pageWriteStamp check for stack writes.
...
For now the optimization is supported only when no SMP is compiled in because it doesn't handle cross-modifying code.
The current stack page will cache also current pageWriteStamp for that page and could skip pageWriteStamp access if possible.
Any code fetch access missing trace cache will invalidate current stack page.
Code fetch accesses from another SMP threads should do the same to support SMP.
Next step:
- support SMP
- support pageWriteStamp access skipping for all other memory writes from all segments
2015-05-23 19:34:59 +00:00
Stanislav Shwartsman
745d843c88
change BX_INFO message to BX_DEBUG because it floods log
2015-05-19 20:21:17 +00:00
Stanislav Shwartsman
280a773323
fix vmexit qualification for some instructions after previous code reorg and inlining of resolve_modrm methods
2015-05-16 21:25:43 +00:00
Stanislav Shwartsman
b468316250
re-style old resolve macros after resolve function inlining
2015-05-16 21:06:59 +00:00
Stanislav Shwartsman
29585cae72
delete resolver.cc
2015-05-16 20:30:26 +00:00
Stanislav Shwartsman
f0d7379908
remove BxResolveModrm member in BxInstruction_c class and inline resolve functions into instruction handlers instead. helps to remove indirect branch mispredictions (suggested by Vtune). measured speedup on Win7-64 boot is 5%, on other guests it might vary between 1% and 5%
2015-05-16 20:29:49 +00:00
Stanislav Shwartsman
cf4b3f2542
optimize code duplication
2015-05-12 21:33:06 +00:00
Stanislav Shwartsman
9f18573740
Rename BX_CPU_CALL_METHODR to BX_CPU_RESOLVE_ADDR and introduce special cases BX_CPU_RESOLVE_ADDR_64 (for 64-bit mode only) and BX_CPU_RESOLVE_ADDR_32 (for 32-bit mode only)
2015-05-11 19:23:09 +00:00
Stanislav Shwartsman
b9b45f0d0d
convert some defines to typed consts
2015-05-10 19:54:57 +00:00
Stanislav Shwartsman
0d79c5f986
Implemented Page Modification Logging VMX feature
2015-05-06 19:55:44 +00:00
Stanislav Shwartsman
2185d21eb7
fixed comments for PML acronym
2015-05-05 19:52:05 +00:00
Stanislav Shwartsman
a197977682
fixed typo
2015-05-05 19:37:01 +00:00
Stanislav Shwartsman
c9fba73a69
added defines about new VMX bits and controls related to Page Miss Logging (PML) EPT feature
2015-05-05 19:35:39 +00:00
Stanislav Shwartsman
16ab385e1d
added cpuid/creg bits definition announced in recent 054 update of Intel SDM
2015-05-05 19:28:25 +00:00
Stanislav Shwartsman
5edd53186e
optimize for target with no x86-64 support
2015-05-04 19:58:01 +00:00
Stanislav Shwartsman
28fc5083af
remove the victim cache code to resolve assert in proc_ctrl.cc
2015-05-04 19:47:52 +00:00
Stanislav Shwartsman
4c34b97db1
fixed comment
2015-05-03 19:44:24 +00:00
Stanislav Shwartsman
5ef56d6d79
rename fpu function
2015-05-02 20:08:36 +00:00
Stanislav Shwartsman
4c7a05621c
reorg of code managing MXCSR to softfloat status conversion
2015-05-02 19:54:48 +00:00
Stanislav Shwartsman
9be2f07d54
fix compilation err when SVM is enabled
2015-04-21 08:20:28 +00:00
Stanislav Shwartsman
e72f66ce49
added BX_CPP_AttrRegparmN to xmm/ymmz/zmm read methods matching cpu.h
2015-04-19 20:47:55 +00:00
Stanislav Shwartsman
239b1ae684
added missed vmexit reason to debug print
2015-04-18 19:25:58 +00:00
Stanislav Shwartsman
080ceb8293
don't crash when running on 386 with no FPU model
2015-03-27 21:39:24 +00:00
Stanislav Shwartsman
c360ddf60c
correctly report memory type for EPT page table accesses
...
TODO: support memory type for guest physical access under EPT
TODO: support memory type for SVM nested paging
TODO: check what happens when PAT is not enabled in CPU configuration
2015-03-23 20:27:36 +00:00
Stanislav Shwartsman
05635a9534
call correctly resolve_memtype function
2015-03-21 20:28:22 +00:00
Stanislav Shwartsman
56323b2806
bugfixes
2015-03-21 20:15:57 +00:00
Stanislav Shwartsman
a55c5e4eb8
correctly report memory type for page table accesses in x86 mode (not in EPT or SVM nested paging yet)
...
TODO: support memory type with EPT / nested paging
TODO: check what happens when PAT is not enabled in CPU configuration
2015-03-21 20:08:58 +00:00
Stanislav Shwartsman
e79185b0a0
refactor memtype methods
2015-03-02 20:51:59 +00:00
Stanislav Shwartsman
36f7bf0ba6
fixed ept memtype printout
2015-03-01 21:04:34 +00:00
Stanislav Shwartsman
8134dc67af
supporting memory type provided by page tables with PCD,PWT and PAT bits
...
TODO: support memory type with EPT
TODO: support memory type for intermediate page table accesses
TODO: check what happens when PAT is not enabled in CPU configuration
2015-03-01 20:55:23 +00:00
Stanislav Shwartsman
9932384df3
fixed visual studio warning
2015-03-01 19:44:06 +00:00
Stanislav Shwartsman
53041981f7
supply PAT required memory type bits through new combined access interface
2015-02-28 14:06:04 +00:00
Stanislav Shwartsman
25b02dac4b
code reorg before PAT memory type support
2015-02-28 14:01:11 +00:00
Stanislav Shwartsman
b74036d2d8
another try to fix the weird compilation error
2015-02-26 20:34:24 +00:00
Stanislav Shwartsman
4e859202a1
attemp to fix compilation issue
2015-02-25 19:43:47 +00:00
Stanislav Shwartsman
1e1c893041
introduce new 64bit packed register type and implement pat/mtrr and mmx registers through it
2015-02-23 21:17:33 +00:00
Stanislav Shwartsman
2bad0d0d12
fixed link error with debugger enabled, small speed optimization
2015-02-23 19:55:55 +00:00
Stanislav Shwartsman
2448c0cf74
fixed complation err
2015-02-23 17:55:09 +00:00
Stanislav Shwartsman
6c6b670551
fixed typo causing compilation error
2015-02-22 21:33:26 +00:00
Stanislav Shwartsman
0917d12e8b
memory type report for physical accesses and RMW acccesses. todo: consider also pat
2015-02-22 21:26:26 +00:00
Stanislav Shwartsman
7a3e340e6d
implement memory type calculation by mtrr. todo: memory type from page tables
2015-02-20 21:50:59 +00:00
Stanislav Shwartsman
e16c6eb30c
preparations and interface definition for memory type support
2015-02-19 20:23:08 +00:00
Stanislav Shwartsman
a74e855185
added Broadwell ULT CPUID definition to CPUDB
2015-02-12 21:28:24 +00:00
Stanislav Shwartsman
901b7be1a8
code reorg
2015-02-12 20:18:35 +00:00
Stanislav Shwartsman
40312cec2d
added pentium cpudb files
2015-02-11 21:44:24 +00:00
Stanislav Shwartsman
b60d7d3154
Cleanup of CPUDB modules, moved common functionality into bx_cpuid_t base class
...
Added Pentium (P54C) AKA Pentium with no MMX to CPUDB
2015-02-11 21:31:17 +00:00
Stanislav Shwartsman
adaca4a6f5
more correct limit4g fix
2015-02-08 06:37:59 +00:00
Stanislav Shwartsman
e80e911166
fixed compilation on cpu level < 6
2015-01-29 18:41:28 +00:00
Stanislav Shwartsman
d6631f767d
correct alignment checking (on linear address and not on effective address)
2015-01-28 16:49:46 +00:00
Stanislav Shwartsman
51808f775d
4G optimization is active only when seg.base == 0
2015-01-27 15:47:02 +00:00
Stanislav Shwartsman
17c89d1c78
masked load-store optimization for avx-512
2015-01-26 20:52:03 +00:00
Stanislav Shwartsman
ee3841ef07
fixed more compilation problems and code cleanup
2015-01-26 20:01:25 +00:00
Stanislav Shwartsman
3a4bd2da51
fixed debug message
2015-01-26 19:16:51 +00:00
Stanislav Shwartsman
9a70727814
fixed fault priority for memory accesses requiring alignment
2015-01-26 19:09:58 +00:00
Stanislav Shwartsman
74da7a7092
fixed compilation err
2015-01-26 15:34:52 +00:00
Stanislav Shwartsman
b5a603c8c7
fixed %d->%u format found by cppcheck (patch by Maxim Derbasov)
2015-01-25 21:24:13 +00:00
Stanislav Shwartsman
ea390d58dc
added new files, removed old files, remove obsolete assert
2015-01-25 20:58:04 +00:00
Stanislav Shwartsman
5e6955c5e7
Major rewrite of memory access methods to avoid massive code duplication and enable inlining of memory access methods
2015-01-25 20:55:10 +00:00
Stanislav Shwartsman
271f06026d
fixed compilation err with SVM without VMX
2015-01-16 06:15:47 +00:00
Stanislav Shwartsman
63c3ed3f70
update (c) and fix instrumentation stub
2015-01-11 20:50:26 +00:00
Stanislav Shwartsman
3b237df41d
Added far branch origin to bx_instr_far_branch instrumentation callback by user request
...
Updated instrumentation examples
Fixed code duplication
2015-01-11 20:45:39 +00:00
Stanislav Shwartsman
6fd2d32180
fixed exception error code for debugger and instrumentation
2014-12-18 19:45:03 +00:00
Volker Ruppert
2ec57b8a6b
Fixed some more C++11 warnings.
2014-12-18 17:52:40 +00:00
Stanislav Shwartsman
fea4d47830
fixed spelling in comments
2014-12-16 20:11:08 +00:00
