Stanislav Shwartsman
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773f1b7e42
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cleanup return value of all instruction handlers
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2018-02-16 07:57:32 +00:00 |
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Stanislav Shwartsman
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4c7a05621c
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reorg of code managing MXCSR to softfloat status conversion
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2015-05-02 19:54:48 +00:00 |
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Stanislav Shwartsman
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fb526a0670
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implemented (not yet 100% correct) VREDUCE* AVX512 opcode
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2014-08-08 19:12:18 +00:00 |
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Stanislav Shwartsman
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fefa61a7cb
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Implemented VRANGE* AVX512DQ instructions
The only missing AVX512BW/AVX512DQ opcodes are now:
"NDS.66.0F3A.W0 42 VDBPSADBW"
"NDS.512.66.0F3A.W0 56 VREDUCEPS
NDS.512.66.0F3A.W1 56 VREDUCEPD"
"NDS.512.66.0F3A.W0 57 VREDUCESS
NDS.512.66.0F3A.W1 57 VREDUCESD"
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2014-08-04 20:30:46 +00:00 |
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Volker Ruppert
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59eac1f196
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Moved AVX/EVEX stuff to a new cpu subfolder and updated build system
TODO: update MVSC workspace files
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2014-07-25 08:35:06 +00:00 |
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