Commit Graph

5 Commits

Author SHA1 Message Date
Stanislav Shwartsman
773f1b7e42 cleanup return value of all instruction handlers 2018-02-16 07:57:32 +00:00
Stanislav Shwartsman
4c7a05621c reorg of code managing MXCSR to softfloat status conversion 2015-05-02 19:54:48 +00:00
Stanislav Shwartsman
fb526a0670 implemented (not yet 100% correct) VREDUCE* AVX512 opcode 2014-08-08 19:12:18 +00:00
Stanislav Shwartsman
fefa61a7cb Implemented VRANGE* AVX512DQ instructions
The only missing AVX512BW/AVX512DQ opcodes are now:

"NDS.66.0F3A.W0 42 VDBPSADBW"

"NDS.512.66.0F3A.W0 56 VREDUCEPS
 NDS.512.66.0F3A.W1 56 VREDUCEPD"
"NDS.512.66.0F3A.W0 57 VREDUCESS
 NDS.512.66.0F3A.W1 57 VREDUCESD"
2014-08-04 20:30:46 +00:00
Volker Ruppert
59eac1f196 Moved AVX/EVEX stuff to a new cpu subfolder and updated build system
TODO: update MVSC workspace files
2014-07-25 08:35:06 +00:00