- changes to the original svga_cirrus patch:
* PCI memory/mmio PnP support, some emulation and compile fixes
* ported write mode 4 + 5 and some bufixes from cirrus vga in qemu
* new graphics API, hardware cursor support, configure option added (Robin Kay)
* partial support for transparent bitblt and bitblt write mask
memory handling in memory.cc removed)
- CRTC write protection implemented
- 16-bit read access to some VGA registers added
- memory handler code now conciders the status of the A20 line
bochs.h already not include iodev.h which reduces compilation dependences for almost all cpu and fpu files, now cpu files will not be recompiled if iodev includes was changed
and bpp (done for the x display library)
- new switch VBE_DISPI_GETCAPS. The xres, yres and bpp registers return the gui
capabilities if enabled.
- VBE_DISPI_ID3 defined
The colors 0..7 appear in high intensity and the colors 8..15 blink using
low / high intensity. Blinking is not present in Bochs yet. For now, the 3rd
bit of the attribute will be inverted.
- attribute controller mode control register: only a change of the internal
palette size bit should force a redraw
- skip screen update if video is disabled
plane enable and color select
- a screen update is necessary after updating the charmap
- lots of missing parentheses added (found after disabling VGA_TRACE_FEATURE)
- BX_DEBUG and BX_INFO messages improved
- update function: the 'for' loop now initializes and increments the variables
xti and yti
- VBE: banked writes are now ignored in LFB mode, LFB writes are ignored in
banked mode (based on SF patch #742782)
- calculation of the VBE virtual height for >8bpp fixed
- visible screen size must be recalculated after changing the virtual width
- modify standard VGA register when enabling a VBE mode (some test applications
expect this behaviour)
- BX_INFO messages in the VBE code fixed
- don't clear the VBE memory if the new flag VBE_DISPI_NOCLEARMEM is set
- vbe_bpp_multiplier for the 4bpp mode set to 1 (usually unused, but this value is save)
(using 72 Hz vertical frequency). The vertial retrace phase is often used for
vga register or memory manipulations to reduce screen flickering.
- update(): check variable vga_mem_updated before everything else
(without localized variables)
- start address support for CGA modes added
- start address support for mode 13h completed
- clearing the text snapshot is not necessary after a start address change
(set needs_update to 1 in graphics mode only)
and implemented in SDL
* sequencer controller register 0x01 bit 0 controls the width of the characters.
This value is used to calculate the screen width.
* attribute controller register 0x10 bit 2 controls the appearance of graphics
characters (ASCII 0xC0 - 0cDF). A change of this value forces a charmap update
to rebuild the font bitmaps.
* the SDL display library uses the new feature described above
* the other display libraries recalculate the screen width, since they are using
a fixed font width of 8 for now.
- VGA: attribute controller register 0x10 bit 2 (enable_line_graphics) does not
switch the palatte in CGA mode
ATTENTION: the Elpin VGA BIOS uses a delay of 280 vertical retraces after
displaying the copyright text
- changes to the horizontal or vertical pel panning registers force a redraw of
the screen
- screen update problems in text mode fixed
- sort order of the CRT register write cases changed
- fixed calculation of the byte offset for standard VGA modes if line compare
is active
- force a resize of the screen after a change of the display mode (text/graphics)
- mem_write(): skip the rotation of the cpu byte if 'data_rotate' is 0
If set, the screen size will be horizontally doubled in CGA and standard
VGA modes.
- doublescan feature for CGA mode 320x200x4 added
- removed trailing spaces in VBE update code
the address offset between two lines on the screen in all VGA modes.
It depends on the CRTC offset register value and the address mode (byte, word,
dword)
- moved screen update code to the end of the write handler. If a register change
should force a redraw of the screen, the variable 'needs_update' must be set
to 1.
- changes to the attribute controller palette index register now force a redraw
of the screen
- modeX: calculation of the tile numbers fixed
* check memory mapping before everything else
* read mode 1 optimized using a part of patch.vga-mode2-speed-dohzono
- function mem_write(): check memory mapping before everything else
- writes to the CRT registers are handled only if the new value differs
- a CRT start address change forces a redraw of the screen
with 100 rows and a char height of 4
- raster operations AND, OR and XOR in write mode 2 implemented (part of patch #707931)
- use the vga_tile_updated array in modeX like other modes do
- small optimizations in the graphics update code
double width)
- cleanup in modeX emulation similar to mode 13h
- consider start address in function mem_write for VGA modes
- register 0x03c8 is readable, too
- clear tile array when switching to graphics mode, clear text snapshot when
switching to text mode, do the same when changing the palette or disable video
- simplified the function determine_screen_dimensions()
- fixed the code for the CGA mode 640x200x2 in update() and mem_write()
- it works only on x86 with gcc2.95+
- uses the GCC function atribute "regparm(n)" to declare that certain
functions use the register calling convention
- performance improvement is about 6%
