- Created framework based on our I/O APIC code and ported HPET core from Qemu
with some required changes for the Bochs timer and IRQ handling.
- Enabled HPET-specific code in the ACPI and rombios32 sources and generated
new ACPI table with iasl.
- The HPET device plugin is now always loaded if the i440FX chipset is selected
(same as ACPI). We have to rethink this when we have implemented a more
modern chipset.
- TODO: Rewrite of the virtual timer code for nanosecond support to make the
realtime synchronization possible with HPET.
* added support for memory above the PCI hole (Izik Eidus)
* smp_probe: instead of timimg out, wait until all cpus are up (Avi Kivity)
* Bochs BIOS changes to support HPET in Qemu (Beth Kon)
- added documentation about CMOS registers set by Qemu
* added generation of SSDT ACPI table that contains definitions for available
processors
* added basic implementation of SMBIOS
* Added querying of BIOS UUID using VMware backdoor I/O port (enable only if
BX_QEMU is defined)
* Added RTC device to ACPI DSDT table
* CPU, PCI, ACPI and SMM init
* MP and ACPI table generation
- MP table generation hack in the Bochs memory code disabled (should be removed)
- don't test the checksum of large BIOS images (for now)
- existing 16-bit PCIBIOS init disabled for now