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6 Commits

Author SHA1 Message Date
Stanislav Shwartsman
1bf18b8aae ! CPUID: Added TigerLake CPU definition (features CET and CLWB support) 
- CPU code refactor, remove uses of bx_bool datatype and use C++ classic bool instead.
  This enable better compiler optimizations and reduce binary size
 2021-01-30 08:35:35 +00:00
Stanislav Shwartsman
6e2541daa6 CET: DS Seg override is kept for CET Endranch suppress hint even if overridden by other prefixes later 2020-02-21 19:38:23 +00:00
Stanislav Shwartsman
45a25a2b67 CET: make sure enbranch64 and enbranch32 do the right thing when mode mismatch 2020-01-03 18:55:17 +00:00
Stanislav Shwartsman
495206650b fixed CET wrmsr reserved bit checking 2020-01-03 18:44:15 +00:00
Stanislav Shwartsman
a2be16873c VMX: save guest CET state to VMCS on vmexit 2019-12-27 13:02:30 +00:00
Stanislav Shwartsman
f90e5f4f44 Add initial implementation of the CET (Control Flow Enforcement Technology) emulation according to SDM071 
Only missing items (to be added soon):
  - Supervisor Shadow Stack EPT Control is not implemented yet
  - SMM placing for SSP
Currently have to be added manually to some CPUID model, for example to ICL-U
To enable configure with --enable-cet
 2019-12-20 07:42:07 +00:00