diff --git a/bochs/cpu/crc32.cc b/bochs/cpu/crc32.cc
index 4a039f337..4eb0140a6 100644
--- a/bochs/cpu/crc32.cc
+++ b/bochs/cpu/crc32.cc
@@ -30,7 +30,7 @@
 
 // 3-byte opcodes
 
-#define CRC32_POLYNOMIAL BX_CONST64(0x11edc6f41)
+const Bit64u CRC32_POLYNOMIAL = BX_CONST64(0x11edc6f41);
 
 // primitives for CRC32 usage
 BX_CPP_INLINE Bit8u BitReflect8(Bit8u val8)
diff --git a/bochs/cpu/crregs.cc b/bochs/cpu/crregs.cc
index 42eaa1fc4..4e034e3a3 100644
--- a/bochs/cpu/crregs.cc
+++ b/bochs/cpu/crregs.cc
@@ -382,7 +382,9 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_RqDq(bxInstruction_c *i)
 }
 #endif // #if BX_SUPPORT_X86_64
 
-#define BX_SVM_CR_WRITE_MASK (BX_CONST64(1) << 63)
+#if BX_SUPPORT_SVM
+const Bit64u BX_SVM_CR_WRITE_MASK = (BX_CONST64(1) << 63);
+#endif
 
 void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_CR0Rd(bxInstruction_c *i)
 {
diff --git a/bochs/cpu/exception.cc b/bochs/cpu/exception.cc
index 5877b4d30..6fbaff91d 100644
--- a/bochs/cpu/exception.cc
+++ b/bochs/cpu/exception.cc
@@ -971,8 +971,8 @@ void BX_CPU_C::exception(unsigned vector, Bit16u error_code)
   if (vector == BX_DB_EXCEPTION) {
     // Commit debug events to DR6: preserve DR5.BS and DR6.BD values,
     // only software can clear them
-    BX_CPU_THIS_PTR dr6.val32 = (BX_CPU_THIS_PTR dr6.val32 & 0xffff6ff0) |
-                          (BX_CPU_THIS_PTR debug_trap & 0x0000e00f);
+    BX_CPU_THIS_PTR dr6.val32 = (BX_CPU_THIS_PTR dr6.val32  & 0xffff6ff0) |
+                                (BX_CPU_THIS_PTR debug_trap & 0x0000e00f);
 
     // clear GD flag in the DR7 prior entering debug exception handler
     BX_CPU_THIS_PTR dr7.set_GD(0);
diff --git a/bochs/cpu/vmexit.cc b/bochs/cpu/vmexit.cc
index 95217cd3e..188a18fab 100644
--- a/bochs/cpu/vmexit.cc
+++ b/bochs/cpu/vmexit.cc
@@ -311,10 +311,10 @@ void BX_CPP_AttrRegparmN(2) BX_CPU_C::VMexit_TaskSwitch(Bit16u tss_selector, uns
   VMexit(VMX_VMEXIT_TASK_SWITCH, tss_selector | (source << 30));
 }
 
-#define BX_VMX_LO_MSR_START  0x00000000
-#define BX_VMX_LO_MSR_END    0x00001FFF
-#define BX_VMX_HI_MSR_START  0xC0000000
-#define BX_VMX_HI_MSR_END    0xC0001FFF
+const Bit32u BX_VMX_LO_MSR_START = 0x00000000;
+const Bit32u BX_VMX_LO_MSR_END   = 0x00001FFF;
+const Bit32u BX_VMX_HI_MSR_START = 0xC0000000;
+const Bit32u BX_VMX_HI_MSR_END   = 0xC0001FFF;
 
 void BX_CPP_AttrRegparmN(2) BX_CPU_C::VMexit_MSR(unsigned op, Bit32u msr)
 {