mirror of https://github.com/bochs-emu/Bochs
- RTC 12-hour mode implemented
- unsupported shutdown status values no longer cause a panic - definition of BX_NUM_CMOS_REGS moved from config.h to cmos.h (TODO: get rid of this and implement 128 registers) - indent mode fixed in modified section
This commit is contained in:
Volker Ruppert
parent
f9e7aa39af
commit
fd427df0d7
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@ -182,10 +182,6 @@
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// if set to 0, the simulation will panic.
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#define BX_RESET_ON_TRIPLE_FAULT 1
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// Number of CMOS registers
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#define BX_NUM_CMOS_REGS 64
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//#define BX_NUM_CMOS_REGS 128
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// Use Greg Alexander's new PIT model (summer 2001) instead of the original.
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#define BX_USE_NEW_PIT 0
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: cmos.cc,v 1.45 2004-06-19 15:20:10 sshwarts Exp $
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// $Id: cmos.cc,v 1.46 2005-09-10 13:22:51 vruppert Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2002 MandrakeSoft S.A.
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@ -78,7 +78,7 @@ bx_cmos_c *theCmosDevice = NULL;
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#if (BX_NUM_CMOS_REGS == 64)
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#elif (BX_NUM_CMOS_REGS == 128)
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#else
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#error "Invalid BX_NUM_CMOS_REGS value in config.h"
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#error "Invalid BX_NUM_CMOS_REGS value in cmos.h"
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#endif
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@ -118,7 +118,7 @@ bx_cmos_c::~bx_cmos_c(void)
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void
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bx_cmos_c::init(void)
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{
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BX_DEBUG(("Init $Id: cmos.cc,v 1.45 2004-06-19 15:20:10 sshwarts Exp $"));
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BX_DEBUG(("Init $Id: cmos.cc,v 1.46 2005-09-10 13:22:51 vruppert Exp $"));
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// CMOS RAM & RTC
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DEV_register_ioread_handler(this, read_handler, 0x0070, "CMOS RAM", 1);
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@ -195,6 +195,7 @@ bx_cmos_c::init(void)
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BX_INFO(("Setting initial clock to: %s (time0=%u)", tmptime, (Bit32u)BX_CMOS_THIS s.timeval));
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BX_CMOS_THIS s.rtc_mode_12hour = 0;
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update_clock();
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BX_CMOS_THIS s.timeval_change = 0;
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@ -228,8 +229,7 @@ bx_cmos_c::init(void)
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close(fd);
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BX_INFO(("successfuly read from image file '%s'.",
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bx_options.cmos.Opath->getptr ()));
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}
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else {
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} else {
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// CMOS values generated
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BX_CMOS_THIS s.reg[REG_STAT_A] = 0x26;
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BX_CMOS_THIS s.reg[REG_STAT_B] = 0x02;
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@ -238,7 +238,7 @@ bx_cmos_c::init(void)
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#if BX_SUPPORT_FPU == 1
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BX_CMOS_THIS s.reg[REG_EQUIPMENT_BYTE] |= 0x02;
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#endif
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}
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}
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}
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void
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@ -366,10 +366,7 @@ bx_cmos_c::write(Bit32u address, Bit32u value, unsigned io_len)
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UNUSED(this_ptr);
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#endif // !BX_USE_CMOS_SMF
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if (bx_dbg.cmos)
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BX_INFO(("CMOS write to address: 0x%04x = 0x%02x",
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(unsigned) address, (unsigned) value));
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BX_DEBUG(("CMOS write to address: 0x%04x = 0x%02x", address, value));
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switch (address) {
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case 0x0070:
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@ -382,230 +379,222 @@ bx_cmos_c::write(Bit32u address, Bit32u value, unsigned io_len)
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case 0x0071:
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if (BX_CMOS_THIS s.cmos_mem_address >= BX_NUM_CMOS_REGS) {
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BX_PANIC(("unsupported cmos io write, register(0x%02x) = 0x%02x !",
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(unsigned) BX_CMOS_THIS s.cmos_mem_address, (unsigned) value));
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return;
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}
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BX_PANIC(("unsupported cmos io write, register(0x%02x) = 0x%02x !",
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(unsigned) BX_CMOS_THIS s.cmos_mem_address, (unsigned) value));
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return;
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}
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switch (BX_CMOS_THIS s.cmos_mem_address) {
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case REG_SEC_ALARM: // seconds alarm
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case REG_MIN_ALARM: // minutes alarm
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case REG_HOUR_ALARM: // hours alarm
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BX_CMOS_THIS s.reg[BX_CMOS_THIS s.cmos_mem_address] = value;
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BX_DEBUG(("alarm time changed to %02x:%02x:%02x", BX_CMOS_THIS s.reg[REG_HOUR_ALARM],
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BX_CMOS_THIS s.reg[REG_MIN_ALARM], BX_CMOS_THIS s.reg[REG_SEC_ALARM]));
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return;
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break;
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case REG_SEC_ALARM: // seconds alarm
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case REG_MIN_ALARM: // minutes alarm
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case REG_HOUR_ALARM: // hours alarm
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BX_CMOS_THIS s.reg[BX_CMOS_THIS s.cmos_mem_address] = value;
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BX_DEBUG(("alarm time changed to %02x:%02x:%02x", BX_CMOS_THIS s.reg[REG_HOUR_ALARM],
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BX_CMOS_THIS s.reg[REG_MIN_ALARM], BX_CMOS_THIS s.reg[REG_SEC_ALARM]));
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break;
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case REG_SEC: // seconds
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case REG_MIN: // minutes
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case REG_HOUR: // hours
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case REG_WEEK_DAY: // day of the week
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case REG_MONTH_DAY: // day of the month
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case REG_MONTH: // month
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case REG_YEAR: // year
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case REG_IBM_CENTURY_BYTE: // century
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case REG_IBM_PS2_CENTURY_BYTE: // century (PS/2)
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//BX_INFO(("write reg 0x%02x: value = 0x%02x",
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// (unsigned) BX_CMOS_THIS s.cmos_mem_address, (unsigned) value);
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BX_CMOS_THIS s.reg[BX_CMOS_THIS s.cmos_mem_address] = value;
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if (BX_CMOS_THIS s.cmos_mem_address == REG_IBM_PS2_CENTURY_BYTE) {
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BX_CMOS_THIS s.reg[REG_IBM_CENTURY_BYTE] = value;
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}
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if (BX_CMOS_THIS s.reg[REG_STAT_B] & 0x80) {
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BX_CMOS_THIS s.timeval_change = 1;
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} else {
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update_timeval();
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}
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return;
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break;
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case REG_SEC: // seconds
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case REG_MIN: // minutes
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case REG_HOUR: // hours
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case REG_WEEK_DAY: // day of the week
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case REG_MONTH_DAY: // day of the month
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case REG_MONTH: // month
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case REG_YEAR: // year
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case REG_IBM_CENTURY_BYTE: // century
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case REG_IBM_PS2_CENTURY_BYTE: // century (PS/2)
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BX_CMOS_THIS s.reg[BX_CMOS_THIS s.cmos_mem_address] = value;
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if (BX_CMOS_THIS s.cmos_mem_address == REG_IBM_PS2_CENTURY_BYTE) {
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BX_CMOS_THIS s.reg[REG_IBM_CENTURY_BYTE] = value;
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}
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if (BX_CMOS_THIS s.reg[REG_STAT_B] & 0x80) {
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BX_CMOS_THIS s.timeval_change = 1;
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} else {
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update_timeval();
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}
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break;
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case REG_STAT_A: // Control Register A
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// bit 7: Update in Progress (read-only)
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// 1 = signifies time registers will be updated within 244us
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// 0 = time registers will not occur before 244us
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// note: this bit reads 0 when CRB bit 7 is 1
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// bit 6..4: Divider Chain Control
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// 000 oscillator disabled
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// 001 oscillator disabled
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// 010 Normal operation
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// 011 TEST
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// 100 TEST
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// 101 TEST
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// 110 Divider Chain RESET
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// 111 Divider Chain RESET
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// bit 3..0: Periodic Interrupt Rate Select
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// 0000 None
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// 0001 3.90625 ms
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// 0010 7.8125 ms
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// 0011 122.070 us
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// 0100 244.141 us
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// 0101 488.281 us
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// 0110 976.562 us
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// 0111 1.953125 ms
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// 1000 3.90625 ms
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// 1001 7.8125 ms
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// 1010 15.625 ms
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// 1011 31.25 ms
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// 1100 62.5 ms
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// 1101 125 ms
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// 1110 250 ms
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// 1111 500 ms
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case REG_STAT_A: // Control Register A
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// bit 7: Update in Progress (read-only)
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// 1 = signifies time registers will be updated within 244us
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// 0 = time registers will not occur before 244us
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// note: this bit reads 0 when CRB bit 7 is 1
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// bit 6..4: Divider Chain Control
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// 000 oscillator disabled
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// 001 oscillator disabled
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// 010 Normal operation
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// 011 TEST
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// 100 TEST
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// 101 TEST
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// 110 Divider Chain RESET
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// 111 Divider Chain RESET
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// bit 3..0: Periodic Interrupt Rate Select
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// 0000 None
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// 0001 3.90625 ms
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// 0010 7.8125 ms
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// 0011 122.070 us
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// 0100 244.141 us
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// 0101 488.281 us
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// 0110 976.562 us
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// 0111 1.953125 ms
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// 1000 3.90625 ms
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// 1001 7.8125 ms
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// 1010 15.625 ms
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// 1011 31.25 ms
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// 1100 62.5 ms
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// 1101 125 ms
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// 1110 250 ms
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// 1111 500 ms
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unsigned dcc;
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dcc = (value >> 4) & 0x07;
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if ((dcc & 0x06) == 0x06) {
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BX_INFO(("CRA: divider chain RESET"));
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} else if (dcc != 0x02) {
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BX_PANIC(("CRA: divider chain control 0x%02x", dcc));
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}
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BX_CMOS_THIS s.reg[REG_STAT_A] &= 0x80;
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BX_CMOS_THIS s.reg[REG_STAT_A] |= (value & 0x7f);
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BX_CMOS_THIS CRA_change();
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return;
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break;
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unsigned dcc;
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dcc = (value >> 4) & 0x07;
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if ((dcc & 0x06) == 0x06) {
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BX_INFO(("CRA: divider chain RESET"));
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} else if (dcc != 0x02) {
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BX_PANIC(("CRA: divider chain control 0x%02x", dcc));
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}
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BX_CMOS_THIS s.reg[REG_STAT_A] &= 0x80;
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BX_CMOS_THIS s.reg[REG_STAT_A] |= (value & 0x7f);
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BX_CMOS_THIS CRA_change();
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break;
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case REG_STAT_B: // Control Register B
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// bit 0: Daylight Savings Enable
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// 1 = enable daylight savings
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// 0 = disable daylight savings
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// bit 1: 24/12 houre mode
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// 1 = 24 hour format
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// 0 = 12 hour format
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// bit 2: Data Mode
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// 1 = binary format
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// 0 = BCD format
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// bit 3: "square wave enable"
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// Not supported and always read as 0
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// bit 4: Update Ended Interrupt Enable
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// 1 = enable generation of update ended interrupt
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// 0 = disable
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// bit 5: Alarm Interrupt Enable
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// 1 = enable generation of alarm interrupt
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// 0 = disable
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// bit 6: Periodic Interrupt Enable
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// 1 = enable generation of periodic interrupt
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// 0 = disable
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// bit 7: Set mode
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// 1 = user copy of time is "frozen" allowing time registers
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// to be accessed without regard for an occurance of an update
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// 0 = time updates occur normally
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case REG_STAT_B: // Control Register B
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// bit 0: Daylight Savings Enable
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// 1 = enable daylight savings
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// 0 = disable daylight savings
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// bit 1: 24/12 hour mode
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// 1 = 24 hour format
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// 0 = 12 hour format
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// bit 2: Data Mode
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// 1 = binary format
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// 0 = BCD format
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// bit 3: "square wave enable"
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// Not supported and always read as 0
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// bit 4: Update Ended Interrupt Enable
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// 1 = enable generation of update ended interrupt
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// 0 = disable
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// bit 5: Alarm Interrupt Enable
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// 1 = enable generation of alarm interrupt
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// 0 = disable
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// bit 6: Periodic Interrupt Enable
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// 1 = enable generation of periodic interrupt
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// 0 = disable
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// bit 7: Set mode
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// 1 = user copy of time is "frozen" allowing time registers
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// to be accessed without regard for an occurance of an update
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// 0 = time updates occur normally
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// can not handle binary or 12-hour mode yet.
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if (value & 0x04)
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BX_PANIC(("write status reg B, binary format enabled."));
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if ( !(value & 0x02) )
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BX_PANIC(("write status reg B, 12 hour mode enabled."));
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if (value & 0x04)
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BX_PANIC(("write status reg B, binary format enabled."));
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value &= 0xf7; // bit3 always 0
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// Note: setting bit 7 clears bit 4
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if (value & 0x80)
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value &= 0xef;
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value &= 0xf7; // bit3 always 0
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// Note: setting bit 7 clears bit 4
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if (value & 0x80)
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value &= 0xef;
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unsigned prev_CRB;
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prev_CRB = BX_CMOS_THIS s.reg[REG_STAT_B];
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BX_CMOS_THIS s.reg[REG_STAT_B] = value;
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if ( (prev_CRB & 0x40) != (value & 0x40) ) {
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// Periodic Interrupt Enabled changed
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if (prev_CRB & 0x40) {
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// transition from 1 to 0, deactivate timer
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bx_pc_system.deactivate_timer(
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BX_CMOS_THIS s.periodic_timer_index);
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}
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else {
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// transition from 0 to 1
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// if rate select is not 0, activate timer
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if ( (BX_CMOS_THIS s.reg[REG_STAT_A] & 0x0f) != 0 ) {
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bx_pc_system.activate_timer(
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BX_CMOS_THIS s.periodic_timer_index,
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BX_CMOS_THIS s.periodic_interval_usec, 1);
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}
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}
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}
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if ( (prev_CRB >= 0x80) && (value < 0x80) && BX_CMOS_THIS s.timeval_change) {
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update_timeval();
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BX_CMOS_THIS s.timeval_change = 0;
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}
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return;
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break;
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unsigned prev_CRB;
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prev_CRB = BX_CMOS_THIS s.reg[REG_STAT_B];
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BX_CMOS_THIS s.reg[REG_STAT_B] = value;
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if ( (prev_CRB & 0x02) != (value & 0x02) ) {
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BX_CMOS_THIS s.rtc_mode_12hour = ((value & 0x02) == 0);
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update_clock();
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}
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if ((prev_CRB & 0x40) != (value & 0x40)) {
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// Periodic Interrupt Enabled changed
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if (prev_CRB & 0x40) {
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// transition from 1 to 0, deactivate timer
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bx_pc_system.deactivate_timer(BX_CMOS_THIS s.periodic_timer_index);
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} else {
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// transition from 0 to 1
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// if rate select is not 0, activate timer
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if ((BX_CMOS_THIS s.reg[REG_STAT_A] & 0x0f) != 0) {
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bx_pc_system.activate_timer(
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BX_CMOS_THIS s.periodic_timer_index,
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BX_CMOS_THIS s.periodic_interval_usec, 1);
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}
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}
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}
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if ((prev_CRB >= 0x80) && (value < 0x80) && BX_CMOS_THIS s.timeval_change) {
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update_timeval();
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BX_CMOS_THIS s.timeval_change = 0;
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}
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break;
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case REG_STAT_C: // Control Register C
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case REG_STAT_D: // Control Register D
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BX_ERROR(("write to control register 0x%02x (read-only)",
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BX_CMOS_THIS s.cmos_mem_address));
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break;
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case REG_STAT_C: // Control Register C
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case REG_STAT_D: // Control Register D
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BX_ERROR(("write to control register 0x%02x ignored (read-only)",
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BX_CMOS_THIS s.cmos_mem_address));
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break;
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case REG_DIAGNOSTIC_STATUS:
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BX_DEBUG(("write register 0x0e: 0x%02x", (unsigned) value));
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break;
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case REG_DIAGNOSTIC_STATUS:
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BX_DEBUG(("write register 0x0e: 0x%02x", value));
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BX_CMOS_THIS s.reg[REG_DIAGNOSTIC_STATUS] = value;
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break;
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case REG_SHUTDOWN_STATUS:
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switch (value) {
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case 0x00: /* proceed with normal POST (soft reset) */
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BX_DEBUG(("Reg 0Fh(00): shutdown action = normal POST"));
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break;
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case 0x01: /* shutdown after memory size check */
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BX_DEBUG(("Reg 0Fh(01): request to change shutdown action"
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case REG_SHUTDOWN_STATUS:
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switch (value) {
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case 0x00: /* proceed with normal POST (soft reset) */
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BX_DEBUG(("Reg 0Fh(00): shutdown action = normal POST"));
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break;
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case 0x01: /* shutdown after memory size check */
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BX_DEBUG(("Reg 0Fh(01): request to change shutdown action"
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" to shutdown after memory size check"));
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case 0x02: /* shutdown after successful memory test */
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BX_DEBUG(("Reg 0Fh(02): request to change shutdown action"
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break;
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case 0x02: /* shutdown after successful memory test */
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BX_DEBUG(("Reg 0Fh(02): request to change shutdown action"
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" to shutdown after successful memory test"));
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break;
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case 0x03: /* shutdown after failed memory test */
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BX_DEBUG(("Reg 0Fh(03): request to change shutdown action"
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break;
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case 0x03: /* shutdown after failed memory test */
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BX_DEBUG(("Reg 0Fh(03): request to change shutdown action"
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" to shutdown after successful memory test"));
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break;
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case 0x04: /* jump to disk bootstrap routine */
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BX_DEBUG(("Reg 0Fh(04): request to change shutdown action "
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break;
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case 0x04: /* jump to disk bootstrap routine */
|
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BX_DEBUG(("Reg 0Fh(04): request to change shutdown action "
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"to jump to disk bootstrap routine."));
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break;
|
||||
case 0x05: /* flush keyboard (issue EOI) and jump via 40h:0067h */
|
||||
BX_DEBUG(("Reg 0Fh(05): request to change shutdown action "
|
||||
break;
|
||||
case 0x05: /* flush keyboard (issue EOI) and jump via 40h:0067h */
|
||||
BX_DEBUG(("Reg 0Fh(05): request to change shutdown action "
|
||||
"to flush keyboard (issue EOI) and jump via 40h:0067h."));
|
||||
break;
|
||||
case 0x06:
|
||||
BX_DEBUG(("Reg 0Fh(06): Shutdown after memory test !"));
|
||||
break;
|
||||
case 0x07: /* reset (after failed test in virtual mode) */
|
||||
BX_DEBUG(("Reg 0Fh(07): request to change shutdown action "
|
||||
break;
|
||||
case 0x06:
|
||||
BX_DEBUG(("Reg 0Fh(06): Shutdown after memory test !"));
|
||||
break;
|
||||
case 0x07: /* reset (after failed test in virtual mode) */
|
||||
BX_DEBUG(("Reg 0Fh(07): request to change shutdown action "
|
||||
"to reset (after failed test in virtual mode)."));
|
||||
break;
|
||||
case 0x08: /* used by POST during protected-mode RAM test (return to POST) */
|
||||
BX_DEBUG(("Reg 0Fh(08): request to change shutdown action "
|
||||
break;
|
||||
case 0x08: /* used by POST during protected-mode RAM test (return to POST) */
|
||||
BX_DEBUG(("Reg 0Fh(08): request to change shutdown action "
|
||||
"to return to POST (used by POST during protected-mode RAM test)."));
|
||||
break;
|
||||
case 0x09: /* return to BIOS extended memory block move
|
||||
break;
|
||||
case 0x09: /* return to BIOS extended memory block move
|
||||
(interrupt 15h, func 87h was in progress) */
|
||||
BX_DEBUG(("Reg 0Fh(09): request to change shutdown action "
|
||||
BX_DEBUG(("Reg 0Fh(09): request to change shutdown action "
|
||||
"to return to BIOS extended memory block move."));
|
||||
break;
|
||||
case 0x0a: /* jump to DWORD pointer at 40:67 */
|
||||
BX_DEBUG(("Reg 0Fh(0a): request to change shutdown action"
|
||||
break;
|
||||
case 0x0a: /* jump to DWORD pointer at 40:67 */
|
||||
BX_DEBUG(("Reg 0Fh(0a): request to change shutdown action"
|
||||
" to jump to DWORD at 40:67"));
|
||||
break;
|
||||
case 0x0b: /* iret to DWORD pointer at 40:67 */
|
||||
BX_DEBUG(("Reg 0Fh(0b): request to change shutdown action"
|
||||
break;
|
||||
case 0x0b: /* iret to DWORD pointer at 40:67 */
|
||||
BX_DEBUG(("Reg 0Fh(0b): request to change shutdown action"
|
||||
" to iret to DWORD at 40:67"));
|
||||
break;
|
||||
case 0x0c: /* retf to DWORD pointer at 40:67 */
|
||||
BX_DEBUG(("Reg 0Fh(0c): request to change shutdown action"
|
||||
break;
|
||||
case 0x0c: /* retf to DWORD pointer at 40:67 */
|
||||
BX_DEBUG(("Reg 0Fh(0c): request to change shutdown action"
|
||||
" to retf to DWORD at 40:67"));
|
||||
break;
|
||||
default:
|
||||
BX_PANIC(("unsupported cmos io write to reg F, case 0x%02x!",
|
||||
(unsigned) value));
|
||||
break;
|
||||
}
|
||||
break;
|
||||
break;
|
||||
default:
|
||||
BX_ERROR(("unsupported shutdown status: 0x%02x!", value));
|
||||
}
|
||||
BX_CMOS_THIS s.reg[REG_SHUTDOWN_STATUS] = value;
|
||||
break;
|
||||
|
||||
default:
|
||||
BX_DEBUG(("write reg 0x%02x: value = 0x%02x",
|
||||
(unsigned) BX_CMOS_THIS s.cmos_mem_address, (unsigned) value));
|
||||
break;
|
||||
}
|
||||
|
||||
BX_CMOS_THIS s.reg[BX_CMOS_THIS s.cmos_mem_address] = value;
|
||||
default:
|
||||
BX_DEBUG(("write reg 0x%02x: value = 0x%02x",
|
||||
BX_CMOS_THIS s.cmos_mem_address, value));
|
||||
BX_CMOS_THIS s.reg[BX_CMOS_THIS s.cmos_mem_address] = value;
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
|
@ -725,7 +714,7 @@ bx_cmos_c::update_clock()
|
|||
{
|
||||
struct tm *time_calendar;
|
||||
unsigned year, month, day, century;
|
||||
Bit8u val_bcd;
|
||||
Bit8u val_bcd, hour;
|
||||
|
||||
time_calendar = localtime(& BX_CMOS_THIS s.timeval);
|
||||
|
||||
|
|
@ -742,9 +731,17 @@ bx_cmos_c::update_clock()
|
|||
BX_CMOS_THIS s.reg[REG_MIN] = val_bcd;
|
||||
|
||||
// update hours
|
||||
val_bcd =
|
||||
((time_calendar->tm_hour / 10) << 4) |
|
||||
(time_calendar->tm_hour % 10);
|
||||
if (BX_CMOS_THIS s.rtc_mode_12hour) {
|
||||
hour = time_calendar->tm_hour;
|
||||
val_bcd = (hour > 11) ? 0x80 : 0x00;
|
||||
if (hour > 11) hour -= 12;
|
||||
if (hour == 0) hour = 12;
|
||||
val_bcd |= ((hour / 10) << 4) | (hour % 10);
|
||||
} else {
|
||||
val_bcd =
|
||||
((time_calendar->tm_hour / 10) << 4) |
|
||||
(time_calendar->tm_hour % 10);
|
||||
}
|
||||
BX_CMOS_THIS s.reg[REG_HOUR] = val_bcd;
|
||||
|
||||
// update day of the week
|
||||
|
|
@ -778,7 +775,7 @@ bx_cmos_c::update_clock()
|
|||
bx_cmos_c::update_timeval()
|
||||
{
|
||||
struct tm time_calendar;
|
||||
Bit8u val_bin;
|
||||
Bit8u val_bin, pm_flag;
|
||||
|
||||
// update seconds
|
||||
val_bin =
|
||||
|
|
@ -793,9 +790,21 @@ bx_cmos_c::update_timeval()
|
|||
time_calendar.tm_min = val_bin;
|
||||
|
||||
// update hours
|
||||
val_bin =
|
||||
((BX_CMOS_THIS s.reg[REG_HOUR] >> 4) * 10) +
|
||||
(BX_CMOS_THIS s.reg[REG_HOUR] & 0x0f);
|
||||
if (BX_CMOS_THIS s.rtc_mode_12hour) {
|
||||
pm_flag = BX_CMOS_THIS s.reg[REG_HOUR] & 0x80;
|
||||
val_bin =
|
||||
(((BX_CMOS_THIS s.reg[REG_HOUR] & 0x70) >> 4) * 10) +
|
||||
(BX_CMOS_THIS s.reg[REG_HOUR] & 0x0f);
|
||||
if ((val_bin < 12) & (pm_flag > 0)) {
|
||||
val_bin += 12;
|
||||
} else if ((val_bin == 12) & (pm_flag == 0)) {
|
||||
val_bin = 0;
|
||||
}
|
||||
} else {
|
||||
val_bin =
|
||||
((BX_CMOS_THIS s.reg[REG_HOUR] >> 4) * 10) +
|
||||
(BX_CMOS_THIS s.reg[REG_HOUR] & 0x0f);
|
||||
}
|
||||
time_calendar.tm_hour = val_bin;
|
||||
|
||||
// update day of the month
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
/////////////////////////////////////////////////////////////////////////
|
||||
// $Id: cmos.h,v 1.9 2003-01-04 00:02:07 vruppert Exp $
|
||||
// $Id: cmos.h,v 1.10 2005-09-10 13:22:51 vruppert Exp $
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Copyright (C) 2002 MandrakeSoft S.A.
|
||||
|
|
@ -25,8 +25,8 @@
|
|||
// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
|
||||
|
||||
|
||||
|
||||
// Number of CMOS registers (64 or 128)
|
||||
#define BX_NUM_CMOS_REGS 64
|
||||
|
||||
#if BX_USE_CMOS_SMF
|
||||
# define BX_CMOS_SMF static
|
||||
|
|
@ -64,6 +64,7 @@ public:
|
|||
time_t timeval;
|
||||
Bit8u cmos_mem_address;
|
||||
bx_bool timeval_change;
|
||||
bx_bool rtc_mode_12hour;
|
||||
|
||||
Bit8u reg[BX_NUM_CMOS_REGS];
|
||||
} s; // state information
|
||||
|
|
|
|||
Loading…
Reference in New Issue