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add methods to query local apic state

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This commit is contained in:
Stanislav Shwartsman 2023-11-21 15:43:38 +02:00
parent 0cc21d166d
commit f90fdbc353
3 changed files with 16 additions and 4 deletions
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2
bochs/cpu/cpu.h
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@ -4454,6 +4454,8 @@ public: // for now...
#if BX_SUPPORT_APIC
BX_SMF bool relocate_apic(Bit64u val_64);
BX_SMF bool apic_global_enable_on();
BX_SMF bool x2apic_mode();
#endif
BX_SMF void load_segw(bxInstruction_c *i, unsigned seg) BX_CPP_AttrRegparmN(2);

2
bochs/cpu/cpuid.cc
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@ -563,7 +563,7 @@ Bit32u bx_cpuid_t::get_std_cpuid_leaf_1_edx_common(Bit32u extra) const
if (is_cpu_extension_supported(BX_ISA_XAPIC)) {
// if MSR_APICBASE APIC Global Enable bit has been cleared,
// the CPUID feature flag for the APIC is set to 0.
if (cpu->msr.apicbase & 0x800)
if (cpu->apic_global_enable_on())
edx |= BX_CPUID_STD1_EDX_APIC; // APIC on chip
}
#endif

16
bochs/cpu/msr.cc
View File

@ -39,7 +39,7 @@ bool BX_CPP_AttrRegparmN(2) BX_CPU_C::rdmsr(Bit32u index, Bit64u *msr)
#if BX_CPU_LEVEL >= 6
if (is_cpu_extension_supported(BX_ISA_X2APIC)) {
if (is_x2apic_msr_range(index)) {
if (BX_CPU_THIS_PTR msr.apicbase & 0x400) // X2APIC mode
if (x2apic_mode())
return BX_CPU_THIS_PTR lapic.read_x2apic(index, msr);
else
return 0;
@ -579,7 +579,7 @@ bool BX_CPP_AttrRegparmN(2) BX_CPU_C::wrmsr(Bit32u index, Bit64u val_64)
#if BX_CPU_LEVEL >= 6
if (is_cpu_extension_supported(BX_ISA_X2APIC)) {
if (is_x2apic_msr_range(index)) {
if (BX_CPU_THIS_PTR msr.apicbase & 0x400) // X2APIC mode
if (x2apic_mode())
return BX_CPU_THIS_PTR lapic.write_x2apic(index, val32_hi, val32_lo);
else
return 0;
@ -1118,7 +1118,7 @@ bool BX_CPU_C::relocate_apic(Bit64u val_64)
const Bit32u BX_MSR_APICBASE_RESERVED_BITS = (0x2ff | (is_cpu_extension_supported(BX_ISA_X2APIC) ? 0 : 0x400));
if (BX_CPU_THIS_PTR msr.apicbase & 0x800) {
if (apic_global_enable_on()) {
Bit32u val32_hi = GET32H(val_64), val32_lo = GET32L(val_64);
BX_INFO(("WRMSR: wrote %08x:%08x to MSR_APICBASE", val32_hi, val32_lo));
if (! IsValidPhyAddr(val_64)) {
@ -1159,6 +1159,16 @@ bool BX_CPU_C::relocate_apic(Bit64u val_64)
return 1;
}
bool BX_CPU_C::apic_global_enable_on()
{
return BX_CPU_THIS_PTR msr.apicbase & 0x800;
}
bool BX_CPU_C::x2apic_mode()
{
return BX_CPU_THIS_PTR msr.apicbase & 0x400;
}
#endif
void BX_CPP_AttrRegparmN(1) BX_CPU_C::WRMSR(bxInstruction_c *i)