diff --git a/bochs/.bochsrc b/bochs/.bochsrc index 68ef6ed90..85bd7cb2e 100644 --- a/bochs/.bochsrc +++ b/bochs/.bochsrc @@ -141,7 +141,7 @@ log: bochsout.txt # cause bochs to become unstable. The panic is a "graceful exit," so # if you disable it you may get a spectacular disaster instead. #======================================================================= -panic: action=fatal +panic: action=ask error: action=report info: action=report debug: action=ignore diff --git a/bochs/bochs.h b/bochs/bochs.h index c7893a05c..8a1292e03 100644 --- a/bochs/bochs.h +++ b/bochs/bochs.h @@ -497,7 +497,7 @@ typedef struct { #ifdef MAGIC_BREAKPOINT Boolean magic_break_enabled; #endif /* MAGIC_BREAKPOINT */ -#if BX_APIC_SUPPORT +#if BX_SUPPORT_APIC Boolean apic; Boolean ioapic; #endif diff --git a/bochs/config.h.in b/bochs/config.h.in index 593eb6440..013e75037 100644 --- a/bochs/config.h.in +++ b/bochs/config.h.in @@ -58,11 +58,11 @@ // For cosimulation, you could use two processors and two address // spaces. -#define BX_APIC_SUPPORT 0 +#define BX_SUPPORT_APIC 0 // include in APIC models, required for a multiprocessor system. -#if (BX_SMP_PROCESSORS>1 && !BX_APIC_SUPPORT) -#error For multiprocessor simulation, BX_APIC_SUPPORT is required. +#if (BX_SMP_PROCESSORS>1 && !BX_SUPPORT_APIC) +#error For multiprocessor simulation, BX_SUPPORT_APIC is required. #endif #define BX_DEBUG_LINUX 0 diff --git a/bochs/configure.in b/bochs/configure.in index 6d0833015..b4813b0e4 100644 --- a/bochs/configure.in +++ b/bochs/configure.in @@ -253,7 +253,7 @@ AC_ARG_ENABLE(apic, [ --enable-apic enable APIC support], [if test "$enableval" = yes; then AC_MSG_RESULT(yes) - AC_DEFINE(BX_APIC_SUPPORT, 1) + AC_DEFINE(BX_SUPPORT_APIC, 1) IOAPIC_OBJS='ioapic.o' APIC_OBJS='apic.o' else @@ -263,7 +263,7 @@ AC_ARG_ENABLE(apic, echo "ERROR: With processors > 1 you must use --enable-apic" exit 1 fi - AC_DEFINE(BX_APIC_SUPPORT, 0) + AC_DEFINE(BX_SUPPORT_APIC, 0) IOAPIC_OBJS='' APIC_OBJS='' fi @@ -272,12 +272,12 @@ AC_ARG_ENABLE(apic, if test "$bx_procs" -gt 1 -o "$bx_cpu_level" -gt 5; then # enable APIC by default, if processors>1 or if cpulevel>5 AC_MSG_RESULT(yes) - AC_DEFINE(BX_APIC_SUPPORT, 1) + AC_DEFINE(BX_SUPPORT_APIC, 1) IOAPIC_OBJS='ioapic.o' APIC_OBJS='apic.o' else AC_MSG_RESULT(no) - AC_DEFINE(BX_APIC_SUPPORT, 0) + AC_DEFINE(BX_SUPPORT_APIC, 0) IOAPIC_OBJS='' APIC_OBJS='' fi diff --git a/bochs/cpu/cpu.cc b/bochs/cpu/cpu.cc index a7818c6d0..4a5d62a73 100644 --- a/bochs/cpu/cpu.cc +++ b/bochs/cpu/cpu.cc @@ -481,7 +481,7 @@ handle_async_event: Bit8u vector; // NOTE: similar code in ::take_irq() -#if BX_APIC_SUPPORT +#if BX_SUPPORT_APIC if (BX_CPU_THIS_PTR int_from_local_apic) vector = BX_CPU_THIS_PTR local_apic.acknowledge_int (); else diff --git a/bochs/cpu/cpu.h b/bochs/cpu/cpu.h index b646814dc..fa0d52a09 100644 --- a/bochs/cpu/cpu.h +++ b/bochs/cpu/cpu.h @@ -517,7 +517,7 @@ typedef enum { APIC_TYPE_LOCAL_APIC } bx_apic_type_t; -#if BX_APIC_SUPPORT +#if BX_SUPPORT_APIC class bx_generic_apic_c : public logfunctions { protected: Bit32u base_addr; @@ -616,7 +616,7 @@ public: #define APIC_MAX_ID 16 extern bx_generic_apic_c *apic_index[APIC_MAX_ID]; -#endif // if BX_APIC_SUPPORT +#endif // if BX_SUPPORT_APIC #if BX_USE_CPU_SMF == 0 @@ -1505,7 +1505,7 @@ public: // for now... BX_SMF BX_CPP_INLINE Boolean protected_mode(void); BX_SMF BX_CPP_INLINE Boolean v8086_mode(void); #endif -#if BX_APIC_SUPPORT +#if BX_SUPPORT_APIC bx_local_apic_c local_apic; Boolean int_from_local_apic; #endif diff --git a/bochs/cpu/init.cc b/bochs/cpu/init.cc index 00f7471cc..8a2dad71c 100644 --- a/bochs/cpu/init.cc +++ b/bochs/cpu/init.cc @@ -33,7 +33,7 @@ #define BX_STEPPING_ID 0 BX_CPU_C::BX_CPU_C() -#if BX_APIC_SUPPORT +#if BX_SUPPORT_APIC : local_apic (this) #endif { @@ -46,7 +46,7 @@ void BX_CPU_C::init(BX_MEM_C *addrspace) { // BX_CPU_C constructor BX_CPU_THIS_PTR set_INTR (0); -#if BX_APIC_SUPPORT +#if BX_SUPPORT_APIC local_apic.init (); #endif setprefix("[CPU ]"); diff --git a/bochs/debug/dbg_main.cc b/bochs/debug/dbg_main.cc index 3b3fa4754..3acd12bc2 100644 --- a/bochs/debug/dbg_main.cc +++ b/bochs/debug/dbg_main.cc @@ -359,7 +359,7 @@ process_sim2: // call init routines for each CPU+mem simulator // initialize for SMP. one memory, multiple processors. -#if BX_APIC_SUPPORT +#if BX_SUPPORT_APIC memset(apic_index, 0, sizeof(apic_index[0]) * APIC_MAX_ID); #endif @@ -379,7 +379,7 @@ process_sim2: BX_CPU(i) = new BX_CPU_C (); BX_CPU(i)->init (BX_MEM(0)); // assign apic ID from the index of this loop - // if !BX_APIC_SUPPORT, this will not compile. + // if !BX_SUPPORT_APIC, this will not compile. BX_CPU(i)->local_apic.set_id (i); BX_CPU(i)->reset(BX_RESET_HARDWARE); } @@ -2822,7 +2822,7 @@ bx_dbg_set_symbol_command(char *symbol, Bit32u val) is_OK = BX_CPU(dbg_cpu)->dbg_set_reg(BX_DBG_REG_GS, val); } else if ( !strcmp(symbol, "cpu") ) { -#if ((BX_SMP_PROCESSORS>1) && (BX_APIC_SUPPORT)) +#if ((BX_SMP_PROCESSORS>1) && (BX_SUPPORT_APIC)) if ((val > BX_SMP_PROCESSORS) || (val >= APIC_MAX_ID) || (apic_index[val] == NULL)) { diff --git a/bochs/iodev/devices.cc b/bochs/iodev/devices.cc index 00e8937c8..2d1737f97 100644 --- a/bochs/iodev/devices.cc +++ b/bochs/iodev/devices.cc @@ -112,7 +112,7 @@ bx_devices_c::init(BX_MEM_C *newmem) pci->reset(); #endif -#if BX_APIC_SUPPORT +#if BX_SUPPORT_APIC // I/O APIC 82093AA ioapic = & bx_ioapic; ioapic->init (); @@ -297,7 +297,7 @@ bx_devices_c::timer() if (retval & 0x02) pic->trigger_irq(12); -#if BX_APIC_SUPPORT +#if BX_SUPPORT_APIC // update local APIC timers for (int i=0; ilocal_apic.periodic (TIMER_DELTA); diff --git a/bochs/iodev/iodev.h b/bochs/iodev/iodev.h index b2c3ae0fb..c2fc307c3 100644 --- a/bochs/iodev/iodev.h +++ b/bochs/iodev/iodev.h @@ -142,7 +142,7 @@ private: #else # include "iodev/hga.h" #endif -#if BX_APIC_SUPPORT +#if BX_SUPPORT_APIC # include "iodev/ioapic.h" #endif #include "iodev/cmos.h" diff --git a/bochs/iodev/pic.cc b/bochs/iodev/pic.cc index e769b8445..c753eb7ce 100644 --- a/bochs/iodev/pic.cc +++ b/bochs/iodev/pic.cc @@ -492,7 +492,7 @@ bx_pic_c::write(Bit32u address, Bit32u value, unsigned io_len) void bx_pic_c::trigger_irq(unsigned irq_no) { -#if BX_APIC_SUPPORT +#if BX_SUPPORT_APIC // forward this function call to the ioapic too BX_PIC_THIS devices->ioapic->trigger_irq (irq_no, -1); #endif @@ -522,7 +522,7 @@ bx_pic_c::trigger_irq(unsigned irq_no) void bx_pic_c::untrigger_irq(unsigned irq_no) { -#if BX_APIC_SUPPORT +#if BX_SUPPORT_APIC // forward this function call to the ioapic too BX_PIC_THIS devices->ioapic->untrigger_irq (irq_no, -1); #endif diff --git a/bochs/main.cc b/bochs/main.cc index 5716d0007..330a36d00 100644 --- a/bochs/main.cc +++ b/bochs/main.cc @@ -579,7 +579,7 @@ bx_init_hardware() } // set up memory and CPU objects -#if BX_APIC_SUPPORT +#if BX_SUPPORT_APIC memset(apic_index, 0, sizeof(apic_index[0]) * APIC_MAX_ID); #endif @@ -599,7 +599,7 @@ bx_init_hardware() BX_CPU(i) = new BX_CPU_C (); BX_CPU(i)->init (bx_mem_array[0]); // assign apic ID from the index of this loop - // if !BX_APIC_SUPPORT, this will not compile. + // if !BX_SUPPORT_APIC, this will not compile. BX_CPU(i)->local_apic.set_id (i); BX_CPU(i)->reset(BX_RESET_HARDWARE); } diff --git a/bochs/memory/memory.cc b/bochs/memory/memory.cc index 0bde9e111..2059a1b06 100644 --- a/bochs/memory/memory.cc +++ b/bochs/memory/memory.cc @@ -218,7 +218,7 @@ inc_one: data_ptr = (Bit8u *) data + (len - 1); #endif -#if BX_APIC_SUPPORT +#if BX_SUPPORT_APIC bx_generic_apic_c *local_apic = &cpu->local_apic; bx_generic_apic_c *ioapic = bx_devices.ioapic; if (local_apic->is_selected (a20addr, len)) { @@ -413,7 +413,7 @@ inc_one: data_ptr = (Bit8u *) data + (len - 1); #endif -#if BX_APIC_SUPPORT +#if BX_SUPPORT_APIC bx_generic_apic_c *local_apic = &cpu->local_apic; bx_generic_apic_c *ioapic = bx_devices.ioapic; if (local_apic->is_selected (addr, len)) {