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fixed bug in HADDPD/HSUBPD instructions

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This commit is contained in:
Stanislav Shwartsman 2004-03-05 09:19:58 +00:00
parent 652d4ca24f
commit f5316dad70
4 changed files with 8 additions and 11 deletions
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4
bochs/cpu/sse_pfp.cc
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@ -2553,7 +2553,7 @@ void BX_CPU_C::HADDPD_VpdWpd(bxInstruction_c *i)
result.xmm64u(0) =
float64_add(op1.xmm64u(0), op1.xmm64u(1), status_word);
result.xmm64u(1) =
float64_add(op2.xmm64u(1), op2.xmm64u(1), status_word);
float64_add(op2.xmm64u(0), op2.xmm64u(1), status_word);
BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
BX_WRITE_XMM_REG(i->nnn(), result);
@ -2656,7 +2656,7 @@ void BX_CPU_C::HSUBPD_VpdWpd(bxInstruction_c *i)
result.xmm64u(0) =
float64_sub(op1.xmm64u(0), op1.xmm64u(1), status_word);
result.xmm64u(1) =
float64_sub(op2.xmm64u(1), op2.xmm64u(1), status_word);
float64_sub(op2.xmm64u(0), op2.xmm64u(1), status_word);
BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
BX_WRITE_XMM_REG(i->nnn(), result);

5
bochs/cpu/sse_rcp.cc
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@ -311,6 +311,9 @@ static Float32 approximate_rcp(Float32 op)
case float_NaN:
return convert_to_QNaN(op);
case float_normalized:
break;
}
Bit32u fraction = float32_fraction(op);
@ -687,7 +690,7 @@ static Float32 approximate_rsqrt(Float32 op)
return convert_to_QNaN(op);
case float_normalized:
;
break;
};
if (sign == 1)

4
bochs/fpu/reg_constant.c
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@ -1,6 +1,6 @@
/*---------------------------------------------------------------------------+
| reg_constant.c |
| $Id: reg_constant.c,v 1.6 2003-10-04 16:47:57 sshwarts Exp $
| $Id: reg_constant.c,v 1.7 2004-03-05 09:19:58 sshwarts Exp $
| |
| All of the constant FPU_REGs |
| |
@ -18,8 +18,6 @@
#include "control_w.h"
FPU_REG const CONST_1 = MAKE_REG(POS, 0, 0x00000000, 0x80000000);
FPU_REG const CONST_2 = MAKE_REG(POS, 1, 0x00000000, 0x80000000);
FPU_REG const CONST_HALF = MAKE_REG(POS, -1, 0x00000000, 0x80000000);
FPU_REG const CONST_L2T = MAKE_REG(POS, 1, 0xcd1b8afe, 0xd49a784b);
FPU_REG const CONST_L2E = MAKE_REG(POS, 0, 0x5c17f0bc, 0xb8aa3b29);
FPU_REG const CONST_PI = MAKE_REG(POS, 1, 0x2168c235, 0xc90fdaa2);

6
bochs/fpu/reg_constant.h
View File

@ -1,6 +1,6 @@
/*---------------------------------------------------------------------------+
| reg_constant.h |
| $Id: reg_constant.h,v 1.5 2003-07-31 21:07:38 sshwarts Exp $
| $Id: reg_constant.h,v 1.6 2004-03-05 09:19:58 sshwarts Exp $
| |
| Copyright (C) 1992 W. Metzenthen, 22 Parker St, Ormond, Vic 3163, |
| Australia. E-mail billm@vaxc.cc.monash.edu.au |
@ -13,8 +13,6 @@
#include "fpu_emu.h"
extern FPU_REG const CONST_1;
extern FPU_REG const CONST_2;
extern FPU_REG const CONST_HALF;
extern FPU_REG const CONST_L2T;
extern FPU_REG const CONST_L2E;
extern FPU_REG const CONST_PI;
@ -30,9 +28,7 @@ extern FPU_REG const CONST_PI4;
extern FPU_REG const CONST_LG2;
extern FPU_REG const CONST_LN2;
extern FPU_REG const CONST_Z;
extern FPU_REG const CONST_PINF;
extern FPU_REG const CONST_INF;
extern FPU_REG const CONST_MINF;
extern FPU_REG const CONST_QNaN;
#endif /* _REG_CONSTANT_H_ */