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it doesn't matter if it was vex or xop ...

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This commit is contained in:
Stanislav Shwartsman 2013-09-05 17:52:47 +00:00
parent d943feaf8e
commit f36364bc65
2 changed files with 15 additions and 15 deletions
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16
bochs/cpu/fetchdecode.cc
View File

@ -1285,7 +1285,7 @@ BX_CPU_C::fetchDecode32(const Bit8u *iptr, bxInstruction_c *i, unsigned remainin
unsigned sse_prefix = SSE_PREFIX_NONE; unsigned sse_prefix = SSE_PREFIX_NONE;
#if BX_SUPPORT_AVX #if BX_SUPPORT_AVX
int had_vex = 0, had_xop = 0, vvv = -1; int had_vex_xop = 0, vvv = -1;
bx_bool vex_w = 0, vex_l = 0, use_vvv = 0; bx_bool vex_w = 0, vex_l = 0, use_vvv = 0;
#endif #endif
@ -1368,7 +1368,7 @@ fetch_b1:
#if BX_SUPPORT_AVX #if BX_SUPPORT_AVX
if ((b1 & ~0x01) == 0xc4 && (*iptr & 0xc0) == 0xc0) { if ((b1 & ~0x01) == 0xc4 && (*iptr & 0xc0) == 0xc0) {
// VEX 0xC4 and VEX 0xC5 // VEX 0xC4 and VEX 0xC5
had_vex = 1; had_vex_xop = 1;
if (sse_prefix || ! protected_mode()) if (sse_prefix || ! protected_mode())
goto decode_done; goto decode_done;
@ -1413,7 +1413,7 @@ fetch_b1:
} }
else if (b1 == 0x8f && (*iptr & 0xc8) == 0xc8) { else if (b1 == 0x8f && (*iptr & 0xc8) == 0xc8) {
// 3 byte XOP prefix // 3 byte XOP prefix
had_xop = 1; had_vex_xop = 1;
if (sse_prefix || ! protected_mode()) if (sse_prefix || ! protected_mode())
goto decode_done; goto decode_done;
@ -1479,7 +1479,7 @@ fetch_b1:
rm = b2 & 0x7; rm = b2 & 0x7;
#if BX_SUPPORT_AVX #if BX_SUPPORT_AVX
if (! had_vex && ! had_xop) if (! had_vex_xop)
#endif #endif
if (b1 >= 0xd8 && b1 <= 0xdf) if (b1 >= 0xd8 && b1 <= 0xdf)
i->setFoo((b2 | (b1 << 8)) & 0x7ff); /* for x87 */ i->setFoo((b2 | (b1 << 8)) & 0x7ff); /* for x87 */
@ -1633,7 +1633,7 @@ modrm_done:
#if BX_SUPPORT_AVX #if BX_SUPPORT_AVX
else if (attr & BxAliasVexW) { else if (attr & BxAliasVexW) {
// VexW alias could come with BxPrefixSSE // VexW alias could come with BxPrefixSSE
BX_ASSERT(had_vex | had_xop); BX_ASSERT(had_vex_xop);
alias = vex_w; alias = vex_w;
} }
#endif #endif
@ -1663,11 +1663,11 @@ modrm_done:
break; break;
#if BX_SUPPORT_AVX #if BX_SUPPORT_AVX
case BxSplitVexW64: // VexW is ignored in 32-bit mode case BxSplitVexW64: // VexW is ignored in 32-bit mode
BX_ASSERT(had_vex | had_xop); BX_ASSERT(had_vex_xop);
OpcodeInfoPtr = &(OpcodeInfoPtr->AnotherArray[0]); OpcodeInfoPtr = &(OpcodeInfoPtr->AnotherArray[0]);
break; break;
case BxSplitVexW: // VexW is a real opcode extension case BxSplitVexW: // VexW is a real opcode extension
BX_ASSERT(had_vex | had_xop); BX_ASSERT(had_vex_xop);
OpcodeInfoPtr = &(OpcodeInfoPtr->AnotherArray[vex_w]); OpcodeInfoPtr = &(OpcodeInfoPtr->AnotherArray[vex_w]);
break; break;
case BxSplitMod11B: case BxSplitMod11B:
@ -1891,7 +1891,7 @@ modrm_done:
i->setIaOpcode(ia_opcode); i->setIaOpcode(ia_opcode);
#if BX_SUPPORT_AVX #if BX_SUPPORT_AVX
if (had_vex | had_xop) { if (had_vex_xop) {
if (! use_vvv && vvv != 0) { if (! use_vvv && vvv != 0) {
ia_opcode = BX_IA_ERROR; ia_opcode = BX_IA_ERROR;
} }

14
bochs/cpu/fetchdecode64.cc
View File

@ -1704,7 +1704,7 @@ BX_CPU_C::fetchDecode64(const Bit8u *iptr, bxInstruction_c *i, unsigned remainin
unsigned rex_prefix = 0; unsigned rex_prefix = 0;
#if BX_SUPPORT_AVX #if BX_SUPPORT_AVX
int had_vex = 0, had_xop = 0, vvv = -1; int had_vex_xop = 0, vvv = -1;
bx_bool vex_w = 0, vex_l = 0, use_vvv = 0; bx_bool vex_w = 0, vex_l = 0, use_vvv = 0;
#endif #endif
@ -1825,7 +1825,7 @@ fetch_b1:
#if BX_SUPPORT_AVX #if BX_SUPPORT_AVX
if ((b1 & ~0x01) == 0xc4) { if ((b1 & ~0x01) == 0xc4) {
// VEX // VEX
had_vex = 1; had_vex_xop = 1;
if (sse_prefix | rex_prefix) if (sse_prefix | rex_prefix)
goto decode_done; goto decode_done;
@ -1879,7 +1879,7 @@ fetch_b1:
} }
else if (b1 == 0x8f && (*iptr & 0x08) == 0x08) { else if (b1 == 0x8f && (*iptr & 0x08) == 0x08) {
// 3 byte XOP prefix // 3 byte XOP prefix
had_xop = 1; had_vex_xop = 1;
if (sse_prefix | rex_prefix) if (sse_prefix | rex_prefix)
goto decode_done; goto decode_done;
@ -1952,7 +1952,7 @@ fetch_b1:
rm = (b2 & 0x7) | rex_b; rm = (b2 & 0x7) | rex_b;
#if BX_SUPPORT_AVX #if BX_SUPPORT_AVX
if (! had_vex && ! had_xop) if (! had_vex_xop)
#endif #endif
if (b1 >= 0xd8 && b1 <= 0xdf) if (b1 >= 0xd8 && b1 <= 0xdf)
i->setFoo((b2 | (b1 << 8)) & 0x7ff); /* for x87 */ i->setFoo((b2 | (b1 << 8)) & 0x7ff); /* for x87 */
@ -2064,7 +2064,7 @@ modrm_done:
#if BX_SUPPORT_AVX #if BX_SUPPORT_AVX
else if (attr & BxAliasVexW) { else if (attr & BxAliasVexW) {
// VexW alias could come with BxPrefixSSE // VexW alias could come with BxPrefixSSE
BX_ASSERT(had_vex | had_xop); BX_ASSERT(had_vex_xop);
alias = vex_w; alias = vex_w;
} }
#endif #endif
@ -2095,7 +2095,7 @@ modrm_done:
#if BX_SUPPORT_AVX #if BX_SUPPORT_AVX
case BxSplitVexW: case BxSplitVexW:
case BxSplitVexW64: case BxSplitVexW64:
BX_ASSERT(had_vex | had_xop); BX_ASSERT(had_vex_xop);
OpcodeInfoPtr = &(OpcodeInfoPtr->AnotherArray[vex_w]); OpcodeInfoPtr = &(OpcodeInfoPtr->AnotherArray[vex_w]);
break; break;
case BxSplitMod11B: case BxSplitMod11B:
@ -2326,7 +2326,7 @@ modrm_done:
i->setIaOpcode(ia_opcode); i->setIaOpcode(ia_opcode);
#if BX_SUPPORT_AVX #if BX_SUPPORT_AVX
if (had_vex | had_xop) { if (had_vex_xop) {
if (! use_vvv && vvv != 0) { if (! use_vvv && vvv != 0) {
ia_opcode = BX_IA_ERROR; ia_opcode = BX_IA_ERROR;
} }