diff --git a/bochs/.bochsrc b/bochs/.bochsrc index 7ce476471..3f679e632 100644 --- a/bochs/.bochsrc +++ b/bochs/.bochsrc @@ -115,6 +115,7 @@ # # CPU configurations that can be selected: # ----------------------------------------------------------------- +# i486dx4 Intel 486DX4 # pentium Intel Pentium (P54C) # pentium_mmx Intel Pentium MMX # amd_k6_2_chomper AMD-K6(tm) 3D processor (Chomper) diff --git a/bochs/CHANGES b/bochs/CHANGES index 4193f530a..3c30568ef 100644 --- a/bochs/CHANGES +++ b/bochs/CHANGES @@ -6,6 +6,7 @@ Brief summary : - Implemented MONITORLESS MWAIT instructions support - Implemented AMX-TF32 ISA extension - Added initial support for AVX10_1 ISA extension and AVX10 CPUID leaf 0x24 (to be enabled in Xeon Granite Rapids) + - CPUID: Added i486DX4 CPU definition - CPUID: Added Arrow Lake CPU definition - CPUID: Support for enabling/disabling of one of more CPU features from CPUID configuration (see "add_features" and "exclude_features" in bochsrc sample and documentation) - Bugfixes for CPU emulation correctness (critical bugfixes for WAITPKG, LASS, XSAVEC/XSAVES, CPUID and SHA1 ISA implementation) @@ -27,6 +28,8 @@ Detailed change log : - Added initial support for AVX10_1 ISA extension and AVX10 CPUID leaf 0x24 (to be enabled in Xeon Granite Rapids) - CPUID: + - Added i486DX4 CPU definition + - Model=4, supports x87 FPU and VME only - Added Arrow Lake CPU definition - Features AVX-VNNI, AVX-IFMA, AVX-VNNI-INT8, AVX-VNNI-INT16, AVX_NE_CONVERT, GFNI, VAES/VPCLMULQDQ, SHA512, SM3/SM4, CMPCCXADD, LASS, SERIALIZE, UINTR - Support for enabling/disabling of one of more CPU features from CPUID configuration (see "add_features" and "exclude_features" in bochsrc sample and documentation) diff --git a/bochs/cpu/cpudb/Makefile.in b/bochs/cpu/cpudb/Makefile.in index e2f60a229..f1905a769 100644 --- a/bochs/cpu/cpudb/Makefile.in +++ b/bochs/cpu/cpudb/Makefile.in @@ -36,7 +36,8 @@ RANLIB = @RANLIB@ BX_INCDIRS = -I.. -I../.. -I$(srcdir)/.. -I$(srcdir)/../.. -I../../@INSTRUMENT_DIR@ -I$(srcdir)/../../@INSTRUMENT_DIR@ -CPUDB_OBJS = intel/pentium.o \ +CPUDB_OBJS = intel/i486dx4.o \ + intel/pentium.o \ intel/pentium_mmx.o \ intel/p2_klamath.o \ intel/p3_katmai.o \ @@ -94,6 +95,15 @@ dist-clean: clean # dependencies generated by # gcc -MM -I.. -I../.. -I../../instrument/stubs */*.cc | sed 's/\.cc/.@CPP_SUFFIX@/g' ########################################### +intel/i486dx4.o: intel/i486dx4.@CPP_SUFFIX@ ../../bochs.h ../../config.h ../../osdep.h \ + ../../logio.h ../../misc/bswap.h ../cpu.h ../../bx_debug/debug.h \ + ../../config.h ../../osdep.h ../../cpu/decoder/decoder.h \ + ../../cpu/decoder/features.h ../decoder/decoder.h \ + ../../instrument/stubs/instrument.h ../i387.h \ + ../softfloat3e/include/softfloat_types.h ../fpu/tag_w.h \ + ../fpu/status_w.h ../fpu/control_w.h ../crregs.h ../descriptor.h \ + ../decoder/instr.h ../lazy_flags.h ../tlb.h ../icache.h ../xmm.h \ + ../vmx.h ../vmx_ctrls.h ../access.h intel/i486dx4.h ../../cpu/cpuid.h amd/amd_k6_2_chomper.o: amd/amd_k6_2_chomper.@CPP_SUFFIX@ ../../bochs.h ../../config.h \ ../../osdep.h ../../logio.h ../../misc/bswap.h ../cpu.h \ ../../bx_debug/debug.h ../../config.h ../../osdep.h \ diff --git a/bochs/cpu/cpudb/intel/i486dx4.cc b/bochs/cpu/cpudb/intel/i486dx4.cc new file mode 100644 index 000000000..2af2d63a8 --- /dev/null +++ b/bochs/cpu/cpudb/intel/i486dx4.cc @@ -0,0 +1,117 @@ +///////////////////////////////////////////////////////////////////////// +// $Id$ +///////////////////////////////////////////////////////////////////////// +// +// Copyright (c) 2024 Stanislav Shwartsman +// Written by Stanislav Shwartsman [sshwarts at sourceforge net] +// +// This library is free software; you can redistribute it and/or +// modify it under the terms of the GNU Lesser General Public +// License as published by the Free Software Foundation; either +// version 2 of the License, or (at your option) any later version. +// +// This library is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +// Lesser General Public License for more details. +// +// You should have received a copy of the GNU Lesser General Public +// License along with this library; if not, write to the Free Software +// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA +// +///////////////////////////////////////////////////////////////////////// + +#include "bochs.h" +#include "cpu.h" +#include "i486dx4.h" + +#if BX_CPU_LEVEL >= 4 + +#define LOG_THIS cpu-> + +// used https://www.ardent-tool.com/CPU/Docs_Intel.html#CPUID as source + +// CPUID 00000000: 00000001-756E6547-6C65746E-49656E69 +// CPUID 00000001: 00000480-00000000-00000000-00000003 + +i486dx4_t::i486dx4_t(BX_CPU_C *cpu): bx_cpuid_t(cpu) +{ + enable_cpu_extension(BX_ISA_X87); + enable_cpu_extension(BX_ISA_486); + enable_cpu_extension(BX_ISA_VME); +} + +void i486dx4_t::get_cpuid_leaf(Bit32u function, Bit32u subfunction, cpuid_function_t *leaf) const +{ + switch(function) { + case 0x00000000: + get_leaf_0(0x1, "GenuineIntel", leaf); + return; + case 0x00000001: + default: + get_std_cpuid_leaf_1(leaf); + return; + } +} + +// leaf 0x00000000 // + +// leaf 0x00000001 // +void i486dx4_t::get_std_cpuid_leaf_1(cpuid_function_t *leaf) const +{ + // EAX: CPU Version Information + // [3:0] Stepping ID + // [7:4] Model: starts at 1 + // [11:8] Family: 4=486, 5=Pentium, 6=PPro, ... + // [13:12] Type: 0=OEM, 1=overdrive, 2=dual cpu, 3=reserved + // [19:16] Extended Model + // [27:20] Extended Family + leaf->eax = 0x00000480; + + leaf->ebx = 0; + leaf->ecx = 0; + + // EDX: Standard Feature Flags + // * [0:0] FPU on chip + // * [1:1] VME: Virtual-8086 Mode enhancements + // [2:2] DE: Debug Extensions (I/O breakpoints) + // [3:3] PSE: Page Size Extensions + // [4:4] TSC: Time Stamp Counter + // [5:5] MSR: RDMSR and WRMSR support + // [6:6] PAE: Physical Address Extensions + // [7:7] MCE: Machine Check Exception + // [8:8] CXS: CMPXCHG8B instruction + // [9:9] APIC: APIC on Chip + // [10:10] Reserved + // [11:11] SYSENTER/SYSEXIT support + // [12:12] MTRR: Memory Type Range Reg + // [13:13] PGE/PTE Global Bit + // [14:14] MCA: Machine Check Architecture + // [15:15] CMOV: Cond Mov/Cmp Instructions + // [16:16] PAT: Page Attribute Table + // [17:17] PSE-36: Physical Address Extensions + // [18:18] PSN: Processor Serial Number + // [19:19] CLFLUSH: CLFLUSH Instruction support + // [20:20] Reserved + // [21:21] DS: Debug Store + // [22:22] ACPI: Thermal Monitor and Software Controlled Clock Facilities + // [23:23] MMX Technology + // [24:24] FXSR: FXSAVE/FXRSTOR (also indicates CR4.OSFXSR is available) + // [25:25] SSE: SSE Extensions + // [26:26] SSE2: SSE2 Extensions + // [27:27] Self Snoop + // [28:28] Hyper Threading Technology + // [29:29] TM: Thermal Monitor + // [30:30] Reserved + // [31:31] PBE: Pending Break Enable + leaf->edx = get_std_cpuid_leaf_1_edx(); +} + +void i486dx4_t::dump_cpuid(void) const +{ + bx_cpuid_t::dump_cpuid(0x1, 0); +} + +bx_cpuid_t *create_i486dx4_cpuid(BX_CPU_C *cpu) { return new i486dx4_t(cpu); } + +#endif diff --git a/bochs/cpu/cpudb/intel/i486dx4.h b/bochs/cpu/cpudb/intel/i486dx4.h new file mode 100644 index 000000000..b6af471f7 --- /dev/null +++ b/bochs/cpu/cpudb/intel/i486dx4.h @@ -0,0 +1,51 @@ +///////////////////////////////////////////////////////////////////////// +// $Id$ +///////////////////////////////////////////////////////////////////////// +// +// Copyright (c) 2024 Stanislav Shwartsman +// Written by Stanislav Shwartsman [sshwarts at sourceforge net] +// +// This library is free software; you can redistribute it and/or +// modify it under the terms of the GNU Lesser General Public +// License as published by the Free Software Foundation; either +// version 2 of the License, or (at your option) any later version. +// +// This library is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +// Lesser General Public License for more details. +// +// You should have received a copy of the GNU Lesser General Public +// License along with this library; if not, write to the Free Software +// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA +// +///////////////////////////////////////////////////////////////////////// + +#ifndef BX_486DX4_CPUID_DEFINITIONS_H +#define BX_486DX4_CPUID_DEFINITIONS_H + +#if BX_CPU_LEVEL >= 4 + +#include "cpu/cpuid.h" + +class i486dx4_t : public bx_cpuid_t { +public: + i486dx4_t(BX_CPU_C *cpu); + virtual ~i486dx4_t() {} + + // return CPU name + virtual const char *get_name(void) const { return "i486dx4"; } + + virtual void get_cpuid_leaf(Bit32u function, Bit32u subfunction, cpuid_function_t *leaf) const; + + virtual void dump_cpuid(void) const; + +private: + void get_std_cpuid_leaf_1(cpuid_function_t *leaf) const; +}; + +extern bx_cpuid_t *create_i486dx4_cpuid(BX_CPU_C *cpu); + +#endif // BX_CPU_LEVEL >= 4 + +#endif diff --git a/bochs/cpudb.h b/bochs/cpudb.h index fe8c7033b..a037f96e6 100644 --- a/bochs/cpudb.h +++ b/bochs/cpudb.h @@ -22,6 +22,8 @@ ///////////////////////////////////////////////////////////////////////// bx_define_cpudb(bx_generic) +#if BX_CPU_LEVEL >= 4 +bx_define_cpudb(i486dx4) #if BX_CPU_LEVEL >= 5 bx_define_cpudb(pentium) bx_define_cpudb(pentium_mmx) @@ -59,3 +61,4 @@ bx_define_cpudb(arrow_lake) #endif #endif #endif +#endif \ No newline at end of file diff --git a/bochs/doc/docbook/user/user.dbk b/bochs/doc/docbook/user/user.dbk index f97e391e9..91acf9fbe 100644 --- a/bochs/doc/docbook/user/user.dbk +++ b/bochs/doc/docbook/user/user.dbk @@ -5962,7 +5962,12 @@ features enabled at compile time (3rd column). bx_generic Default Bochs CPU configured with CPUID option - cpu level 5 + cpu level 4 + + + i486dx4 + Intel 486DX4 + cpu level 4 pentium