enable secondary proc-based ctrls

bochs/cpu/msr.cc

@@ -1,5 +1,5 @@
 /////////////////////////////////////////////////////////////////////////
-// $Id: msr.cc,v 1.40 2010-03-14 15:51:26 sshwarts Exp $
+// $Id: msr.cc,v 1.41 2010-03-15 15:48:01 sshwarts Exp $
 /////////////////////////////////////////////////////////////////////////
 //
 //   Copyright (c) 2008-2009 Stanislav Shwartsman
@@ -158,6 +158,9 @@ bx_bool BX_CPP_AttrRegparmN(2) BX_CPU_C::rdmsr(Bit32u index, Bit64u *msr)
     case BX_MSR_VMX_VMENTRY_CTRLS:
       val64 = VMX_MSR_VMX_VMENTRY_CTRLS;
       break;
+    case BX_MSR_VMX_PROCBASED_CTRLS2:
+      val64 = VMX_MSR_VMX_PROCBASED_CTRLS2;
+      break;
     case BX_MSR_VMX_MISC:
       val64 = VMX_MSR_MISC;
       break;
@@ -501,6 +504,7 @@ bx_bool BX_CPP_AttrRegparmN(2) BX_CPU_C::wrmsr(Bit32u index, Bit64u val_64)
     case BX_MSR_VMX_VMCS_ENUM:
     case BX_MSR_VMX_TRUE_PINBASED_CTRLS:
     case BX_MSR_VMX_TRUE_PROCBASED_CTRLS:
+    case BX_MSR_VMX_PROCBASED_CTRLS2:
     case BX_MSR_VMX_TRUE_VMEXIT_CTRLS:
     case BX_MSR_VMX_TRUE_VMENTRY_CTRLS:
       BX_ERROR(("WRMSR: VMX read only MSR"));

bochs/cpu/proc_ctrl.cc

@@ -1,5 +1,5 @@
 /////////////////////////////////////////////////////////////////////////
-// $Id: proc_ctrl.cc,v 1.322 2010-03-15 14:18:36 sshwarts Exp $
+// $Id: proc_ctrl.cc,v 1.323 2010-03-15 15:48:01 sshwarts Exp $
 /////////////////////////////////////////////////////////////////////////
 //
 //  Copyright (C) 2001-2009  The Bochs Project
@@ -178,6 +178,15 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::WBINVD(bxInstruction_c *i)
     exception(BX_GP_EXCEPTION, 0);
   }
 
+#if BX_SUPPORT_VMX
+  if (BX_CPU_THIS_PTR in_vmx_guest) {
+    if (! SECONDARY_VMEXEC_CONTROL(VMX_VM_EXEC_CTRL3_WBINVD_VMEXIT)) {
+      BX_ERROR(("VMEXIT: WBINVD in VMX non-root operation"));
+      VMexit(i, VMX_VMEXIT_WBINVD, 0);
+    }
+  }
+#endif
+
   invalidate_prefetch_q();
 
   BX_DEBUG(("WBINVD: Flush internal caches !"));
@@ -1594,9 +1603,11 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::RDTSC(bxInstruction_c *i)
 void BX_CPP_AttrRegparmN(1) BX_CPU_C::RDTSCP(bxInstruction_c *i)
 {
 #if BX_SUPPORT_VMX
-  if (! SECONDARY_VMEXEC_CONTROL(VMX_VM_EXEC_CTRL3_RDTSCP)) {
+  if (BX_CPU_THIS_PTR in_vmx_guest) {
-    BX_ERROR(("RDTSCP: not allowed to use instruction !"));
+    if (! SECONDARY_VMEXEC_CONTROL(VMX_VM_EXEC_CTRL3_RDTSCP)) {
-    exception(BX_UD_EXCEPTION, 0);
+       BX_ERROR(("RDTSCP in VMX guest: not allowed to use instruction !"));
+       exception(BX_UD_EXCEPTION, 0);
+    }
   }
 #endif
 

bochs/cpu/vmx.cc

@@ -1,5 +1,5 @@
 /////////////////////////////////////////////////////////////////////////
-// $Id: vmx.cc,v 1.36 2010-03-15 13:57:12 sshwarts Exp $
+// $Id: vmx.cc,v 1.37 2010-03-15 15:48:01 sshwarts Exp $
 /////////////////////////////////////////////////////////////////////////
 //
 //   Copyright (c) 2009 Stanislav Shwartsman
@@ -330,6 +330,16 @@ VMX_error_code BX_CPU_C::VMenterLoadCheckVmControls(void)
      return VMXERR_VMENTRY_INVALID_VM_CONTROL_FIELD;
   }
 
+  if (~vm->vmexec_ctrls3 & VMX_MSR_VMX_PROCBASED_CTRLS2_LO) {
+     BX_ERROR(("VMFAIL: VMCS EXEC CTRL: VMX secondary proc-based controls allowed 0-settings"));
+     return VMXERR_VMENTRY_INVALID_VM_CONTROL_FIELD;
+  }
+
+  if (vm->vmexec_ctrls3 & ~VMX_MSR_VMX_PROCBASED_CTRLS2_HI) {
+     BX_ERROR(("VMFAIL: VMCS EXEC CTRL: VMX secondary proc-based controls allowed 1-settings"));
+     return VMXERR_VMENTRY_INVALID_VM_CONTROL_FIELD;
+  }
+
   if (vm->vm_cr3_target_cnt > VMX_CR3_TARGET_MAX_CNT) {
      BX_ERROR(("VMFAIL: VMCS EXEC CTRL: too may CR3 targets %d", vm->vm_cr3_target_cnt));
      return VMXERR_VMENTRY_INVALID_VM_CONTROL_FIELD;
@@ -2300,6 +2310,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::VMREAD(bxInstruction_c *i)
     case VMCS_32BIT_CONTROL_VMENTRY_EXCEPTION_ERR_CODE:
     case VMCS_32BIT_CONTROL_VMENTRY_INSTRUCTION_LENGTH:
     case VMCS_32BIT_CONTROL_TPR_THRESHOLD:
+    case VMCS_32BIT_CONTROL_SECONDARY_VMEXEC_CONTROLS:
       // fall through
 
     /* VMCS 32-bit read only data fields */
@@ -2613,6 +2624,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::VMWRITE(bxInstruction_c *i)
     case VMCS_32BIT_CONTROL_VMENTRY_EXCEPTION_ERR_CODE:
     case VMCS_32BIT_CONTROL_VMENTRY_INSTRUCTION_LENGTH:
     case VMCS_32BIT_CONTROL_TPR_THRESHOLD:
+    case VMCS_32BIT_CONTROL_SECONDARY_VMEXEC_CONTROLS:
       // fall through
 
     /* VMCS 32-bit guest-state fields */

bochs/cpu/vmx.h

@@ -1,5 +1,5 @@
 /////////////////////////////////////////////////////////////////////////
-// $Id: vmx.h,v 1.12 2010-03-15 13:57:12 sshwarts Exp $
+// $Id: vmx.h,v 1.13 2010-03-15 15:48:01 sshwarts Exp $
 /////////////////////////////////////////////////////////////////////////
 //
 //   Copyright (c) 2009 Stanislav Shwartsman
@@ -549,7 +549,8 @@ typedef struct bx_VMCS
         VMX_VM_EXEC_CTRL2_IO_BITMAPS | \
         VMX_VM_EXEC_CTRL2_MSR_BITMAPS | \
         VMX_VM_EXEC_CTRL2_MONITOR_VMEXIT | \
-        VMX_VM_EXEC_CTRL2_PAUSE_VMEXIT)
+        VMX_VM_EXEC_CTRL2_PAUSE_VMEXIT | \
+        VMX_VM_EXEC_CTRL2_SECONDARY_CONTROLS)
 
 #endif
 
@@ -565,6 +566,18 @@ typedef struct bx_VMCS
 #define VMX_VM_EXEC_CTRL3_UNRESTRICTED_GUEST        (1 << 7)
 #define VMX_VM_EXEC_CTRL3_PAUSE_LOOP_VMEXIT         (1 << 10)
 
+#ifdef BX_VMX_ENABLE_ALL
+
+#define VMX_VM_EXEC_CTRL3_SUPPORTED_BITS (0x0000008f)
+
+#else // only really supported features
+
+#define VMX_VM_EXEC_CTRL3_SUPPORTED_BITS \
+       (VMX_VM_EXEC_CTRL3_RDTSCP | \
+        VMX_VM_EXEC_CTRL3_WBINVD_VMEXIT)
+
+#endif
+
    Bit32u vmexec_ctrls3;
 
    Bit32u vm_exceptions_bitmap;
@@ -885,4 +898,16 @@ enum VMX_Activity_State {
    ((((Bit64u) VMX_MSR_VMCS_ENUM_HI) << 32) | VMX_MSR_VMCS_ENUM_LO)
 
 
+// IA32_VMX_MSR_PROCBASED_CTRLS2 MSR (0x48b)
+// -----------------------------
+
+// Allowed 0-settings (must be '1 bits)
+#define VMX_MSR_VMX_PROCBASED_CTRLS2_LO (0x00000000)
+// Allowed 1-settings
+#define VMX_MSR_VMX_PROCBASED_CTRLS2_HI \
+       (VMX_VM_EXEC_CTRL3_SUPPORTED_BITS | VMX_MSR_VMX_PROCBASED_CTRLS2_LO)
+
+#define VMX_MSR_VMX_PROCBASED_CTRLS2 \
+   ((((Bit64u) VMX_MSR_VMX_PROCBASED_CTRLS2_HI) << 32) | VMX_MSR_VMX_PROCBASED_CTRLS2_LO)
+
 #endif // _BX_VMX_INTEL_H_