Fix PCI memory hole by Sebastian

This commit is contained in:
Stanislav Shwartsman 2009-12-20 16:43:50 +00:00
parent 502fe2c737
commit ea2be842a2
4 changed files with 16 additions and 17 deletions

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@ -123,10 +123,10 @@ DefinitionBlock (
,, , AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite,
0x00000000, // Address Space Granularity
0xE0000000, // Address Range Minimum
0xC0000000, // Address Range Minimum
0xFEBFFFFF, // Address Range Maximum
0x00000000, // Address Translation Offset
0x1EC00000, // Address Length
0x3EC00000, // Address Length
,, , AddressRangeMemory, TypeStatic)
})
}

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@ -1,11 +1,11 @@
/*
*
* Intel ACPI Component Architecture
* ASL Optimizing Compiler version 20061109 [May 15 2007]
* Copyright (C) 2000 - 2006 Intel Corporation
* ASL Optimizing Compiler version 20090320 [Oct 24 2009]
* Copyright (C) 2000 - 2009 Intel Corporation
* Supports ACPI Specification Revision 3.0a
*
* Compilation of "acpi-dsdt.dsl" - Mon Oct 27 10:39:43 2008
* Compilation of "acpi-dsdt.dsl.i" - Sun Dec 20 15:20:28 2009
*
* C source code output
*
@ -13,10 +13,10 @@
const unsigned char AmlCode[] =
{
0x44,0x53,0x44,0x54,0x0D,0x08,0x00,0x00, /* 00000000 "DSDT...." */
0x01,0xA1,0x42,0x58,0x50,0x43,0x00,0x00, /* 00000008 "..BXPC.." */
0x01,0x95,0x42,0x58,0x50,0x43,0x00,0x00, /* 00000008 "..BXPC.." */
0x42,0x58,0x44,0x53,0x44,0x54,0x00,0x00, /* 00000010 "BXDSDT.." */
0x01,0x00,0x00,0x00,0x49,0x4E,0x54,0x4C, /* 00000018 "....INTL" */
0x09,0x11,0x06,0x20,0x10,0x1C,0x5C,0x00, /* 00000020 "... ..\." */
0x20,0x03,0x09,0x20,0x10,0x1C,0x5C,0x00, /* 00000020 " .. ..\." */
0x5B,0x80,0x44,0x42,0x47,0x5F,0x01,0x0B, /* 00000028 "[.DBG_.." */
0x44,0xB0,0x0A,0x04,0x5B,0x81,0x0B,0x44, /* 00000030 "D...[..D" */
0x42,0x47,0x5F,0x03,0x44,0x42,0x47,0x4C, /* 00000038 "BG_.DBGL" */
@ -81,9 +81,9 @@ const unsigned char AmlCode[] =
0x00,0x0A,0x00,0xFF,0xFF,0x0B,0x00,0x00, /* 00000210 "........" */
0x00,0x00,0x00,0x00,0x00,0x02,0x00,0x87, /* 00000218 "........" */
0x17,0x00,0x00,0x0C,0x01,0x00,0x00,0x00, /* 00000220 "........" */
0x00,0x00,0x00,0x00,0xE0,0xFF,0xFF,0xBF, /* 00000228 "........" */
0x00,0x00,0x00,0x00,0xC0,0xFF,0xFF,0xBF, /* 00000228 "........" */
0xFE,0x00,0x00,0x00,0x00,0x00,0x00,0xC0, /* 00000230 "........" */
0x1E,0x79,0x00,0x10,0x4D,0x2B,0x2E,0x5F, /* 00000238 ".y..M+._" */
0x3E,0x79,0x00,0x10,0x4D,0x2B,0x2E,0x5F, /* 00000238 ">y..M+._" */
0x53,0x42,0x5F,0x50,0x43,0x49,0x30,0x5B, /* 00000240 "SB_PCI0[" */
0x82,0x2A,0x56,0x47,0x41,0x5F,0x08,0x5F, /* 00000248 ".*VGA_._" */
0x41,0x44,0x52,0x0C,0x00,0x00,0x02,0x00, /* 00000250 "ADR....." */

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@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: rombios.c,v 1.236 2009-12-12 08:29:01 sshwarts Exp $
// $Id: rombios.c,v 1.237 2009-12-20 16:43:50 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2002 MandrakeSoft S.A.
@ -937,7 +937,7 @@ Bit16u cdrom_boot();
#endif // BX_ELTORITO_BOOT
static char bios_cvs_version_string[] = "$Revision: 1.236 $ $Date: 2009-12-12 08:29:01 $";
static char bios_cvs_version_string[] = "$Revision: 1.237 $ $Date: 2009-12-20 16:43:50 $";
#define BIOS_COPYRIGHT_STRING "(c) 2002 MandrakeSoft S.A. Written by Kevin Lawton & the Bochs team."
@ -4628,9 +4628,8 @@ ASM_END
extended_memory_size <<= 8;
extended_memory_size |= inb_cmos(0x34);
extended_memory_size *= 64;
// greater than EFF00000???
if(extended_memory_size > 0x3bc000) {
extended_memory_size = 0x3bc000; // everything after this is reserved memory until we get to 0x100000000
if(extended_memory_size > 0x2fc000) {
extended_memory_size = 0x2fc000; // everything after this is reserved memory until we get to 0x100000000
}
extended_memory_size *= 1024;
extended_memory_size += (16L * 1024 * 1024);

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@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: rombios32.c,v 1.55 2009-12-19 17:31:43 sshwarts Exp $
// $Id: rombios32.c,v 1.56 2009-12-20 16:43:50 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// 32 bit Bochs BIOS init code
@ -577,8 +577,8 @@ void setup_mtrr(void)
wrmsr_smp(MSR_MTRRfix4K_E8000, 0);
wrmsr_smp(MSR_MTRRfix4K_F0000, 0);
wrmsr_smp(MSR_MTRRfix4K_F8000, 0);
/* Mark 3.5-4GB as UC, anything not specified defaults to WB */
wrmsr_smp(MTRRphysBase_MSR(0), 0xe0000000 | MTRR_MEMTYPE_UC);
/* Mark 3-4GB as UC, anything not specified defaults to WB */
wrmsr_smp(MTRRphysBase_MSR(0), 0xc0000000 | MTRR_MEMTYPE_UC);
/* Make sure no reserved bit set to '1 in MTRRphysMask_MSR */
wrmsr_smp(MTRRphysMask_MSR(0), (uint32_t)(~(0x20000000 - 1)) | 0x800);
wrmsr_smp(MSR_MTRRdefType, 0xc00 | MTRR_MEMTYPE_WB);