diff --git a/bochs/cpu/fetchdecode.cc b/bochs/cpu/fetchdecode.cc index 48ad73178..ebeee35d1 100644 --- a/bochs/cpu/fetchdecode.cc +++ b/bochs/cpu/fetchdecode.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: fetchdecode.cc,v 1.39 2002-12-20 09:11:37 sshwarts Exp $ +// $Id: fetchdecode.cc,v 1.40 2002-12-22 20:42:56 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001 MandrakeSoft S.A. @@ -235,6 +235,12 @@ ANDNPS_VpsWps (0f 55) = ANDNPD_VpdWpd (66 0f 55) = PANDN_VdqWdq (66 0f df) ORPS_VpsWps (0f 56) = ORPD_VpdWpd (66 0f 56) = POR_VdqWdq (66 0f eb) XORPS_VpsWps (0f 57) = XORPD_VpdWpd (66 0f 57) = PXOR_VdqWdq (66 0f ef) +UNPCKHPS_VpsWq (0f 15) = PUNPCKHDQ_VdqWq (66 0f 6a) +UNPCKLPS_VpsWq (0f 14) = PUNPCKLDQ_VdqWq (66 0f 62) + +UNPCKHPD_VpsWq (66 0f 15) = PUNPCKHQDQ_VdqWq (66 0f 6d) +UNPCKLPD_VpsWq (66 0f 14) = PUNPCKLQDQ_VdqWq (66 0f 6c) + */ static BxOpcodeInfo_t BxOpcodeGroupSSE_0f10[4] = { @@ -266,15 +272,15 @@ static BxOpcodeInfo_t BxOpcodeGroupSSE_0f13[4] = { }; static BxOpcodeInfo_t BxOpcodeGroupSSE_0f14[4] = { - /* -- */ { 0, &BX_CPU_C::UNPCKLPS_VpsWq }, - /* 66 */ { 0, &BX_CPU_C::UNPCKLPD_VpdWq }, + /* -- */ { 0, &BX_CPU_C::PUNPCKLDQ_VdqWq }, + /* 66 */ { 0, &BX_CPU_C::PUNPCKLQDQ_VdqWq }, /* F2 */ { 0, &BX_CPU_C::BxError }, /* F3 */ { 0, &BX_CPU_C::BxError } }; static BxOpcodeInfo_t BxOpcodeGroupSSE_0f15[4] = { - /* -- */ { 0, &BX_CPU_C::UNPCKHPS_VpsWq }, - /* 66 */ { 0, &BX_CPU_C::UNPCKHPD_VpdWq }, + /* -- */ { 0, &BX_CPU_C::PUNPCKHDQ_VdqWq }, + /* 66 */ { 0, &BX_CPU_C::PUNPCKHQDQ_VdqWq }, /* F2 */ { 0, &BX_CPU_C::BxError }, /* F3 */ { 0, &BX_CPU_C::BxError } }; diff --git a/bochs/cpu/fetchdecode64.cc b/bochs/cpu/fetchdecode64.cc index 60cda6183..8b3351428 100644 --- a/bochs/cpu/fetchdecode64.cc +++ b/bochs/cpu/fetchdecode64.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: fetchdecode64.cc,v 1.36 2002-12-20 09:11:38 sshwarts Exp $ +// $Id: fetchdecode64.cc,v 1.37 2002-12-22 20:42:56 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001 MandrakeSoft S.A. @@ -303,6 +303,12 @@ ANDNPS_VpsWps (0f 55) = ANDNPD_VpdWpd (66 0f 55) = PANDN_VdqWdq (66 0f df) ORPS_VpsWps (0f 56) = ORPD_VpdWpd (66 0f 56) = POR_VdqWdq (66 0f eb) XORPS_VpsWps (0f 57) = XORPD_VpdWpd (66 0f 57) = PXOR_VdqWdq (66 0f ef) +UNPCKHPS_VpsWq (0f 15) = PUNPCKHDQ_VdqWq (66 0f 6a) +UNPCKLPS_VpsWq (0f 14) = PUNPCKLDQ_VdqWq (66 0f 62) + +UNPCKHPD_VpsWq (66 0f 15) = PUNPCKHQDQ_VdqWq (66 0f 6d) +UNPCKLPD_VpsWq (66 0f 14) = PUNPCKLQDQ_VdqWq (66 0f 6c) + */ static BxOpcodeInfo_t BxOpcodeGroupSSE_0f10[4] = { @@ -334,15 +340,15 @@ static BxOpcodeInfo_t BxOpcodeGroupSSE_0f13[4] = { }; static BxOpcodeInfo_t BxOpcodeGroupSSE_0f14[4] = { - /* -- */ { 0, &BX_CPU_C::UNPCKLPS_VpsWq }, - /* 66 */ { 0, &BX_CPU_C::UNPCKLPD_VpdWq }, + /* -- */ { 0, &BX_CPU_C::PUNPCKLDQ_VdqWq }, + /* 66 */ { 0, &BX_CPU_C::PUNPCKLQDQ_VdqWq }, /* F2 */ { 0, &BX_CPU_C::BxError }, /* F3 */ { 0, &BX_CPU_C::BxError } }; static BxOpcodeInfo_t BxOpcodeGroupSSE_0f15[4] = { - /* -- */ { 0, &BX_CPU_C::UNPCKHPS_VpsWq }, - /* 66 */ { 0, &BX_CPU_C::UNPCKHPD_VpdWq }, + /* -- */ { 0, &BX_CPU_C::PUNPCKHDQ_VdqWq }, + /* 66 */ { 0, &BX_CPU_C::PUNPCKHQDQ_VdqWq }, /* F2 */ { 0, &BX_CPU_C::BxError }, /* F3 */ { 0, &BX_CPU_C::BxError } }; diff --git a/bochs/cpu/sse_move.cc b/bochs/cpu/sse_move.cc index ca4aaeb85..e7a9f3943 100644 --- a/bochs/cpu/sse_move.cc +++ b/bochs/cpu/sse_move.cc @@ -28,6 +28,8 @@ /* SSE: MEMORY MOVE OPERATIONS */ /* *************************** */ +/* All these opcodes never generate SIMD floating point exections */ + /* MOVUPS: 0F 10 */ /* MOVUPD: 66 0F 10 */ /* MOVDQU: F3 0F 6F */ @@ -421,54 +423,6 @@ void BX_CPU_C::SHUFPD_VpdWpdIb(bxInstruction_c *i) #endif } -void BX_CPU_C::UNPCKLPS_VpsWq(bxInstruction_c *i) -{ -#if BX_SUPPORT_SSE >= 1 - BX_CPU_THIS_PTR prepareSSE(); - - BX_PANIC(("UNPCKLPS_VpsWq: SSE instruction still not implemented")); -#else - BX_INFO(("UNPCKLPS_VpsWq: SSE not supported in current configuration")); - UndefinedOpcode(i); -#endif -} - -void BX_CPU_C::UNPCKHPS_VpsWq(bxInstruction_c *i) -{ -#if BX_SUPPORT_SSE >= 1 - BX_CPU_THIS_PTR prepareSSE(); - - BX_PANIC(("UNPCKHPS_VpsWq: SSE instruction still not implemented")); -#else - BX_INFO(("UNPCKHPS_VpsWq: SSE not supported in current configuration")); - UndefinedOpcode(i); -#endif -} - -void BX_CPU_C::UNPCKLPD_VpdWq(bxInstruction_c *i) -{ -#if BX_SUPPORT_SSE >= 2 - BX_CPU_THIS_PTR prepareSSE(); - - BX_PANIC(("UNPCKLPD_VpdWq: SSE2 instruction still not implemented")); -#else - BX_INFO(("UNPCKLPD_VpdWq: SSE2 not supported in current configuration")); - UndefinedOpcode(i); -#endif -} - -void BX_CPU_C::UNPCKHPD_VpdWq(bxInstruction_c *i) -{ -#if BX_SUPPORT_SSE >= 2 - BX_CPU_THIS_PTR prepareSSE(); - - BX_PANIC(("UNPCKHPD_VpdWq: SSE2 instruction still not implemented")); -#else - BX_INFO(("UNPCKHPD_VpdWq: SSE2 not supported in current configuration")); - UndefinedOpcode(i); -#endif -} - /* 66 0F 60 */ void BX_CPU_C::PUNPCKLBW_VdqWq(bxInstruction_c *i) { @@ -545,10 +499,12 @@ void BX_CPU_C::PUNPCKLWD_VdqWq(bxInstruction_c *i) #endif } -/* 66 0F 62 */ +/* UNPCKLPS: 0F 14 */ +/* PUNPCKLDQ: 66 0F 62 */ + void BX_CPU_C::PUNPCKLDQ_VdqWq(bxInstruction_c *i) { -#if BX_SUPPORT_SSE >= 2 +#if BX_SUPPORT_SSE >= 1 BX_CPU_THIS_PTR prepareSSE(); BxPackedXmmRegister op1 = BX_READ_XMM_REG(i->nnn()), op2, result; @@ -570,7 +526,7 @@ void BX_CPU_C::PUNPCKLDQ_VdqWq(bxInstruction_c *i) /* now write result back to destination */ BX_WRITE_XMM_REG(i->nnn(), result); #else - BX_INFO(("PUNPCKLDQ_VdqWq: SSE2 not supported in current configuration")); + BX_INFO(("UNPCKLPS/PUNPCKLDQ_VdqWq: SSE not supported in current configuration")); UndefinedOpcode(i); #endif } @@ -651,10 +607,12 @@ void BX_CPU_C::PUNPCKHWD_VdqWq(bxInstruction_c *i) #endif } -/* 66 0F 6A */ +/* UNPCKHPS: 0F 15 */ +/* PUNPCKHDQ: 66 0F 6A */ + void BX_CPU_C::PUNPCKHDQ_VdqWq(bxInstruction_c *i) { -#if BX_SUPPORT_SSE >= 2 +#if BX_SUPPORT_SSE >= 1 BX_CPU_THIS_PTR prepareSSE(); BxPackedXmmRegister op1 = BX_READ_XMM_REG(i->nnn()), op2, result; @@ -676,12 +634,14 @@ void BX_CPU_C::PUNPCKHDQ_VdqWq(bxInstruction_c *i) /* now write result back to destination */ BX_WRITE_XMM_REG(i->nnn(), result); #else - BX_INFO(("PUNPCKHDQ_VdqWq: SSE2 not supported in current configuration")); + BX_INFO(("UNPCKHPS/PUNPCKHDQ_VdqWq: SSE not supported in current configuration")); UndefinedOpcode(i); #endif } -/* 66 0F 6C */ +/* UNPCKLPD: 66 0F 14 */ +/* PUNPCKLQDQ: 66 0F 6C */ + void BX_CPU_C::PUNPCKLQDQ_VdqWq(bxInstruction_c *i) { #if BX_SUPPORT_SSE >= 2 @@ -703,12 +663,14 @@ void BX_CPU_C::PUNPCKLQDQ_VdqWq(bxInstruction_c *i) /* now write result back to destination */ BX_WRITE_XMM_REG(i->nnn(), op1); #else - BX_INFO(("PUNPCKLQDQ_VdqWq: SSE2 not supported in current configuration")); + BX_INFO(("UNPCKLPD/PUNPCKLQDQ_VdqWq: SSE2 not supported in current configuration")); UndefinedOpcode(i); #endif } -/* 66 0F 6D */ +/* UNPCKHPD: 66 0F 15 */ +/* PUNPCKHQDQ: 66 0F 6D */ + void BX_CPU_C::PUNPCKHQDQ_VdqWq(bxInstruction_c *i) { #if BX_SUPPORT_SSE >= 2 @@ -731,7 +693,7 @@ void BX_CPU_C::PUNPCKHQDQ_VdqWq(bxInstruction_c *i) /* now write result back to destination */ BX_WRITE_XMM_REG(i->nnn(), result); #else - BX_INFO(("PUNPCKHQDQ_VdqWq: SSE2 not supported in current configuration")); + BX_INFO(("UNPCKHPD/PUNPCKHQDQ_VdqWq: SSE2 not supported in current configuration")); UndefinedOpcode(i); #endif } @@ -864,7 +826,7 @@ void BX_CPU_C::MOVNTPS_MdqVps(bxInstruction_c *i) BX_CPU_THIS_PTR prepareSSE(); if (i->modC0()) { - BX_INFO(("MOVNTPS_MdqVps: must be memory reference")); + BX_INFO(("MOVNTPS/PD/MOVNTDQ_MdqVdq: must be memory reference")); UndefinedOpcode(i); }