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- several fixes in PCI ROM code of the memory handlers

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- use 'pci_rom_size - 1' as the mask for the offset address
  - ne2k: memory handlers must be disabled if compiled without PCI support
  - svga_cirrus: check for the PCI ROM size to make VBE work correctly
  - added BX_INFO to the mem write handlers
This commit is contained in:
Volker Ruppert 2011-12-20 19:33:16 +00:00
parent 7cdeecf198
commit e312454851
5 changed files with 21 additions and 13 deletions
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12
bochs/iodev/e1000.cc
View File

@ -576,9 +576,8 @@ bx_bool bx_e1000_c::mem_read_handler(bx_phy_address addr, unsigned len,
Bit16u index; Bit16u index;
if (BX_E1000_THIS pci_rom_size > 0) { if (BX_E1000_THIS pci_rom_size > 0) {
if ((addr >= BX_E1000_THIS pci_rom_address) && Bit32u mask = (BX_E1000_THIS pci_rom_size - 1);
(addr < (BX_E1000_THIS pci_rom_address + BX_E1000_THIS pci_rom_size))) { if ((addr & ~mask) == BX_E1000_THIS pci_rom_address) {
#ifdef BX_LITTLE_ENDIAN #ifdef BX_LITTLE_ENDIAN
data8_ptr = (Bit8u *) data; data8_ptr = (Bit8u *) data;
#else // BX_BIG_ENDIAN #else // BX_BIG_ENDIAN
@ -586,7 +585,7 @@ bx_bool bx_e1000_c::mem_read_handler(bx_phy_address addr, unsigned len,
#endif #endif
for (unsigned i = 0; i < len; i++) { for (unsigned i = 0; i < len; i++) {
if (BX_E1000_THIS pci_conf[0x30] & 0x01) { if (BX_E1000_THIS pci_conf[0x30] & 0x01) {
*data8_ptr = BX_E1000_THIS pci_rom[addr & 0x1ffff]; *data8_ptr = BX_E1000_THIS pci_rom[addr & mask];
} else { } else {
*data8_ptr = 0xff; *data8_ptr = 0xff;
} }
@ -684,8 +683,9 @@ bx_bool bx_e1000_c::mem_write_handler(bx_phy_address addr, unsigned len,
Bit16u index; Bit16u index;
if (BX_E1000_THIS pci_rom_size > 0) { if (BX_E1000_THIS pci_rom_size > 0) {
if ((addr >= BX_E1000_THIS pci_rom_address) && Bit32u mask = (BX_E1000_THIS pci_rom_size - 1);
(addr < (BX_E1000_THIS pci_rom_address + BX_E1000_THIS pci_rom_size))) { if ((addr & ~mask) == BX_E1000_THIS pci_rom_address) {
BX_INFO(("write to ROM ignored (addr=0x%08x len=%d)", (Bit32u)addr, len));
return 1; return 1;
} }
} }

6
bochs/iodev/ne2k.cc
View File

@ -1136,11 +1136,13 @@ void bx_ne2k_c::tx_timer(void)
} }
#if BX_SUPPORT_PCI
bx_bool bx_ne2k_c::mem_read_handler(bx_phy_address addr, unsigned len, bx_bool bx_ne2k_c::mem_read_handler(bx_phy_address addr, unsigned len,
void *data, void *param) void *data, void *param)
{ {
Bit8u *data_ptr; Bit8u *data_ptr;
Bit32u mask = (BX_NE2K_THIS pci_rom_size - 1);
#ifdef BX_LITTLE_ENDIAN #ifdef BX_LITTLE_ENDIAN
data_ptr = (Bit8u *) data; data_ptr = (Bit8u *) data;
#else // BX_BIG_ENDIAN #else // BX_BIG_ENDIAN
@ -1148,7 +1150,7 @@ bx_bool bx_ne2k_c::mem_read_handler(bx_phy_address addr, unsigned len,
#endif #endif
for (unsigned i = 0; i < len; i++) { for (unsigned i = 0; i < len; i++) {
if (BX_NE2K_THIS pci_conf[0x30] & 0x01) { if (BX_NE2K_THIS pci_conf[0x30] & 0x01) {
*data_ptr = BX_NE2K_THIS pci_rom[addr & 0x1ffff]; *data_ptr = BX_NE2K_THIS pci_rom[addr & mask];
} else { } else {
*data_ptr = 0xff; *data_ptr = 0xff;
} }
@ -1165,8 +1167,10 @@ bx_bool bx_ne2k_c::mem_read_handler(bx_phy_address addr, unsigned len,
bx_bool bx_ne2k_c::mem_write_handler(bx_phy_address addr, unsigned len, bx_bool bx_ne2k_c::mem_write_handler(bx_phy_address addr, unsigned len,
void *data, void *param) void *data, void *param)
{ {
BX_INFO(("write to ROM ignored (addr=0x%08x len=%d)", (Bit32u)addr, len));
return 1; return 1;
} }
#endif
// //
// read_handler/read - i/o 'catcher' function called from BOCHS // read_handler/read - i/o 'catcher' function called from BOCHS

4
bochs/iodev/pcipnic.cc
View File

@ -189,6 +189,7 @@ bx_bool bx_pcipnic_c::mem_read_handler(bx_phy_address addr, unsigned len,
{ {
Bit8u *data_ptr; Bit8u *data_ptr;
Bit32u mask = (BX_PNIC_THIS pci_rom_size - 1);
#ifdef BX_LITTLE_ENDIAN #ifdef BX_LITTLE_ENDIAN
data_ptr = (Bit8u *) data; data_ptr = (Bit8u *) data;
#else // BX_BIG_ENDIAN #else // BX_BIG_ENDIAN
@ -196,7 +197,7 @@ bx_bool bx_pcipnic_c::mem_read_handler(bx_phy_address addr, unsigned len,
#endif #endif
for (unsigned i = 0; i < len; i++) { for (unsigned i = 0; i < len; i++) {
if (BX_PNIC_THIS pci_conf[0x30] & 0x01) { if (BX_PNIC_THIS pci_conf[0x30] & 0x01) {
*data_ptr = BX_PNIC_THIS pci_rom[addr & 0x1ffff]; *data_ptr = BX_PNIC_THIS pci_rom[addr & mask];
} else { } else {
*data_ptr = 0xff; *data_ptr = 0xff;
} }
@ -213,6 +214,7 @@ bx_bool bx_pcipnic_c::mem_read_handler(bx_phy_address addr, unsigned len,
bx_bool bx_pcipnic_c::mem_write_handler(bx_phy_address addr, unsigned len, bx_bool bx_pcipnic_c::mem_write_handler(bx_phy_address addr, unsigned len,
void *data, void *param) void *data, void *param)
{ {
BX_INFO(("write to ROM ignored (addr=0x%08x len=%d)", (Bit32u)addr, len));
return 1; return 1;
} }

3
bochs/iodev/pcivga.cc
View File

@ -146,6 +146,7 @@ bx_bool bx_pcivga_c::mem_read_handler(bx_phy_address addr, unsigned len, void *d
{ {
Bit8u *data_ptr; Bit8u *data_ptr;
Bit32u mask = (BX_PCIVGA_THIS pci_rom_size - 1);
#ifdef BX_LITTLE_ENDIAN #ifdef BX_LITTLE_ENDIAN
data_ptr = (Bit8u *) data; data_ptr = (Bit8u *) data;
#else #else
@ -154,7 +155,7 @@ bx_bool bx_pcivga_c::mem_read_handler(bx_phy_address addr, unsigned len, void *d
for (unsigned i = 0; i < len; i++) { for (unsigned i = 0; i < len; i++) {
if (BX_PCIVGA_THIS pci_conf[0x30] & 0x01) { if (BX_PCIVGA_THIS pci_conf[0x30] & 0x01) {
*data_ptr = BX_PCIVGA_THIS pci_rom[addr - BX_PCIVGA_THIS pci_rom_address]; *data_ptr = BX_PCIVGA_THIS pci_rom[addr & mask];
} else { } else {
*data_ptr = 0xff; *data_ptr = 0xff;
} }

9
bochs/iodev/svga_cirrus.cc
View File

@ -563,11 +563,12 @@ bx_bool bx_svga_cirrus_c::cirrus_mem_read_handler(bx_phy_address addr, unsigned
Bit8u bx_svga_cirrus_c::mem_read(bx_phy_address addr) Bit8u bx_svga_cirrus_c::mem_read(bx_phy_address addr)
{ {
#if BX_SUPPORT_PCI #if BX_SUPPORT_PCI
if (BX_CIRRUS_THIS pci_enabled) { if ((BX_CIRRUS_THIS pci_enabled) && (BX_CIRRUS_THIS pci_rom_size > 0)) {
if ((addr >= BX_CIRRUS_THIS pci_rom_address) && Bit32u mask = (BX_CIRRUS_THIS pci_rom_size - 1);
(addr < (BX_CIRRUS_THIS pci_rom_address + BX_CIRRUS_THIS pci_rom_size))) { if ((addr & ~mask) == BX_CIRRUS_THIS pci_rom_address) {
BX_INFO(("read ROM"));
if (BX_CIRRUS_THIS pci_conf[0x30] & 0x01) { if (BX_CIRRUS_THIS pci_conf[0x30] & 0x01) {
return BX_CIRRUS_THIS pci_rom[addr - BX_CIRRUS_THIS pci_rom_address]; return BX_CIRRUS_THIS pci_rom[addr & mask];
} else { } else {
return 0xff; return 0xff;
} }