Some work on the Voodoo Banshee emulation.
- Banshee Memory layout implemented (AGP/misc and 2D register behaviour not implemented yet). Now Win95 with Banshee driver can boot in standard VGA mode. - Fixed memory allocation: Banshee has 16 MB shared LFB / TMU memory. - Some work on save/restore support. - Renamed Banshee VGA register handlers.
This commit is contained in:
Volker Ruppert
parent
539356ac13
commit
e2245d98d3
@ -409,7 +409,9 @@ void bx_voodoo_c::register_state(void)
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new bx_shadow_num_c(dac, "read_result", &v->dac.read_result, BASE_HEX);
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new bx_shadow_num_c(dac, "clk0_freq", &v->dac.clk0_freq);
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bx_list_c *fbi = new bx_list_c(vstate, "fbi", "framebuffer");
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new bx_shadow_data_c(fbi, "ram", v->fbi.ram, (4 << 20));
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if ((BX_VOODOO_THIS s.model < VOODOO_BANSHEE) || (theVoodooVga == NULL)) {
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new bx_shadow_data_c(fbi, "ram", v->fbi.ram, v->fbi.mask + 1);
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}
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new bx_shadow_num_c(fbi, "rgboffs0", &v->fbi.rgboffs[0], BASE_HEX);
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new bx_shadow_num_c(fbi, "rgboffs1", &v->fbi.rgboffs[1], BASE_HEX);
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new bx_shadow_num_c(fbi, "rgboffs2", &v->fbi.rgboffs[2], BASE_HEX);
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@ -502,7 +504,9 @@ void bx_voodoo_c::register_state(void)
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for (i = 0; i < MAX_TMU; i++) {
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sprintf(name, "%d", i);
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bx_list_c *num = new bx_list_c(tmu, name, "");
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new bx_shadow_data_c(num, "ram", v->tmu[i].ram, (4 << 20));
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if (BX_VOODOO_THIS s.model < VOODOO_BANSHEE) {
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new bx_shadow_data_c(num, "ram", v->tmu[i].ram, (4 << 20));
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}
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new bx_shadow_bool_c(num, "regdirty", &v->tmu[i].regdirty);
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new bx_shadow_num_c(num, "starts", &v->tmu[i].starts);
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new bx_shadow_num_c(num, "startt", &v->tmu[i].startt);
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@ -557,6 +561,12 @@ void bx_voodoo_c::register_state(void)
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new bx_shadow_data_c(num, "palettea", (Bit8u*)v->tmu[i].palettea, 256 * sizeof(rgb_t));
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}
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new bx_shadow_num_c(vstate, "send_config", &v->send_config);
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if (BX_VOODOO_THIS s.model == VOODOO_BANSHEE) {
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bx_list_c *banshee = new bx_list_c(list, "banshee", "Voodoo Banshee State");
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new bx_shadow_data_c(banshee, "io", (Bit8u*)v->banshee.io, 256, 1);
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new bx_shadow_data_c(banshee, "crtc", (Bit8u*)v->banshee.crtc, 0x27, 1);
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// TODO
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}
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bx_list_c *vdraw = new bx_list_c(list, "vdraw", "Voodoo Draw State");
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new bx_shadow_bool_c(vdraw, "clock_enabled", &BX_VOODOO_THIS s.vdraw.clock_enabled);
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new bx_shadow_bool_c(vdraw, "output_on", &BX_VOODOO_THIS s.vdraw.output_on);
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@ -583,6 +593,27 @@ void bx_voodoo_c::after_restore_state(void)
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}
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} else {
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bx_pci_device_c::after_restore_pci_state(mem_read_handler);
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if (DEV_pci_set_base_mem(BX_VOODOO_THIS_PTR, mem_read_handler, mem_write_handler,
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&BX_VOODOO_THIS pci_base_address[0],
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&BX_VOODOO_THIS pci_conf[0x10],
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0x2000000)) {
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BX_INFO(("new mem base address: 0x%08x", BX_VOODOO_THIS pci_base_address[0]));
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}
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if (DEV_pci_set_base_mem(BX_VOODOO_THIS_PTR, mem_read_handler, mem_write_handler,
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&BX_VOODOO_THIS pci_base_address[1],
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&BX_VOODOO_THIS pci_conf[0x14],
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0x2000000)) {
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BX_INFO(("new lfb base address: 0x%08x", BX_VOODOO_THIS pci_base_address[1]));
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}
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if (DEV_pci_set_base_io(BX_VOODOO_THIS_PTR, banshee_read_handler, banshee_write_handler,
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&BX_VOODOO_THIS pci_base_address[2],
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&BX_VOODOO_THIS pci_conf[0x18],
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256, &banshee_iomask[0], "banshee")) {
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BX_INFO(("new i/o base address: 0x%04x", BX_VOODOO_THIS pci_base_address[2]));
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}
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if ((v->banshee.io[io_vidProcCfg] & 0x01) && (theVoodooVga != NULL)) {
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theVoodooVga->banshee_update_mode();
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}
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// TODO
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}
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}
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@ -1027,151 +1058,203 @@ Bit32u bx_voodoo_c::banshee_read_handler(void *this_ptr, Bit32u address, unsigne
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{
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UNUSED(this_ptr);
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Bit32u result = 0xffffffff;
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Bit32u result;
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if ((address & ~0xff) == BX_VOODOO_THIS pci_base_address[2]) {
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Bit8u offset = (Bit8u)(address & 0xff);
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Bit8u reg = (offset>>2);
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BX_DEBUG(("banshee read from offset 0x%02x (%s)", offset, banshee_io_reg_name[reg]));
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switch (offset>>2) {
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case io_status:
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result = register_r(0);
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break;
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Bit8u offset = (Bit8u)(address & 0xff);
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Bit8u reg = (offset>>2);
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BX_DEBUG(("banshee read from offset 0x%02x (%s)", offset, banshee_io_reg_name[reg]));
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switch (offset>>2) {
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case io_status:
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result = register_r(0);
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break;
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case io_dacData:
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result = v->fbi.clut[v->banshee.io[io_dacAddr] & 0x1ff] = v->banshee.io[reg];
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break;
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case io_dacData:
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result = v->fbi.clut[v->banshee.io[io_dacAddr] & 0x1ff] = v->banshee.io[reg];
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break;
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case io_vgab0: case io_vgab4: case io_vgab8: case io_vgabc:
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case io_vgac0: case io_vgac4: case io_vgac8: case io_vgacc:
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case io_vgad0: case io_vgad4: case io_vgad8: case io_vgadc:
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result = 0;
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if (theVoodooVga != NULL) {
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for (unsigned i=0; i<io_len; i++) {
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result <<= 8;
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result |= theVoodooVga->banshee_read_handler(theVoodooVga, 0x300+offset+i, 1);
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}
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case io_vgab0: case io_vgab4: case io_vgab8: case io_vgabc:
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case io_vgac0: case io_vgac4: case io_vgac8: case io_vgacc:
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case io_vgad0: case io_vgad4: case io_vgad8: case io_vgadc:
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result = 0;
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if (theVoodooVga != NULL) {
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for (unsigned i=0; i<io_len; i++) {
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result <<= 8;
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result |= theVoodooVga->banshee_vga_read_handler(theVoodooVga, 0x300+offset+i, 1);
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}
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break;
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}
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break;
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default:
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result = v->banshee.io[reg];
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break;
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}
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BX_DEBUG(("banshee read result = 0x%08x", result));
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default:
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result = v->banshee.io[reg];
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break;
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}
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BX_DEBUG(("banshee read result = 0x%08x", result));
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return result;
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}
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void bx_voodoo_c::banshee_write_handler(void *this_ptr, Bit32u address, Bit32u value, unsigned io_len)
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{
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UNUSED(this_ptr);
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Bit16u width, height;
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if ((address & ~0xff) == BX_VOODOO_THIS pci_base_address[2]) {
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Bit8u offset = (Bit8u)(address & 0xff);
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Bit8u reg = (offset>>2);
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Bit32u old = v->banshee.io[reg];
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BX_DEBUG(("banshee write to offset 0x%02x: value = 0x%08x len=%d (%s)", offset, value,
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io_len, banshee_io_reg_name[reg]));
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switch (reg) {
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case io_vidProcCfg:
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v->banshee.io[reg] = value;
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if ((v->banshee.io[reg] ^ old) & 0x2800)
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v->fbi.clut_dirty = 1;
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if ((v->banshee.io[reg] & 0x01) && ((old & 0x01) == 0x00)) {
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Bit8u offset = (Bit8u)(address & 0xff);
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Bit8u reg = (offset>>2);
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Bit32u old = v->banshee.io[reg];
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BX_DEBUG(("banshee write to offset 0x%02x: value = 0x%08x len=%d (%s)", offset, value,
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io_len, banshee_io_reg_name[reg]));
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switch (reg) {
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case io_vidProcCfg:
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v->banshee.io[reg] = value;
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if ((v->banshee.io[reg] ^ old) & 0x2800)
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v->fbi.clut_dirty = 1;
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if ((v->banshee.io[reg] & 0x01) && ((old & 0x01) == 0x00)) {
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if (theVoodooVga != NULL) {
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theVoodooVga->banshee_update_mode();
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}
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break;
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}
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break;
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case io_dacData:
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v->banshee.io[reg] = value;
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if (v->banshee.io[reg] != v->fbi.clut[v->banshee.io[io_dacAddr] & 0x1ff]) {
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v->fbi.clut[v->banshee.io[io_dacAddr] & 0x1ff] = v->banshee.io[reg];
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v->fbi.clut_dirty = 1;
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}
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break;
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case io_dacData:
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v->banshee.io[reg] = value;
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if (v->banshee.io[reg] != v->fbi.clut[v->banshee.io[io_dacAddr] & 0x1ff]) {
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v->fbi.clut[v->banshee.io[io_dacAddr] & 0x1ff] = v->banshee.io[reg];
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v->fbi.clut_dirty = 1;
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}
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break;
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case io_miscInit0:
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v->banshee.io[reg] = value;
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v->fbi.yorigin = (value >> 18) & 0xfff;
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break;
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case io_miscInit0:
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v->banshee.io[reg] = value;
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v->fbi.yorigin = (value >> 18) & 0xfff;
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break;
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case io_vidScreenSize:
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v->banshee.io[reg] = value;
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width = (value & 0xfff);
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height = (value >> 12) & 0xfff;
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if ((width != v->fbi.width) || (height != v->fbi.height)) {
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v->fbi.width = width;
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v->fbi.height = height;
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}
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break;
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case io_vidScreenSize:
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v->banshee.io[reg] = value;
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v->fbi.width = (value & 0xfff);
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v->fbi.height = (value >> 12) & 0xfff;
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break;
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case io_vgaInit0:
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v->banshee.io[reg] = value;
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case io_vgaInit0:
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v->banshee.io[reg] = value;
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if (theVoodooVga != NULL) {
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theVoodooVga->banshee_set_dac_mode((v->banshee.io[reg] & 0x04) != 0);
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break;
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}
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break;
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case io_lfbMemoryConfig:
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v->banshee.io[reg] = value;
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v->fbi.lfb_base = (value & 0x1fff) << 10;
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v->fbi.lfb_stride = ((value >> 13) & 7) + 10;
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break;
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case io_lfbMemoryConfig:
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v->banshee.io[reg] = value;
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v->fbi.lfb_base = (value & 0x1fff) << 13;
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v->fbi.lfb_stride = ((value >> 13) & 7) + 10;
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break;
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case io_vgab0: case io_vgab4: case io_vgab8: case io_vgabc:
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case io_vgac0: case io_vgac4: case io_vgac8: case io_vgacc:
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case io_vgad0: case io_vgad4: case io_vgad8: case io_vgadc:
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if (theVoodooVga != NULL) {
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for (unsigned i=0; i<io_len; i++) {
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Bit8u value8 = (value >> (i*8)) & 0xff;
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theVoodooVga->banshee_write_handler(theVoodooVga, 0x300+offset+i, value8, 1);
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}
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case io_vgab0: case io_vgab4: case io_vgab8: case io_vgabc:
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case io_vgac0: case io_vgac4: case io_vgac8: case io_vgacc:
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case io_vgad0: case io_vgad4: case io_vgad8: case io_vgadc:
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if (theVoodooVga != NULL) {
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for (unsigned i=0; i<io_len; i++) {
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Bit8u value8 = (value >> (i*8)) & 0xff;
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theVoodooVga->banshee_vga_write_handler(theVoodooVga, 0x300+offset+i, value8, 1);
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}
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break;
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}
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break;
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default:
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v->banshee.io[reg] = value;
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break;
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}
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default:
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v->banshee.io[reg] = value;
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break;
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}
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}
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void bx_voodoo_c::banshee_mem_read(bx_phy_address addr, unsigned len, void *data)
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{
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Bit32u *data_ptr = (Bit32u*)data;
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Bit32u value = 0;
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Bit32u value = 0xffffffff;
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Bit32u offset = (addr & 0x1ffffff);
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if (BX_VOODOO_THIS pci_rom_size > 0) {
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Bit32u mask = (BX_VOODOO_THIS pci_rom_size - 1);
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if ((addr & ~mask) == BX_VOODOO_THIS pci_rom_address) {
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if (BX_VOODOO_THIS pci_conf[0x30] & 0x01) {
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value = 0;
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for (unsigned i = 0; i < len; i++) {
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value <<= 8;
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value |= BX_VOODOO_THIS pci_rom[(addr & mask) + i];
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}
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*data_ptr = value;
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} else {
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*data_ptr = 0xffffffff;
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}
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*data_ptr = value;
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return;
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}
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}
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Bit32u offset = (addr & 0x1ffffff);
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if ((addr & ~0x1ffffff) == BX_VOODOO_THIS pci_base_address[0]) {
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BX_INFO(("TODO: banshee mem read from offset 0x%08x", offset));
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if (offset < 0x80000) {
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value = BX_VOODOO_THIS banshee_read_handler(BX_VOODOO_THIS_PTR, offset, len);
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} else if (offset < 0x100000) {
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BX_INFO(("TODO: CMD/AGP/Misc register read from offset 0x%08x", offset));
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value = v->banshee.agp[(offset >> 2) & 0x7f];
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} else if (offset < 0x200000) {
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BX_INFO(("TODO: 2D register read from offset 0x%08x", offset));
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value = v->banshee.blt[(offset >> 2) & 0x7f];
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} else if (offset < 0x600000) {
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value = register_r((offset & 0x1fffff) >> 2);
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} else if (offset < 0xc00000) {
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BX_ERROR(("reserved read from offset 0x%08x", offset));
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} else if (offset < 0x1000000) {
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BX_INFO(("TODO: YUV planar space read from offset 0x%08x", offset));
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} else {
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Bit8u temp = v->fbi.lfb_stride;
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v->fbi.lfb_stride = 11;
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value = lfb_r((offset & 0xffffff) >> 2);
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v->fbi.lfb_stride = temp;
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}
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} else if ((addr & ~0x1ffffff) == BX_VOODOO_THIS pci_base_address[1]) {
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BX_INFO(("TODO: banshee lfb read from offset 0x%08x", offset));
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if (offset < v->fbi.lfb_base) {
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if (offset <= v->fbi.mask) {
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value = ((Bit32u *)v->fbi.ram)[offset >> 2];
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}
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} else {
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value = lfb_r((offset - v->fbi.lfb_base) >> 2);
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}
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}
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*data_ptr = value;
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}
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void bx_voodoo_c::banshee_mem_write(bx_phy_address addr, unsigned len, void *data)
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{
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Bit32u offset = (addr & 0x1ffffff);
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Bit32u value = *(Bit32u*)data;
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if ((addr & ~0x1ffffff) == BX_VOODOO_THIS pci_base_address[0]) {
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BX_INFO(("TODO: banshee mem write to offset 0x%08x", offset));
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if (offset < 0x80000) {
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BX_VOODOO_THIS banshee_write_handler(BX_VOODOO_THIS_PTR, offset, value, len);
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} else if (offset < 0x100000) {
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BX_INFO(("TODO: CMD/AGP/Misc register write to offset 0x%08x", offset));
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v->banshee.agp[(offset >> 2) & 0x7f] = value;
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} else if (offset < 0x200000) {
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BX_INFO(("TODO: 2D register write to offset 0x%08x", offset));
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v->banshee.blt[(offset >> 2) & 0x7f] = value;
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} else if (offset < 0x600000) {
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register_w_common((offset & 0x1fffff) >> 2, value);
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} else if (offset < 0x800000) {
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texture_w((offset & 0x1fffff) >> 2, value);
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} else if (offset < 0xc00000) {
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BX_ERROR(("reserved write to offset 0x%08x", offset));
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} else if (offset < 0x1000000) {
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BX_INFO(("TODO: YUV planar space write to offset 0x%08x", offset));
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} else {
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Bit8u temp = v->fbi.lfb_stride;
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v->fbi.lfb_stride = 11;
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lfb_w((offset & 0xffffff) >> 2, value, 0xffffffff);
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v->fbi.lfb_stride = temp;
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}
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} else if ((addr & ~0x1ffffff) == BX_VOODOO_THIS pci_base_address[1]) {
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BX_INFO(("TODO: banshee lfb write to offset 0x%08x", offset));
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if (offset < v->fbi.lfb_base) {
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if (v->fbi.cmdfifo[0].enabled || v->fbi.cmdfifo[1].enabled) {
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BX_INFO(("TODO: CMDFIFO write"));
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} else {
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if (offset*4 <= v->fbi.mask) {
|
||||
((Bit32u *)v->fbi.ram)[offset >> 2] = value;
|
||||
}
|
||||
}
|
||||
} else {
|
||||
lfb_w((offset - v->fbi.lfb_base) >> 2, value, 0xffffffff);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@ -1194,9 +1277,9 @@ bx_bool bx_voodoo_vga_c::init_vga_extension(void)
|
||||
if (theVoodooDevice->get_model() == VOODOO_BANSHEE) {
|
||||
BX_VVGA_THIS s.memory = v->fbi.ram;
|
||||
BX_VVGA_THIS s.memsize = v->fbi.mask + 1;
|
||||
init_iohandlers(banshee_read_handler, banshee_write_handler);
|
||||
DEV_register_iowrite_handler(this, banshee_write_handler, 0x0102, "banshee", 1);
|
||||
DEV_register_iowrite_handler(this, banshee_write_handler, 0x46e8, "banshee", 1);
|
||||
init_iohandlers(banshee_vga_read_handler, banshee_vga_write_handler);
|
||||
DEV_register_iowrite_handler(this, banshee_vga_write_handler, 0x0102, "banshee", 1);
|
||||
DEV_register_iowrite_handler(this, banshee_vga_write_handler, 0x46e8, "banshee", 1);
|
||||
BX_VVGA_THIS s.max_xres = 1280;
|
||||
BX_VVGA_THIS s.max_yres = 1024;
|
||||
BX_VVGA_THIS pci_enabled = 1;
|
||||
@ -1487,14 +1570,14 @@ void bx_voodoo_vga_c::update(void)
|
||||
}
|
||||
}
|
||||
|
||||
Bit32u bx_voodoo_vga_c::banshee_read_handler(void *this_ptr, Bit32u address, unsigned io_len)
|
||||
Bit32u bx_voodoo_vga_c::banshee_vga_read_handler(void *this_ptr, Bit32u address, unsigned io_len)
|
||||
{
|
||||
UNUSED(this_ptr);
|
||||
Bit32u value;
|
||||
|
||||
if ((io_len == 2) && ((address & 1) == 0)) {
|
||||
value = banshee_read_handler(theVoodooVga,address,1);
|
||||
value |= (banshee_read_handler(theVoodooVga,address+1,1) << 8);
|
||||
value = banshee_vga_read_handler(theVoodooVga,address,1);
|
||||
value |= (banshee_vga_read_handler(theVoodooVga,address+1,1) << 8);
|
||||
return value;
|
||||
}
|
||||
|
||||
@ -1527,13 +1610,13 @@ Bit32u bx_voodoo_vga_c::banshee_read_handler(void *this_ptr, Bit32u address, uns
|
||||
|
||||
}
|
||||
|
||||
void bx_voodoo_vga_c::banshee_write_handler(void *this_ptr, Bit32u address, Bit32u value, unsigned io_len)
|
||||
void bx_voodoo_vga_c::banshee_vga_write_handler(void *this_ptr, Bit32u address, Bit32u value, unsigned io_len)
|
||||
{
|
||||
UNUSED(this_ptr);
|
||||
|
||||
if ((io_len == 2) && ((address & 1) == 0)) {
|
||||
banshee_write_handler(theVoodooVga,address,value & 0xff,1);
|
||||
banshee_write_handler(theVoodooVga,address+1,value >> 8,1);
|
||||
banshee_vga_write_handler(theVoodooVga,address,value & 0xff,1);
|
||||
banshee_vga_write_handler(theVoodooVga,address+1,value >> 8,1);
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
@ -111,11 +111,11 @@ public:
|
||||
void banshee_update_mode(void);
|
||||
void banshee_set_dac_mode(bx_bool mode);
|
||||
|
||||
static Bit32u banshee_read_handler(void *this_ptr, Bit32u address, unsigned io_len);
|
||||
static void banshee_write_handler(void *this_ptr, Bit32u address, Bit32u value, unsigned io_len);
|
||||
static Bit32u banshee_vga_read_handler(void *this_ptr, Bit32u address, unsigned io_len);
|
||||
static void banshee_vga_write_handler(void *this_ptr, Bit32u address, Bit32u value, unsigned io_len);
|
||||
|
||||
protected:
|
||||
virtual void update(void);
|
||||
virtual void update(void);
|
||||
|
||||
private:
|
||||
struct {
|
||||
|
||||
@ -1675,12 +1675,8 @@ struct _banshee_info
|
||||
{
|
||||
Bit32u io[0x40]; /* I/O registers */
|
||||
Bit32u agp[0x80]; /* AGP registers */
|
||||
Bit8u vga[0x20]; /* VGA registers */
|
||||
Bit32u blt[0x80]; /* 2D registers */
|
||||
Bit8u crtc[0x27]; /* VGA CRTC registers */
|
||||
Bit8u seq[0x05]; /* VGA sequencer registers */
|
||||
Bit8u gc[0x05]; /* VGA graphics controller registers */
|
||||
Bit8u att[0x15]; /* VGA attribute registers */
|
||||
Bit8u attff; /* VGA attribute flip-flop */
|
||||
};
|
||||
|
||||
|
||||
|
||||
@ -3429,10 +3429,15 @@ void voodoo_init(Bit8u _type)
|
||||
v->tmu[0].reg = &v->reg[0x100];
|
||||
v->tmu[1].reg = &v->reg[0x200];
|
||||
|
||||
v->tmu[0].ram = (Bit8u*)malloc(4<<20);
|
||||
v->tmu[1].ram = (Bit8u*)malloc(4<<20);
|
||||
v->tmu[0].mask = (4<<20)-1;
|
||||
v->tmu[1].mask = (4<<20)-1;
|
||||
if (v->type < VOODOO_BANSHEE) {
|
||||
v->tmu[0].ram = (Bit8u*)malloc(4<<20);
|
||||
v->tmu[1].ram = (Bit8u*)malloc(4<<20);
|
||||
v->tmu[0].mask = (4<<20)-1;
|
||||
v->tmu[1].mask = (4<<20)-1;
|
||||
} else {
|
||||
v->tmu[0].ram = v->fbi.ram;
|
||||
v->tmu[0].mask = (16<<20)-1;
|
||||
}
|
||||
|
||||
v->tmu_config = 64;
|
||||
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user