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- host asms in a specific file

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- add msvcc host asm instructions, patch by suzu
This commit is contained in:
Christophe Bothamy 2004-02-15 17:57:45 +00:00
parent cc87172c28
commit e17995f5db
10 changed files with 777 additions and 433 deletions
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56
bochs/cpu/arith16.cc
View File

@ -1,5 +1,5 @@
///////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////////////////////////
// $Id: arith16.cc,v 1.28 2002-10-25 18:26:26 sshwarts Exp $ // $Id: arith16.cc,v 1.29 2004-02-15 17:57:43 cbothamy Exp $
///////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////////////////////////
// //
// Copyright (C) 2001 MandrakeSoft S.A. // Copyright (C) 2001 MandrakeSoft S.A.
@ -36,7 +36,7 @@
void void
BX_CPU_C::INC_RX(bxInstruction_c *i) BX_CPU_C::INC_RX(bxInstruction_c *i)
{ {
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_Inc16)
Bit32u flags32; Bit32u flags32;
asmInc16(BX_CPU_THIS_PTR gen_reg[i->opcodeReg()].word.rx, flags32); asmInc16(BX_CPU_THIS_PTR gen_reg[i->opcodeReg()].word.rx, flags32);
@ -52,7 +52,7 @@ BX_CPU_C::INC_RX(bxInstruction_c *i)
void void
BX_CPU_C::DEC_RX(bxInstruction_c *i) BX_CPU_C::DEC_RX(bxInstruction_c *i)
{ {
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_Dec16)
Bit32u flags32; Bit32u flags32;
asmDec16(BX_CPU_THIS_PTR gen_reg[i->opcodeReg()].word.rx, flags32); asmDec16(BX_CPU_THIS_PTR gen_reg[i->opcodeReg()].word.rx, flags32);
@ -99,7 +99,7 @@ BX_CPU_C::ADD_GwEEw(bxInstruction_c *i)
read_virtual_word(i->seg(), RMAddr(i), &op2_16); read_virtual_word(i->seg(), RMAddr(i), &op2_16);
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_Add16)
Bit32u flags32; Bit32u flags32;
asmAdd16(sum_16, op1_16, op2_16, flags32); asmAdd16(sum_16, op1_16, op2_16, flags32);
@ -110,7 +110,7 @@ BX_CPU_C::ADD_GwEEw(bxInstruction_c *i)
BX_WRITE_16BIT_REG(nnn, sum_16); BX_WRITE_16BIT_REG(nnn, sum_16);
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if !defined(BX_HostAsm_Add16)
SET_FLAGS_OSZAPC_16(op1_16, op2_16, sum_16, BX_INSTR_ADD16); SET_FLAGS_OSZAPC_16(op1_16, op2_16, sum_16, BX_INSTR_ADD16);
#endif #endif
} }
@ -124,7 +124,7 @@ BX_CPU_C::ADD_GwEGw(bxInstruction_c *i)
op1_16 = BX_READ_16BIT_REG(nnn); op1_16 = BX_READ_16BIT_REG(nnn);
op2_16 = BX_READ_16BIT_REG(i->rm()); op2_16 = BX_READ_16BIT_REG(i->rm());
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_Add16)
Bit32u flags32; Bit32u flags32;
asmAdd16(sum_16, op1_16, op2_16, flags32); asmAdd16(sum_16, op1_16, op2_16, flags32);
@ -135,7 +135,7 @@ BX_CPU_C::ADD_GwEGw(bxInstruction_c *i)
BX_WRITE_16BIT_REG(nnn, sum_16); BX_WRITE_16BIT_REG(nnn, sum_16);
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if !defined(BX_HostAsm_Add16)
SET_FLAGS_OSZAPC_16(op1_16, op2_16, sum_16, BX_INSTR_ADD16); SET_FLAGS_OSZAPC_16(op1_16, op2_16, sum_16, BX_INSTR_ADD16);
#endif #endif
} }
@ -340,7 +340,7 @@ BX_CPU_C::SUB_EwGw(bxInstruction_c *i)
if (i->modC0()) { if (i->modC0()) {
op1_16 = BX_READ_16BIT_REG(i->rm()); op1_16 = BX_READ_16BIT_REG(i->rm());
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_Sub16)
Bit32u flags32; Bit32u flags32;
asmSub16(diff_16, op1_16, op2_16, flags32); asmSub16(diff_16, op1_16, op2_16, flags32);
@ -352,7 +352,7 @@ BX_CPU_C::SUB_EwGw(bxInstruction_c *i)
} }
else { else {
read_RMW_virtual_word(i->seg(), RMAddr(i), &op1_16); read_RMW_virtual_word(i->seg(), RMAddr(i), &op1_16);
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_Sub16)
Bit32u flags32; Bit32u flags32;
asmSub16(diff_16, op1_16, op2_16, flags32); asmSub16(diff_16, op1_16, op2_16, flags32);
@ -363,7 +363,7 @@ BX_CPU_C::SUB_EwGw(bxInstruction_c *i)
Write_RMW_virtual_word(diff_16); Write_RMW_virtual_word(diff_16);
} }
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if !defined(BX_HostAsm_Sub16)
SET_FLAGS_OSZAPC_16(op1_16, op2_16, diff_16, BX_INSTR_SUB16); SET_FLAGS_OSZAPC_16(op1_16, op2_16, diff_16, BX_INSTR_SUB16);
#endif #endif
} }
@ -384,7 +384,7 @@ BX_CPU_C::SUB_GwEw(bxInstruction_c *i)
read_virtual_word(i->seg(), RMAddr(i), &op2_16); read_virtual_word(i->seg(), RMAddr(i), &op2_16);
} }
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_Sub16)
Bit32u flags32; Bit32u flags32;
asmSub16(diff_16, op1_16, op2_16, flags32); asmSub16(diff_16, op1_16, op2_16, flags32);
@ -395,7 +395,7 @@ BX_CPU_C::SUB_GwEw(bxInstruction_c *i)
BX_WRITE_16BIT_REG(nnn, diff_16); BX_WRITE_16BIT_REG(nnn, diff_16);
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if !defined(BX_HostAsm_Sub16)
SET_FLAGS_OSZAPC_16(op1_16, op2_16, diff_16, BX_INSTR_SUB16); SET_FLAGS_OSZAPC_16(op1_16, op2_16, diff_16, BX_INSTR_SUB16);
#endif #endif
} }
@ -408,7 +408,7 @@ BX_CPU_C::SUB_AXIw(bxInstruction_c *i)
op1_16 = AX; op1_16 = AX;
op2_16 = i->Iw(); op2_16 = i->Iw();
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_Sub16)
Bit32u flags32; Bit32u flags32;
asmSub16(diff_16, op1_16, op2_16, flags32); asmSub16(diff_16, op1_16, op2_16, flags32);
@ -419,7 +419,7 @@ BX_CPU_C::SUB_AXIw(bxInstruction_c *i)
AX = diff_16; AX = diff_16;
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if !defined(BX_HostAsm_Sub16)
SET_FLAGS_OSZAPC_16(op1_16, op2_16, diff_16, BX_INSTR_SUB16); SET_FLAGS_OSZAPC_16(op1_16, op2_16, diff_16, BX_INSTR_SUB16);
#endif #endif
} }
@ -439,7 +439,7 @@ BX_CPU_C::CMP_EwGw(bxInstruction_c *i)
read_virtual_word(i->seg(), RMAddr(i), &op1_16); read_virtual_word(i->seg(), RMAddr(i), &op1_16);
} }
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_Cmp16)
Bit32u flags32; Bit32u flags32;
asmCmp16(op1_16, op2_16, flags32); asmCmp16(op1_16, op2_16, flags32);
@ -467,7 +467,7 @@ BX_CPU_C::CMP_GwEw(bxInstruction_c *i)
read_virtual_word(i->seg(), RMAddr(i), &op2_16); read_virtual_word(i->seg(), RMAddr(i), &op2_16);
} }
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_Cmp16)
Bit32u flags32; Bit32u flags32;
asmCmp16(op1_16, op2_16, flags32); asmCmp16(op1_16, op2_16, flags32);
@ -489,7 +489,7 @@ BX_CPU_C::CMP_AXIw(bxInstruction_c *i)
op1_16 = AX; op1_16 = AX;
op2_16 = i->Iw(); op2_16 = i->Iw();
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_Cmp16)
Bit32u flags32; Bit32u flags32;
asmCmp16(op1_16, op2_16, flags32); asmCmp16(op1_16, op2_16, flags32);
@ -575,7 +575,7 @@ BX_CPU_C::ADD_EEwIw(bxInstruction_c *i)
read_RMW_virtual_word(i->seg(), RMAddr(i), &op1_16); read_RMW_virtual_word(i->seg(), RMAddr(i), &op1_16);
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_Add16)
Bit32u flags32; Bit32u flags32;
asmAdd16(sum_16, op1_16, op2_16, flags32); asmAdd16(sum_16, op1_16, op2_16, flags32);
@ -585,7 +585,7 @@ BX_CPU_C::ADD_EEwIw(bxInstruction_c *i)
#endif #endif
Write_RMW_virtual_word(sum_16); Write_RMW_virtual_word(sum_16);
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if !defined(BX_HostAsm_Add16)
SET_FLAGS_OSZAPC_16(op1_16, op2_16, sum_16, BX_INSTR_ADD16); SET_FLAGS_OSZAPC_16(op1_16, op2_16, sum_16, BX_INSTR_ADD16);
#endif #endif
} }
@ -599,7 +599,7 @@ BX_CPU_C::ADD_EGwIw(bxInstruction_c *i)
op1_16 = BX_READ_16BIT_REG(i->rm()); op1_16 = BX_READ_16BIT_REG(i->rm());
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_Add16)
Bit32u flags32; Bit32u flags32;
asmAdd16(sum_16, op1_16, op2_16, flags32); asmAdd16(sum_16, op1_16, op2_16, flags32);
@ -609,7 +609,7 @@ BX_CPU_C::ADD_EGwIw(bxInstruction_c *i)
#endif #endif
BX_WRITE_16BIT_REG(i->rm(), sum_16); BX_WRITE_16BIT_REG(i->rm(), sum_16);
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if !defined(BX_HostAsm_Add16)
SET_FLAGS_OSZAPC_16(op1_16, op2_16, sum_16, BX_INSTR_ADD16); SET_FLAGS_OSZAPC_16(op1_16, op2_16, sum_16, BX_INSTR_ADD16);
#endif #endif
} }
@ -650,7 +650,7 @@ BX_CPU_C::SUB_EwIw(bxInstruction_c *i)
if (i->modC0()) { if (i->modC0()) {
op1_16 = BX_READ_16BIT_REG(i->rm()); op1_16 = BX_READ_16BIT_REG(i->rm());
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_Sub16)
Bit32u flags32; Bit32u flags32;
asmSub16(diff_16, op1_16, op2_16, flags32); asmSub16(diff_16, op1_16, op2_16, flags32);
@ -662,7 +662,7 @@ BX_CPU_C::SUB_EwIw(bxInstruction_c *i)
} }
else { else {
read_RMW_virtual_word(i->seg(), RMAddr(i), &op1_16); read_RMW_virtual_word(i->seg(), RMAddr(i), &op1_16);
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_Sub16)
Bit32u flags32; Bit32u flags32;
asmSub16(diff_16, op1_16, op2_16, flags32); asmSub16(diff_16, op1_16, op2_16, flags32);
@ -673,7 +673,7 @@ BX_CPU_C::SUB_EwIw(bxInstruction_c *i)
Write_RMW_virtual_word(diff_16); Write_RMW_virtual_word(diff_16);
} }
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if !defined(BX_HostAsm_Sub16)
SET_FLAGS_OSZAPC_16(op1_16, op2_16, diff_16, BX_INSTR_SUB16); SET_FLAGS_OSZAPC_16(op1_16, op2_16, diff_16, BX_INSTR_SUB16);
#endif #endif
} }
@ -692,7 +692,7 @@ BX_CPU_C::CMP_EwIw(bxInstruction_c *i)
read_virtual_word(i->seg(), RMAddr(i), &op1_16); read_virtual_word(i->seg(), RMAddr(i), &op1_16);
} }
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_Cmp16)
Bit32u flags32; Bit32u flags32;
asmCmp16(op1_16, op2_16, flags32); asmCmp16(op1_16, op2_16, flags32);
@ -754,7 +754,7 @@ BX_CPU_C::DEC_Ew(bxInstruction_c *i)
Bit16u op1_16; Bit16u op1_16;
if (i->modC0()) { if (i->modC0()) {
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_Dec16)
Bit32u flags32; Bit32u flags32;
asmDec16(BX_CPU_THIS_PTR gen_reg[i->rm()].word.rx, flags32); asmDec16(BX_CPU_THIS_PTR gen_reg[i->rm()].word.rx, flags32);
@ -767,7 +767,7 @@ BX_CPU_C::DEC_Ew(bxInstruction_c *i)
} }
else { else {
read_RMW_virtual_word(i->seg(), RMAddr(i), &op1_16); read_RMW_virtual_word(i->seg(), RMAddr(i), &op1_16);
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_Dec16)
Bit32u flags32; Bit32u flags32;
asmDec16(op1_16, flags32); asmDec16(op1_16, flags32);
@ -778,7 +778,7 @@ BX_CPU_C::DEC_Ew(bxInstruction_c *i)
Write_RMW_virtual_word(op1_16); Write_RMW_virtual_word(op1_16);
} }
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if !defined(BX_HostAsm_Dec16)
SET_FLAGS_OSZAP_16(0, 0, op1_16, BX_INSTR_DEC16); SET_FLAGS_OSZAP_16(0, 0, op1_16, BX_INSTR_DEC16);
#endif #endif
} }

38
bochs/cpu/arith32.cc
View File

@ -1,5 +1,5 @@
///////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////////////////////////
// $Id: arith32.cc,v 1.31 2003-04-05 12:16:48 sshwarts Exp $ // $Id: arith32.cc,v 1.32 2004-02-15 17:57:43 cbothamy Exp $
///////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////////////////////////
// //
// Copyright (C) 2001 MandrakeSoft S.A. // Copyright (C) 2001 MandrakeSoft S.A.
@ -43,7 +43,7 @@
void void
BX_CPU_C::INC_ERX(bxInstruction_c *i) BX_CPU_C::INC_ERX(bxInstruction_c *i)
{ {
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_Inc32)
Bit32u flags32; Bit32u flags32;
asmInc32(BX_CPU_THIS_PTR gen_reg[i->opcodeReg()].dword.erx, flags32); asmInc32(BX_CPU_THIS_PTR gen_reg[i->opcodeReg()].dword.erx, flags32);
@ -58,7 +58,7 @@ BX_CPU_C::INC_ERX(bxInstruction_c *i)
BX_CPU_THIS_PTR gen_reg[i->opcodeReg()].dword.hrx = 0; BX_CPU_THIS_PTR gen_reg[i->opcodeReg()].dword.hrx = 0;
#endif #endif
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if !defined(BX_HostAsm_Inc32)
SET_FLAGS_OSZAP_32(0, 0, erx, BX_INSTR_INC32); SET_FLAGS_OSZAP_32(0, 0, erx, BX_INSTR_INC32);
#endif #endif
} }
@ -66,7 +66,7 @@ BX_CPU_C::INC_ERX(bxInstruction_c *i)
void void
BX_CPU_C::DEC_ERX(bxInstruction_c *i) BX_CPU_C::DEC_ERX(bxInstruction_c *i)
{ {
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_Dec32)
Bit32u flags32; Bit32u flags32;
asmDec32(BX_CPU_THIS_PTR gen_reg[i->opcodeReg()].dword.erx, flags32); asmDec32(BX_CPU_THIS_PTR gen_reg[i->opcodeReg()].dword.erx, flags32);
@ -81,7 +81,7 @@ BX_CPU_C::DEC_ERX(bxInstruction_c *i)
BX_CPU_THIS_PTR gen_reg[i->opcodeReg()].dword.hrx = 0; BX_CPU_THIS_PTR gen_reg[i->opcodeReg()].dword.hrx = 0;
#endif #endif
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if !defined(BX_HostAsm_Dec32)
SET_FLAGS_OSZAP_32(0, 0, erx, BX_INSTR_DEC32); SET_FLAGS_OSZAP_32(0, 0, erx, BX_INSTR_DEC32);
#endif #endif
} }
@ -121,7 +121,7 @@ BX_CPU_C::ADD_GdEEd(bxInstruction_c *i)
read_virtual_dword(i->seg(), RMAddr(i), &op2_32); read_virtual_dword(i->seg(), RMAddr(i), &op2_32);
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_Add32)
Bit32u flags32; Bit32u flags32;
asmAdd32(sum_32, op1_32, op2_32, flags32); asmAdd32(sum_32, op1_32, op2_32, flags32);
@ -132,7 +132,7 @@ BX_CPU_C::ADD_GdEEd(bxInstruction_c *i)
BX_WRITE_32BIT_REGZ(nnn, sum_32); BX_WRITE_32BIT_REGZ(nnn, sum_32);
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if !defined(BX_HostAsm_Add32)
SET_FLAGS_OSZAPC_32(op1_32, op2_32, sum_32, BX_INSTR_ADD32); SET_FLAGS_OSZAPC_32(op1_32, op2_32, sum_32, BX_INSTR_ADD32);
#endif #endif
} }
@ -146,7 +146,7 @@ BX_CPU_C::ADD_GdEGd(bxInstruction_c *i)
op1_32 = BX_READ_32BIT_REG(nnn); op1_32 = BX_READ_32BIT_REG(nnn);
op2_32 = BX_READ_32BIT_REG(i->rm()); op2_32 = BX_READ_32BIT_REG(i->rm());
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_Add32)
Bit32u flags32; Bit32u flags32;
asmAdd32(sum_32, op1_32, op2_32, flags32); asmAdd32(sum_32, op1_32, op2_32, flags32);
@ -157,7 +157,7 @@ BX_CPU_C::ADD_GdEGd(bxInstruction_c *i)
BX_WRITE_32BIT_REGZ(nnn, sum_32); BX_WRITE_32BIT_REGZ(nnn, sum_32);
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if !defined(BX_HostAsm_Add32)
SET_FLAGS_OSZAPC_32(op1_32, op2_32, sum_32, BX_INSTR_ADD32); SET_FLAGS_OSZAPC_32(op1_32, op2_32, sum_32, BX_INSTR_ADD32);
#endif #endif
} }
@ -395,7 +395,7 @@ BX_CPU_C::SUB_GdEd(bxInstruction_c *i)
read_virtual_dword(i->seg(), RMAddr(i), &op2_32); read_virtual_dword(i->seg(), RMAddr(i), &op2_32);
} }
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_Sub32)
Bit32u flags32; Bit32u flags32;
asmSub32(diff_32, op1_32, op2_32, flags32); asmSub32(diff_32, op1_32, op2_32, flags32);
@ -406,7 +406,7 @@ BX_CPU_C::SUB_GdEd(bxInstruction_c *i)
BX_WRITE_32BIT_REGZ(nnn, diff_32); BX_WRITE_32BIT_REGZ(nnn, diff_32);
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if !defined(BX_HostAsm_Sub32)
SET_FLAGS_OSZAPC_32(op1_32, op2_32, diff_32, BX_INSTR_SUB32); SET_FLAGS_OSZAPC_32(op1_32, op2_32, diff_32, BX_INSTR_SUB32);
#endif #endif
} }
@ -441,7 +441,7 @@ BX_CPU_C::CMP_EdGd(bxInstruction_c *i)
read_virtual_dword(i->seg(), RMAddr(i), &op1_32); read_virtual_dword(i->seg(), RMAddr(i), &op1_32);
} }
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_Cmp32)
Bit32u flags32; Bit32u flags32;
asmCmp32(op1_32, op2_32, flags32); asmCmp32(op1_32, op2_32, flags32);
@ -469,7 +469,7 @@ BX_CPU_C::CMP_GdEd(bxInstruction_c *i)
read_virtual_dword(i->seg(), RMAddr(i), &op2_32); read_virtual_dword(i->seg(), RMAddr(i), &op2_32);
} }
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_Cmp32)
Bit32u flags32; Bit32u flags32;
asmCmp32(op1_32, op2_32, flags32); asmCmp32(op1_32, op2_32, flags32);
@ -491,7 +491,7 @@ BX_CPU_C::CMP_EAXId(bxInstruction_c *i)
op1_32 = EAX; op1_32 = EAX;
op2_32 = i->Id(); op2_32 = i->Id();
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_Cmp32)
Bit32u flags32; Bit32u flags32;
asmCmp32(op1_32, op2_32, flags32); asmCmp32(op1_32, op2_32, flags32);
@ -607,7 +607,7 @@ BX_CPU_C::ADD_EEdId(bxInstruction_c *i)
read_RMW_virtual_dword(i->seg(), RMAddr(i), &op1_32); read_RMW_virtual_dword(i->seg(), RMAddr(i), &op1_32);
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_Add32)
Bit32u flags32; Bit32u flags32;
asmAdd32(sum_32, op1_32, op2_32, flags32); asmAdd32(sum_32, op1_32, op2_32, flags32);
@ -618,7 +618,7 @@ BX_CPU_C::ADD_EEdId(bxInstruction_c *i)
Write_RMW_virtual_dword(sum_32); Write_RMW_virtual_dword(sum_32);
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if !defined(BX_HostAsm_Add32)
SET_FLAGS_OSZAPC_32(op1_32, op2_32, sum_32, BX_INSTR_ADD32); SET_FLAGS_OSZAPC_32(op1_32, op2_32, sum_32, BX_INSTR_ADD32);
#endif #endif
} }
@ -631,7 +631,7 @@ BX_CPU_C::ADD_EGdId(bxInstruction_c *i)
op2_32 = i->Id(); op2_32 = i->Id();
op1_32 = BX_READ_32BIT_REG(i->rm()); op1_32 = BX_READ_32BIT_REG(i->rm());
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_Add32)
Bit32u flags32; Bit32u flags32;
asmAdd32(sum_32, op1_32, op2_32, flags32); asmAdd32(sum_32, op1_32, op2_32, flags32);
@ -642,7 +642,7 @@ BX_CPU_C::ADD_EGdId(bxInstruction_c *i)
BX_WRITE_32BIT_REGZ(i->rm(), sum_32); BX_WRITE_32BIT_REGZ(i->rm(), sum_32);
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if !defined(BX_HostAsm_Add32)
SET_FLAGS_OSZAPC_32(op1_32, op2_32, sum_32, BX_INSTR_ADD32); SET_FLAGS_OSZAPC_32(op1_32, op2_32, sum_32, BX_INSTR_ADD32);
#endif #endif
} }
@ -709,7 +709,7 @@ BX_CPU_C::CMP_EdId(bxInstruction_c *i)
read_virtual_dword(i->seg(), RMAddr(i), &op1_32); read_virtual_dword(i->seg(), RMAddr(i), &op1_32);
} }
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_Cmp32)
Bit32u flags32; Bit32u flags32;
asmCmp32(op1_32, op2_32, flags32); asmCmp32(op1_32, op2_32, flags32);

10
bochs/cpu/arith8.cc
View File

@ -1,5 +1,5 @@
///////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////////////////////////
// $Id: arith8.cc,v 1.24 2002-10-25 18:26:27 sshwarts Exp $ // $Id: arith8.cc,v 1.25 2004-02-15 17:57:43 cbothamy Exp $
///////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////////////////////////
// //
// Copyright (C) 2001 MandrakeSoft S.A. // Copyright (C) 2001 MandrakeSoft S.A.
@ -345,7 +345,7 @@ BX_CPU_C::CMP_EbGb(bxInstruction_c *i)
read_virtual_byte(i->seg(), RMAddr(i), &op1_8); read_virtual_byte(i->seg(), RMAddr(i), &op1_8);
} }
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_Cmp8)
Bit32u flags32; Bit32u flags32;
asmCmp8(op1_8, op2_8, flags32); asmCmp8(op1_8, op2_8, flags32);
@ -373,7 +373,7 @@ BX_CPU_C::CMP_GbEb(bxInstruction_c *i)
read_virtual_byte(i->seg(), RMAddr(i), &op2_8); read_virtual_byte(i->seg(), RMAddr(i), &op2_8);
} }
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_Cmp8)
Bit32u flags32; Bit32u flags32;
asmCmp8(op1_8, op2_8, flags32); asmCmp8(op1_8, op2_8, flags32);
@ -397,7 +397,7 @@ BX_CPU_C::CMP_ALIb(bxInstruction_c *i)
op2_8 = i->Ib(); op2_8 = i->Ib();
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_Cmp8)
Bit32u flags32; Bit32u flags32;
asmCmp8(op1_8, op2_8, flags32); asmCmp8(op1_8, op2_8, flags32);
@ -533,7 +533,7 @@ BX_CPU_C::CMP_EbIb(bxInstruction_c *i)
read_virtual_byte(i->seg(), RMAddr(i), &op1_8); read_virtual_byte(i->seg(), RMAddr(i), &op1_8);
} }
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_Cmp8)
Bit32u flags32; Bit32u flags32;
asmCmp8(op1_8, op2_8, flags32); asmCmp8(op1_8, op2_8, flags32);

324
bochs/cpu/cpu.h
View File

@ -1,5 +1,5 @@
///////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////////////////////////
// $Id: cpu.h,v 1.159 2004-02-11 23:47:55 cbothamy Exp $ // $Id: cpu.h,v 1.160 2004-02-15 17:57:44 cbothamy Exp $
///////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////////////////////////
// //
// Copyright (C) 2001 MandrakeSoft S.A. // Copyright (C) 2001 MandrakeSoft S.A.
@ -31,6 +31,7 @@
#include <setjmp.h> #include <setjmp.h>
#include "cpu/lazy_flags.h" #include "cpu/lazy_flags.h"
#include "cpu/hostasm.h"
// segment register encoding // segment register encoding
#define BX_SEG_REG_ES 0 #define BX_SEG_REG_ES 0
@ -3336,326 +3337,5 @@ typedef enum _show_flags {
BX_CPU_THIS_PTR lf_flags_status &= 0x00000f; \ BX_CPU_THIS_PTR lf_flags_status &= 0x00000f; \
} }
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
// This section defines some convience inline functions which do the
// dirty work of asm() statements for arithmetic instructions on x86 hosts.
// Essentially these speed up eflags processing since the value of the
// eflags register can be read directly on x86 hosts, after the
// arithmetic operations.
static inline void
asmAdd16(Bit16u &sum_16, Bit16u op1_16, Bit16u op2_16, Bit32u &flags32)
{
asm (
"addw %3, %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (sum_16)
: "1" (op1_16), "g" (op2_16)
: "cc"
);
}
static inline void
asmAdd32(Bit32u &sum_32, Bit32u op1_32, Bit32u op2_32, Bit32u &flags32)
{
asm (
"addl %3, %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (sum_32)
: "1" (op1_32), "g" (op2_32)
: "cc"
);
}
static inline void
asmSub16(Bit16u &diff_16, Bit16u op1_16, Bit16u op2_16, Bit32u &flags32)
{
asm (
"subw %3, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (diff_16)
: "1" (op1_16), "g" (op2_16)
: "cc"
);
}
static inline void
asmSub32(Bit32u &diff_32, Bit32u op1_32, Bit32u op2_32, Bit32u &flags32)
{
asm (
"subl %3, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (diff_32)
: "1" (op1_32), "g" (op2_32)
: "cc"
);
}
static inline void
asmCmp8(Bit8u op1_8, Bit8u op2_8, Bit32u &flags32)
{
asm (
"cmpb %2, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32)
: "q" (op1_8), "mq" (op2_8)
: "cc"
);
}
static inline void
asmCmp16(Bit16u op1_16, Bit16u op2_16, Bit32u &flags32)
{
asm (
"cmpw %2, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32)
: "r" (op1_16), "g" (op2_16)
: "cc"
);
}
static inline void
asmCmp32(Bit32u op1_32, Bit32u op2_32, Bit32u &flags32)
{
asm (
"cmpl %2, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32)
: "r" (op1_32), "g" (op2_32)
: "cc"
);
}
static inline void
asmInc16(Bit16u &op1_16, Bit32u &flags32)
{
asm (
"incw %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=g" (op1_16)
: "1" (op1_16)
: "cc"
);
}
static inline void
asmInc32(Bit32u &op1_32, Bit32u &flags32)
{
asm (
"incl %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=g" (op1_32)
: "1" (op1_32)
: "cc"
);
}
static inline void
asmDec16(Bit16u &op1_16, Bit32u &flags32)
{
asm (
"decw %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=g" (op1_16)
: "1" (op1_16)
: "cc"
);
}
static inline void
asmDec32(Bit32u &op1_32, Bit32u &flags32)
{
asm (
"decl %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=g" (op1_32)
: "1" (op1_32)
: "cc"
);
}
static inline void
asmXor16(Bit16u &result_16, Bit16u op1_16, Bit16u op2_16, Bit32u &flags32)
{
asm (
"xorw %3, %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (result_16)
: "1" (op1_16), "g" (op2_16)
: "cc"
);
}
static inline void
asmXor32(Bit32u &result_32, Bit32u op1_32, Bit32u op2_32, Bit32u &flags32)
{
asm (
"xorl %3, %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (result_32)
: "1" (op1_32), "g" (op2_32)
: "cc"
);
}
static inline void
asmOr8(Bit8u &result_8, Bit8u op1_8, Bit8u op2_8, Bit32u &flags32)
{
asm (
"orb %3, %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=q" (result_8)
: "1" (op1_8), "mq" (op2_8)
: "cc"
);
}
static inline void
asmOr16(Bit16u &result_16, Bit16u op1_16, Bit16u op2_16, Bit32u &flags32)
{
asm (
"orw %3, %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (result_16)
: "1" (op1_16), "g" (op2_16)
: "cc"
);
}
static inline void
asmOr32(Bit32u &result_32, Bit32u op1_32, Bit32u op2_32, Bit32u &flags32)
{
asm (
"orl %3, %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (result_32)
: "1" (op1_32), "g" (op2_32)
: "cc"
);
}
static inline void
asmAnd8(Bit8u &result_8, Bit8u op1_8, Bit8u op2_8, Bit32u &flags32)
{
asm (
"andb %3, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=q" (result_8)
: "1" (op1_8), "mq" (op2_8)
: "cc"
);
}
static inline void
asmAnd16(Bit16u &result_16, Bit16u op1_16, Bit16u op2_16, Bit32u &flags32)
{
asm (
"andw %3, %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (result_16)
: "1" (op1_16), "g" (op2_16)
: "cc"
);
}
static inline void
asmAnd32(Bit32u &result_32, Bit32u op1_32, Bit32u op2_32, Bit32u &flags32)
{
asm (
"andl %3, %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (result_32)
: "1" (op1_32), "g" (op2_32)
: "cc"
);
}
static inline void
asmTest8(Bit8u op1_8, Bit8u op2_8, Bit32u &flags32)
{
asm (
"testb %2, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32)
: "q" (op1_8), "mq" (op2_8)
: "cc"
);
}
static inline void
asmTest16(Bit16u op1_16, Bit16u op2_16, Bit32u &flags32)
{
asm (
"testw %2, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32)
: "r" (op1_16), "g" (op2_16)
: "cc"
);
}
static inline void
asmTest32(Bit32u op1_32, Bit32u op2_32, Bit32u &flags32)
{
asm (
"testl %2, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32)
: "r" (op1_32), "g" (op2_32)
: "cc"
);
}
static inline void
asmShr16(Bit16u &result_16, Bit16u op1_16, unsigned count, Bit32u &flags32)
{
asm (
"shrw %%cl, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=g" (result_16)
: "1" (op1_16), "c" (count)
: "cc"
);
}
static inline void
asmShr32(Bit32u &result_32, Bit32u op1_32, unsigned count, Bit32u &flags32)
{
asm (
"shrl %%cl, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=g" (result_32)
: "1" (op1_32), "c" (count)
: "cc"
);
}
#endif
#endif // #ifndef BX_CPU_H #endif // #ifndef BX_CPU_H

664
bochs/cpu/hostasm.h Normal file
View File

@ -0,0 +1,664 @@
/////////////////////////////////////////////////////////////////////////
// $Id: hostasm.h,v 1.1 2004-02-15 17:57:44 cbothamy Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
//
// MandrakeSoft S.A.
// 43, rue d'Aboukir
// 75002 Paris - France
// http://www.linux-mandrake.com/
// http://www.mandrakesoft.com/
//
// This library is free software; you can redistribute it and/or
// modify it under the terms of the GNU Lesser General Public
// License as published by the Free Software Foundation; either
// version 2 of the License, or (at your option) any later version.
//
// This library is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
// Lesser General Public License for more details.
//
// You should have received a copy of the GNU Lesser General Public
// License along with this library; if not, write to the Free Software
// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
#ifndef BX_HOSTASM_H
# define BX_HOSTASM_H 1
// This file defines some convience inline functions which do the
// dirty work of asm() statements for arithmetic instructions on x86 hosts.
// Essentially these speed up eflags processing since the value of the
// eflags register can be read directly on x86 hosts, after the
// arithmetic operations.
// gcc on i386
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
#define BX_HostAsm_Add16
static inline void
asmAdd16(Bit16u &sum_16, Bit16u op1_16, Bit16u op2_16, Bit32u &flags32)
{
asm (
"addw %3, %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (sum_16)
: "1" (op1_16), "g" (op2_16)
: "cc"
);
}
#define BX_HostAsm_Add32
static inline void
asmAdd32(Bit32u &sum_32, Bit32u op1_32, Bit32u op2_32, Bit32u &flags32)
{
asm (
"addl %3, %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (sum_32)
: "1" (op1_32), "g" (op2_32)
: "cc"
);
}
#define BX_HostAsm_Sub16
static inline void
asmSub16(Bit16u &diff_16, Bit16u op1_16, Bit16u op2_16, Bit32u &flags32)
{
asm (
"subw %3, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (diff_16)
: "1" (op1_16), "g" (op2_16)
: "cc"
);
}
#define BX_HostAsm_Sub32
static inline void
asmSub32(Bit32u &diff_32, Bit32u op1_32, Bit32u op2_32, Bit32u &flags32)
{
asm (
"subl %3, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (diff_32)
: "1" (op1_32), "g" (op2_32)
: "cc"
);
}
#define BX_HostAsm_Cmp8
static inline void
asmCmp8(Bit8u op1_8, Bit8u op2_8, Bit32u &flags32)
{
asm (
"cmpb %2, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32)
: "q" (op1_8), "mq" (op2_8)
: "cc"
);
}
#define BX_HostAsm_Cmp16
static inline void
asmCmp16(Bit16u op1_16, Bit16u op2_16, Bit32u &flags32)
{
asm (
"cmpw %2, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32)
: "r" (op1_16), "g" (op2_16)
: "cc"
);
}
#define BX_HostAsm_Cmp32
static inline void
asmCmp32(Bit32u op1_32, Bit32u op2_32, Bit32u &flags32)
{
asm (
"cmpl %2, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32)
: "r" (op1_32), "g" (op2_32)
: "cc"
);
}
#define BX_HostAsm_Inc16
static inline void
asmInc16(Bit16u &op1_16, Bit32u &flags32)
{
asm (
"incw %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=g" (op1_16)
: "1" (op1_16)
: "cc"
);
}
#define BX_HostAsm_Inc32
static inline void
asmInc32(Bit32u &op1_32, Bit32u &flags32)
{
asm (
"incl %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=g" (op1_32)
: "1" (op1_32)
: "cc"
);
}
#define BX_HostAsm_Dec16
static inline void
asmDec16(Bit16u &op1_16, Bit32u &flags32)
{
asm (
"decw %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=g" (op1_16)
: "1" (op1_16)
: "cc"
);
}
#define BX_HostAsm_Dec32
static inline void
asmDec32(Bit32u &op1_32, Bit32u &flags32)
{
asm (
"decl %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=g" (op1_32)
: "1" (op1_32)
: "cc"
);
}
#define BX_HostAsm_Xor16
static inline void
asmXor16(Bit16u &result_16, Bit16u op1_16, Bit16u op2_16, Bit32u &flags32)
{
asm (
"xorw %3, %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (result_16)
: "1" (op1_16), "g" (op2_16)
: "cc"
);
}
#define BX_HostAsm_Xor32
static inline void
asmXor32(Bit32u &result_32, Bit32u op1_32, Bit32u op2_32, Bit32u &flags32)
{
asm (
"xorl %3, %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (result_32)
: "1" (op1_32), "g" (op2_32)
: "cc"
);
}
#define BX_HostAsm_Or8
static inline void
asmOr8(Bit8u &result_8, Bit8u op1_8, Bit8u op2_8, Bit32u &flags32)
{
asm (
"orb %3, %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=q" (result_8)
: "1" (op1_8), "mq" (op2_8)
: "cc"
);
}
#define BX_HostAsm_Or16
static inline void
asmOr16(Bit16u &result_16, Bit16u op1_16, Bit16u op2_16, Bit32u &flags32)
{
asm (
"orw %3, %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (result_16)
: "1" (op1_16), "g" (op2_16)
: "cc"
);
}
#define BX_HostAsm_Or32
static inline void
asmOr32(Bit32u &result_32, Bit32u op1_32, Bit32u op2_32, Bit32u &flags32)
{
asm (
"orl %3, %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (result_32)
: "1" (op1_32), "g" (op2_32)
: "cc"
);
}
#define BX_HostAsm_And8
static inline void
asmAnd8(Bit8u &result_8, Bit8u op1_8, Bit8u op2_8, Bit32u &flags32)
{
asm (
"andb %3, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=q" (result_8)
: "1" (op1_8), "mq" (op2_8)
: "cc"
);
}
#define BX_HostAsm_And16
static inline void
asmAnd16(Bit16u &result_16, Bit16u op1_16, Bit16u op2_16, Bit32u &flags32)
{
asm (
"andw %3, %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (result_16)
: "1" (op1_16), "g" (op2_16)
: "cc"
);
}
#define BX_HostAsm_And32
static inline void
asmAnd32(Bit32u &result_32, Bit32u op1_32, Bit32u op2_32, Bit32u &flags32)
{
asm (
"andl %3, %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (result_32)
: "1" (op1_32), "g" (op2_32)
: "cc"
);
}
#define BX_HostAsm_Test8
static inline void
asmTest8(Bit8u op1_8, Bit8u op2_8, Bit32u &flags32)
{
asm (
"testb %2, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32)
: "q" (op1_8), "mq" (op2_8)
: "cc"
);
}
#define BX_HostAsm_Test16
static inline void
asmTest16(Bit16u op1_16, Bit16u op2_16, Bit32u &flags32)
{
asm (
"testw %2, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32)
: "r" (op1_16), "g" (op2_16)
: "cc"
);
}
#define BX_HostAsm_Test32
static inline void
asmTest32(Bit32u op1_32, Bit32u op2_32, Bit32u &flags32)
{
asm (
"testl %2, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32)
: "r" (op1_32), "g" (op2_32)
: "cc"
);
}
#define BX_HostAsm_Shr16
static inline void
asmShr16(Bit16u &result_16, Bit16u op1_16, unsigned count, Bit32u &flags32)
{
asm (
"shrw %%cl, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=g" (result_16)
: "1" (op1_16), "c" (count)
: "cc"
);
}
#define BX_HostAsm_Shr32
static inline void
asmShr32(Bit32u &result_32, Bit32u op1_32, unsigned count, Bit32u &flags32)
{
asm (
"shrl %%cl, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=g" (result_32)
: "1" (op1_32), "c" (count)
: "cc"
);
}
#endif // (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
// msvc++ on i386
#if (defined(_M_IX86) && defined(_MSC_VER) && BX_SupportHostAsms)
#define BX_HostAsm_Add16
// asmAdd16(Bit16u &sum_16, Bit16u op1_16, Bit16u op2_16, Bit32u &flags32)
#define asmAdd16(sum_16,op1_16,op2_16,flags32) \
__asm { \
__asm mov ax,op1_16 \
__asm add ax,op2_16 \
__asm pushfd \
__asm pop edx \
__asm mov sum_16,ax \
__asm mov flags32,edx \
}
#define BX_HostAsm_Add32
// asmAdd32(Bit32u &sum_32, Bit32u op1_32, Bit32u op2_32, Bit32u &flags32)
#define asmAdd32(sum_32,op1_32,op2_32,flags32) \
__asm { \
__asm mov eax,op1_32 \
__asm add eax,op2_32 \
__asm pushfd \
__asm pop edx \
__asm mov sum_32,eax \
__asm mov flags32,edx \
}
#define BX_HostAsm_Sub16
// asmSub16(Bit16u &diff_16, Bit16u op1_16, Bit16u op2_16, Bit32u &flags32)
#define asmSub16(diff_16,op1_16,op2_16,flags32) \
__asm { \
__asm mov ax,op1_16 \
__asm sub ax,op2_16 \
__asm pushfd \
__asm pop edx \
__asm mov diff_16,ax \
__asm mov flags32,edx \
}
#define BX_HostAsm_Sub32
// asmSub32(Bit32u &diff_32, Bit32u op1_32, Bit32u op2_32, Bit32u &flags32)
#define asmSub32(diff_32,op1_32,op2_32,flags32) \
__asm { \
__asm mov eax,op1_32 \
__asm sub eax,op2_32 \
__asm pushfd \
__asm pop edx \
__asm mov diff_32,eax \
__asm mov flags32,edx \
}
#define BX_HostAsm_Cmp8
// asmCmp8(Bit8u op1_8, Bit8u op2_8, Bit32u &flags32)
#define asmCmp8(op1_8,op2_8,flags32) \
__asm { \
__asm mov al,op1_8 \
__asm cmp al,op2_8 \
__asm pushfd \
__asm pop edx \
__asm mov flags32,edx \
}
#define BX_HostAsm_Cmp16
// asmCmp16(Bit16u op1_16, Bit16u op2_16, Bit32u &flags32)
#define asmCmp16(op1_16,op2_16,flags32) \
__asm { \
__asm mov ax,op1_16 \
__asm cmp ax,op2_16 \
__asm pushfd \
__asm pop edx \
__asm mov flags32,edx \
}
#define BX_HostAsm_Cmp32
// asmCmp32(Bit32u op1_32, Bit32u op2_32, Bit32u &flags32)
#define asmCmp32(op1_32,op2_32,flags32) \
__asm { \
__asm mov eax,op1_32 \
__asm cmp eax,op2_32 \
__asm pushfd \
__asm pop edx \
__asm mov flags32,edx \
}
// FIXME: cannot compile arith16.cc because of 'union'.
//#define BX_HostAsm_Inc16
// asmInc16(Bit16u &op1_16, Bit32u &flags32)
#define asmInc16(op1_16,flags32) \
__asm { \
__asm inc word ptr op1_16 \
__asm pushfd \
__asm pop edx \
__asm mov flags32,edx \
}
// FIXME: cannot compile arith32.cc because of 'union'.
//#define BX_HostAsm_Inc32
// asmInc32(Bit32u &op1_32, Bit32u &flags32)
#define asmInc32(op1_32,flags32) \
__asm { \
__asm inc dword ptr op1_32 \
__asm pushfd \
__asm pop edx \
__asm mov flags32,edx \
}
// FIXME: cannot compile arith16.cc because of 'union'.
//#define BX_HostAsm_Dec16
// asmDec16(Bit16u &op1_16, Bit32u &flags32)
#define asmDec16(op1_16,flags32) \
__asm { \
__asm dec word ptr op1_16 \
__asm pushfd \
__asm pop edx \
__asm mov flags32,edx \
}
// FIXME: cannot compile arith32.cc because of 'union'.
//#define BX_HostAsm_Dec32
// asmDec32(Bit32u &op1_32, Bit32u &flags32)
#define asmDec32(op1_32,flags32) \
__asm { \
__asm dec dword ptr op1_32 \
__asm pushfd \
__asm pop edx \
__asm mov flags32,edx \
}
#define BX_HostAsm_Xor16
// asmXor16(Bit16u &result_16, Bit16u op1_16, Bit16u op2_16, Bit32u &flags32)
#define asmXor16(result_16,op1_16,op2_16,flags32) \
__asm { \
__asm mov ax,op1_16 \
__asm xor ax,op2_16 \
__asm pushfd \
__asm pop edx \
__asm mov result_16,ax \
__asm mov flags32,edx \
}
#define BX_HostAsm_Xor32
// asmXor32(Bit32u &result_32, Bit32u op1_32, Bit32u op2_32, Bit32u &flags32)
#define asmXor32(result_32,op1_32,op2_32,flags32) \
__asm { \
__asm mov eax,op1_32 \
__asm xor eax,op2_32 \
__asm pushfd \
__asm pop edx \
__asm mov result_32,eax \
__asm mov flags32,edx \
}
#define BX_HostAsm_Or8
// asmOr8(Bit8u &result_8, Bit8u op1_8, Bit8u op2_8, Bit32u &flags32)
#define asmOr8(result_8,op1_8,op2_8,flags32) \
__asm { \
__asm mov al,op1_8 \
__asm or al,op2_8 \
__asm pushfd \
__asm pop edx \
__asm mov result_8,al \
__asm mov flags32,edx \
}
#define BX_HostAsm_Or16
// asmOr16(Bit16u &result_16, Bit16u op1_16, Bit16u op2_16, Bit32u &flags32)
#define asmOr16(result_16,op1_16,op2_16,flags32) \
__asm { \
__asm mov ax,op1_16 \
__asm or ax,op2_16 \
__asm pushfd \
__asm pop edx \
__asm mov result_16,ax \
__asm mov flags32,edx \
}
#define BX_HostAsm_Or32
// asmOr32(Bit32u &result_32, Bit32u op1_32, Bit32u op2_32, Bit32u &flags32)
#define asmOr32(result_32,op1_32,op2_32,flags32) \
__asm { \
__asm mov eax,op1_32 \
__asm or eax,op2_32 \
__asm pushfd \
__asm pop edx \
__asm mov result_32,eax \
__asm mov flags32,edx \
}
#define BX_HostAsm_And8
// asmAnd8(Bit8u &result_8, Bit8u op1_8, Bit8u op2_8, Bit32u &flags32)
#define asmAnd8(result_8,op1_8,op2_8,flags32) \
__asm { \
__asm mov al,op1_8 \
__asm and al,op2_8 \
__asm pushfd \
__asm pop edx \
__asm mov result_8,al \
__asm mov flags32,edx \
}
#define BX_HostAsm_And16
// asmAnd16(Bit16u &result_16, Bit16u op1_16, Bit16u op2_16, Bit32u &flags32)
#define asmAnd16(result_16,op1_16,op2_16,flags32) \
__asm { \
__asm mov ax,op1_16 \
__asm and ax,op2_16 \
__asm pushfd \
__asm pop edx \
__asm mov result_16,ax \
__asm mov flags32,edx \
}
#define BX_HostAsm_And32
// asmAnd32(Bit32u &result_32, Bit32u op1_32, Bit32u op2_32, Bit32u &flags32)
#define asmAnd32(result_32,op1_32,op2_32,flags32) \
__asm { \
__asm mov eax,op1_32 \
__asm and eax,op2_32 \
__asm pushfd \
__asm pop edx \
__asm mov result_32,eax \
__asm mov flags32,edx \
}
#define BX_HostAsm_Test8
// asmTest8(Bit8u op1_8, Bit8u op2_8, Bit32u &flags32)
#define asmTest8(op1_8,op2_8,flags32) \
__asm { \
__asm mov al,op1_8 \
__asm test al,op2_8 \
__asm pushfd \
__asm pop edx \
__asm mov flags32,edx \
}
#define BX_HostAsm_Test16
// asmTest16(Bit16u op1_16, Bit16u op2_16, Bit32u &flags32)
#define asmTest16(op1_16,op2_16,flags32) \
__asm { \
__asm mov ax,op1_16 \
__asm test ax,op2_16 \
__asm pushfd \
__asm pop edx \
__asm mov flags32,edx \
}
#define BX_HostAsm_Test32
// asmTest32(Bit32u op1_32, Bit32u op2_32, Bit32u &flags32)
#define asmTest32(op1_32,op2_32,flags32) \
__asm { \
__asm mov eax,op1_32 \
__asm test eax,op2_32 \
__asm pushfd \
__asm pop edx \
__asm mov flags32,edx \
}
#define BX_HostAsm_Shr16
// asmShr16(Bit16u &result_16, Bit16u op1_16, unsigned count, Bit32u &flags32)
#define asmShr16(result_16,op1_16,count,flags32) \
__asm { \
__asm mov ax,op1_16 \
__asm mov cl,byte ptr count \
__asm shr ax,cl \
__asm pushfd \
__asm pop edx \
__asm mov result_16,ax \
__asm mov flags32,edx \
}
#define BX_HostAsm_Shr32
// asmShr32(Bit32u &result_32, Bit32u op1_32, unsigned count, Bit32u &flags32)
#define asmShr32(result_32,op1_32,count,flags32) \
__asm { \
__asm mov eax,op1_32 \
__asm mov cl,byte ptr count \
__asm shr eax,cl \
__asm pushfd \
__asm pop edx \
__asm mov result_32,eax \
__asm mov flags32,edx \
}
#endif // (defined(_M_IX86) && defined(_MSC_VER) && BX_SupportHostAsms)
#endif // BX_HOSTASM_H

38
bochs/cpu/logical16.cc
View File

@ -1,5 +1,5 @@
///////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////////////////////////
// $Id: logical16.cc,v 1.18 2002-10-25 18:26:28 sshwarts Exp $ // $Id: logical16.cc,v 1.19 2004-02-15 17:57:44 cbothamy Exp $
///////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////////////////////////
// //
// Copyright (C) 2001 MandrakeSoft S.A. // Copyright (C) 2001 MandrakeSoft S.A.
@ -46,7 +46,7 @@ BX_CPU_C::XOR_EwGw(bxInstruction_c *i)
if (i->modC0()) { if (i->modC0()) {
op1_16 = BX_READ_16BIT_REG(i->rm()); op1_16 = BX_READ_16BIT_REG(i->rm());
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_Xor16)
Bit32u flags32; Bit32u flags32;
asmXor16(result_16, op1_16, op2_16, flags32); asmXor16(result_16, op1_16, op2_16, flags32);
@ -58,7 +58,7 @@ BX_CPU_C::XOR_EwGw(bxInstruction_c *i)
} }
else { else {
read_RMW_virtual_word(i->seg(), RMAddr(i), &op1_16); read_RMW_virtual_word(i->seg(), RMAddr(i), &op1_16);
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_Xor16)
Bit32u flags32; Bit32u flags32;
asmXor16(result_16, op1_16, op2_16, flags32); asmXor16(result_16, op1_16, op2_16, flags32);
@ -69,7 +69,7 @@ BX_CPU_C::XOR_EwGw(bxInstruction_c *i)
Write_RMW_virtual_word(result_16); Write_RMW_virtual_word(result_16);
} }
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if !defined(BX_HostAsm_Xor16)
SET_FLAGS_OSZAPC_16(op1_16, op2_16, result_16, BX_INSTR_XOR16); SET_FLAGS_OSZAPC_16(op1_16, op2_16, result_16, BX_INSTR_XOR16);
#endif #endif
} }
@ -213,7 +213,7 @@ BX_CPU_C::OR_GwEw(bxInstruction_c *i)
read_virtual_word(i->seg(), RMAddr(i), &op2_16); read_virtual_word(i->seg(), RMAddr(i), &op2_16);
} }
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_Or16)
Bit32u flags32; Bit32u flags32;
asmOr16(result_16, op1_16, op2_16, flags32); asmOr16(result_16, op1_16, op2_16, flags32);
@ -224,7 +224,7 @@ BX_CPU_C::OR_GwEw(bxInstruction_c *i)
BX_WRITE_16BIT_REG(i->nnn(), result_16); BX_WRITE_16BIT_REG(i->nnn(), result_16);
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if !defined(BX_HostAsm_Or16)
SET_FLAGS_OSZAPC_16(op1_16, op2_16, result_16, BX_INSTR_OR16); SET_FLAGS_OSZAPC_16(op1_16, op2_16, result_16, BX_INSTR_OR16);
#endif #endif
} }
@ -257,7 +257,7 @@ BX_CPU_C::AND_EwGw(bxInstruction_c *i)
if (i->modC0()) { if (i->modC0()) {
op1_16 = BX_READ_16BIT_REG(i->rm()); op1_16 = BX_READ_16BIT_REG(i->rm());
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_And16)
Bit32u flags32; Bit32u flags32;
asmAnd16(result_16, op1_16, op2_16, flags32); asmAnd16(result_16, op1_16, op2_16, flags32);
@ -271,7 +271,7 @@ BX_CPU_C::AND_EwGw(bxInstruction_c *i)
else { else {
read_RMW_virtual_word(i->seg(), RMAddr(i), &op1_16); read_RMW_virtual_word(i->seg(), RMAddr(i), &op1_16);
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_And16)
Bit32u flags32; Bit32u flags32;
asmAnd16(result_16, op1_16, op2_16, flags32); asmAnd16(result_16, op1_16, op2_16, flags32);
@ -283,7 +283,7 @@ BX_CPU_C::AND_EwGw(bxInstruction_c *i)
Write_RMW_virtual_word(result_16); Write_RMW_virtual_word(result_16);
} }
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if !defined(BX_HostAsm_And16)
SET_FLAGS_OSZAPC_16(op1_16, op2_16, result_16, BX_INSTR_AND16); SET_FLAGS_OSZAPC_16(op1_16, op2_16, result_16, BX_INSTR_AND16);
#endif #endif
} }
@ -303,7 +303,7 @@ BX_CPU_C::AND_GwEw(bxInstruction_c *i)
read_virtual_word(i->seg(), RMAddr(i), &op2_16); read_virtual_word(i->seg(), RMAddr(i), &op2_16);
} }
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_And16)
Bit32u flags32; Bit32u flags32;
asmAnd16(result_16, op1_16, op2_16, flags32); asmAnd16(result_16, op1_16, op2_16, flags32);
@ -314,7 +314,7 @@ BX_CPU_C::AND_GwEw(bxInstruction_c *i)
BX_WRITE_16BIT_REG(i->nnn(), result_16); BX_WRITE_16BIT_REG(i->nnn(), result_16);
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if !defined(BX_HostAsm_And16)
SET_FLAGS_OSZAPC_16(op1_16, op2_16, result_16, BX_INSTR_AND16); SET_FLAGS_OSZAPC_16(op1_16, op2_16, result_16, BX_INSTR_AND16);
#endif #endif
} }
@ -328,7 +328,7 @@ BX_CPU_C::AND_AXIw(bxInstruction_c *i)
op1_16 = AX; op1_16 = AX;
op2_16 = i->Iw(); op2_16 = i->Iw();
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_And16)
Bit32u flags32; Bit32u flags32;
asmAnd16(result_16, op1_16, op2_16, flags32); asmAnd16(result_16, op1_16, op2_16, flags32);
@ -339,7 +339,7 @@ BX_CPU_C::AND_AXIw(bxInstruction_c *i)
AX = result_16; AX = result_16;
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if !defined(BX_HostAsm_And16)
SET_FLAGS_OSZAPC_16(op1_16, op2_16, result_16, BX_INSTR_AND16); SET_FLAGS_OSZAPC_16(op1_16, op2_16, result_16, BX_INSTR_AND16);
#endif #endif
} }
@ -354,7 +354,7 @@ BX_CPU_C::AND_EwIw(bxInstruction_c *i)
if (i->modC0()) { if (i->modC0()) {
op1_16 = BX_READ_16BIT_REG(i->rm()); op1_16 = BX_READ_16BIT_REG(i->rm());
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_And16)
Bit32u flags32; Bit32u flags32;
asmAnd16(result_16, op1_16, op2_16, flags32); asmAnd16(result_16, op1_16, op2_16, flags32);
@ -368,7 +368,7 @@ BX_CPU_C::AND_EwIw(bxInstruction_c *i)
else { else {
read_RMW_virtual_word(i->seg(), RMAddr(i), &op1_16); read_RMW_virtual_word(i->seg(), RMAddr(i), &op1_16);
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_And16)
Bit32u flags32; Bit32u flags32;
asmAnd16(result_16, op1_16, op2_16, flags32); asmAnd16(result_16, op1_16, op2_16, flags32);
@ -380,7 +380,7 @@ BX_CPU_C::AND_EwIw(bxInstruction_c *i)
Write_RMW_virtual_word(result_16); Write_RMW_virtual_word(result_16);
} }
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if !defined(BX_HostAsm_And16)
SET_FLAGS_OSZAPC_16(op1_16, op2_16, result_16, BX_INSTR_AND16); SET_FLAGS_OSZAPC_16(op1_16, op2_16, result_16, BX_INSTR_AND16);
#endif #endif
} }
@ -400,7 +400,7 @@ BX_CPU_C::TEST_EwGw(bxInstruction_c *i)
read_virtual_word(i->seg(), RMAddr(i), &op1_16); read_virtual_word(i->seg(), RMAddr(i), &op1_16);
} }
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_Test16)
Bit32u flags32; Bit32u flags32;
asmTest16(op1_16, op2_16, flags32); asmTest16(op1_16, op2_16, flags32);
@ -423,7 +423,7 @@ BX_CPU_C::TEST_AXIw(bxInstruction_c *i)
op1_16 = AX; op1_16 = AX;
op2_16 = i->Iw(); op2_16 = i->Iw();
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_Test16)
Bit32u flags32; Bit32u flags32;
asmTest16(op1_16, op2_16, flags32); asmTest16(op1_16, op2_16, flags32);
@ -451,7 +451,7 @@ BX_CPU_C::TEST_EwIw(bxInstruction_c *i)
read_virtual_word(i->seg(), RMAddr(i), &op1_16); read_virtual_word(i->seg(), RMAddr(i), &op1_16);
} }
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_Test16)
Bit32u flags32; Bit32u flags32;
asmTest16(op1_16, op2_16, flags32); asmTest16(op1_16, op2_16, flags32);

32
bochs/cpu/logical32.cc
View File

@ -1,5 +1,5 @@
///////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////////////////////////
// $Id: logical32.cc,v 1.19 2002-10-25 18:26:28 sshwarts Exp $ // $Id: logical32.cc,v 1.20 2004-02-15 17:57:45 cbothamy Exp $
///////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////////////////////////
// //
// Copyright (C) 2001 MandrakeSoft S.A. // Copyright (C) 2001 MandrakeSoft S.A.
@ -197,7 +197,7 @@ BX_CPU_C::OR_GdEd(bxInstruction_c *i)
read_virtual_dword(i->seg(), RMAddr(i), &op2_32); read_virtual_dword(i->seg(), RMAddr(i), &op2_32);
} }
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_Or32)
Bit32u flags32; Bit32u flags32;
asmOr32(result_32, op1_32, op2_32, flags32); asmOr32(result_32, op1_32, op2_32, flags32);
@ -208,7 +208,7 @@ BX_CPU_C::OR_GdEd(bxInstruction_c *i)
BX_WRITE_32BIT_REGZ(i->nnn(), result_32); BX_WRITE_32BIT_REGZ(i->nnn(), result_32);
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if !defined(BX_HostAsm_Or32)
SET_FLAGS_OSZAPC_32(op1_32, op2_32, result_32, BX_INSTR_OR32); SET_FLAGS_OSZAPC_32(op1_32, op2_32, result_32, BX_INSTR_OR32);
#endif #endif
} }
@ -245,7 +245,7 @@ BX_CPU_C::AND_EdGd(bxInstruction_c *i)
if (i->modC0()) { if (i->modC0()) {
op1_32 = BX_READ_32BIT_REG(i->rm()); op1_32 = BX_READ_32BIT_REG(i->rm());
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_And32)
Bit32u flags32; Bit32u flags32;
asmAnd32(result_32, op1_32, op2_32, flags32); asmAnd32(result_32, op1_32, op2_32, flags32);
@ -259,7 +259,7 @@ BX_CPU_C::AND_EdGd(bxInstruction_c *i)
else { else {
read_RMW_virtual_dword(i->seg(), RMAddr(i), &op1_32); read_RMW_virtual_dword(i->seg(), RMAddr(i), &op1_32);
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_And32)
Bit32u flags32; Bit32u flags32;
asmAnd32(result_32, op1_32, op2_32, flags32); asmAnd32(result_32, op1_32, op2_32, flags32);
@ -271,7 +271,7 @@ BX_CPU_C::AND_EdGd(bxInstruction_c *i)
Write_RMW_virtual_dword(result_32); Write_RMW_virtual_dword(result_32);
} }
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if !defined(BX_HostAsm_And32)
SET_FLAGS_OSZAPC_32(op1_32, op2_32, result_32, BX_INSTR_AND32); SET_FLAGS_OSZAPC_32(op1_32, op2_32, result_32, BX_INSTR_AND32);
#endif #endif
} }
@ -291,7 +291,7 @@ BX_CPU_C::AND_GdEd(bxInstruction_c *i)
read_virtual_dword(i->seg(), RMAddr(i), &op2_32); read_virtual_dword(i->seg(), RMAddr(i), &op2_32);
} }
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_And32)
Bit32u flags32; Bit32u flags32;
asmAnd32(result_32, op1_32, op2_32, flags32); asmAnd32(result_32, op1_32, op2_32, flags32);
@ -302,7 +302,7 @@ BX_CPU_C::AND_GdEd(bxInstruction_c *i)
BX_WRITE_32BIT_REGZ(i->nnn(), result_32); BX_WRITE_32BIT_REGZ(i->nnn(), result_32);
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if !defined(BX_HostAsm_And32)
SET_FLAGS_OSZAPC_32(op1_32, op2_32, result_32, BX_INSTR_AND32); SET_FLAGS_OSZAPC_32(op1_32, op2_32, result_32, BX_INSTR_AND32);
#endif #endif
} }
@ -316,7 +316,7 @@ BX_CPU_C::AND_EAXId(bxInstruction_c *i)
op1_32 = EAX; op1_32 = EAX;
op2_32 = i->Id(); op2_32 = i->Id();
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_And32)
Bit32u flags32; Bit32u flags32;
asmAnd32(result_32, op1_32, op2_32, flags32); asmAnd32(result_32, op1_32, op2_32, flags32);
@ -331,7 +331,7 @@ BX_CPU_C::AND_EAXId(bxInstruction_c *i)
EAX = result_32; EAX = result_32;
#endif #endif
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if !defined(BX_HostAsm_And32)
SET_FLAGS_OSZAPC_32(op1_32, op2_32, result_32, BX_INSTR_AND32); SET_FLAGS_OSZAPC_32(op1_32, op2_32, result_32, BX_INSTR_AND32);
#endif #endif
} }
@ -346,7 +346,7 @@ BX_CPU_C::AND_EdId(bxInstruction_c *i)
if (i->modC0()) { if (i->modC0()) {
op1_32 = BX_READ_32BIT_REG(i->rm()); op1_32 = BX_READ_32BIT_REG(i->rm());
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_And32)
Bit32u flags32; Bit32u flags32;
asmAnd32(result_32, op1_32, op2_32, flags32); asmAnd32(result_32, op1_32, op2_32, flags32);
@ -360,7 +360,7 @@ BX_CPU_C::AND_EdId(bxInstruction_c *i)
else { else {
read_RMW_virtual_dword(i->seg(), RMAddr(i), &op1_32); read_RMW_virtual_dword(i->seg(), RMAddr(i), &op1_32);
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_And32)
Bit32u flags32; Bit32u flags32;
asmAnd32(result_32, op1_32, op2_32, flags32); asmAnd32(result_32, op1_32, op2_32, flags32);
@ -372,7 +372,7 @@ BX_CPU_C::AND_EdId(bxInstruction_c *i)
Write_RMW_virtual_dword(result_32); Write_RMW_virtual_dword(result_32);
} }
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if !defined(BX_HostAsm_And32)
SET_FLAGS_OSZAPC_32(op1_32, op2_32, result_32, BX_INSTR_AND32); SET_FLAGS_OSZAPC_32(op1_32, op2_32, result_32, BX_INSTR_AND32);
#endif #endif
} }
@ -392,7 +392,7 @@ BX_CPU_C::TEST_EdGd(bxInstruction_c *i)
read_virtual_dword(i->seg(), RMAddr(i), &op1_32); read_virtual_dword(i->seg(), RMAddr(i), &op1_32);
} }
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_Test32)
Bit32u flags32; Bit32u flags32;
asmTest32(op1_32, op2_32, flags32); asmTest32(op1_32, op2_32, flags32);
@ -415,7 +415,7 @@ BX_CPU_C::TEST_EAXId(bxInstruction_c *i)
op1_32 = EAX; op1_32 = EAX;
op2_32 = i->Id(); op2_32 = i->Id();
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_Test32)
Bit32u flags32; Bit32u flags32;
asmTest32(op1_32, op2_32, flags32); asmTest32(op1_32, op2_32, flags32);
@ -443,7 +443,7 @@ BX_CPU_C::TEST_EdId(bxInstruction_c *i)
read_virtual_dword(i->seg(), RMAddr(i), &op1_32); read_virtual_dword(i->seg(), RMAddr(i), &op1_32);
} }
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_Test32)
Bit32u flags32; Bit32u flags32;
asmTest32(op1_32, op2_32, flags32); asmTest32(op1_32, op2_32, flags32);

36
bochs/cpu/logical8.cc
View File

@ -1,5 +1,5 @@
///////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////////////////////////
// $Id: logical8.cc,v 1.21 2002-10-25 18:26:28 sshwarts Exp $ // $Id: logical8.cc,v 1.22 2004-02-15 17:57:45 cbothamy Exp $
///////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////////////////////////
// //
// Copyright (C) 2001 MandrakeSoft S.A. // Copyright (C) 2001 MandrakeSoft S.A.
@ -193,7 +193,7 @@ BX_CPU_C::OR_GbEb(bxInstruction_c *i)
read_virtual_byte(i->seg(), RMAddr(i), &op2); read_virtual_byte(i->seg(), RMAddr(i), &op2);
} }
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_Or8)
Bit32u flags32; Bit32u flags32;
asmOr8(result, op1, op2, flags32); asmOr8(result, op1, op2, flags32);
@ -204,7 +204,7 @@ BX_CPU_C::OR_GbEb(bxInstruction_c *i)
BX_WRITE_8BIT_REGx(i->nnn(), i->extend8bitL(), result); BX_WRITE_8BIT_REGx(i->nnn(), i->extend8bitL(), result);
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if !defined(BX_HostAsm_Or8)
SET_FLAGS_OSZAPC_8(op1, op2, result, BX_INSTR_OR8); SET_FLAGS_OSZAPC_8(op1, op2, result, BX_INSTR_OR8);
#endif #endif
} }
@ -218,7 +218,7 @@ BX_CPU_C::OR_ALIb(bxInstruction_c *i)
op1 = AL; op1 = AL;
op2 = i->Ib(); op2 = i->Ib();
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_Or8)
Bit32u flags32; Bit32u flags32;
asmOr8(result, op1, op2, flags32); asmOr8(result, op1, op2, flags32);
@ -229,7 +229,7 @@ BX_CPU_C::OR_ALIb(bxInstruction_c *i)
AL = result; AL = result;
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if !defined(BX_HostAsm_Or8)
SET_FLAGS_OSZAPC_8(op1, op2, result, BX_INSTR_OR8); SET_FLAGS_OSZAPC_8(op1, op2, result, BX_INSTR_OR8);
#endif #endif
} }
@ -246,7 +246,7 @@ BX_CPU_C::AND_EbGb(bxInstruction_c *i)
if (i->modC0()) { if (i->modC0()) {
op1 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL()); op1 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_And8)
Bit32u flags32; Bit32u flags32;
asmAnd8(result, op1, op2, flags32); asmAnd8(result, op1, op2, flags32);
@ -260,7 +260,7 @@ BX_CPU_C::AND_EbGb(bxInstruction_c *i)
else { else {
read_RMW_virtual_byte(i->seg(), RMAddr(i), &op1); read_RMW_virtual_byte(i->seg(), RMAddr(i), &op1);
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_And8)
Bit32u flags32; Bit32u flags32;
asmAnd8(result, op1, op2, flags32); asmAnd8(result, op1, op2, flags32);
@ -272,7 +272,7 @@ BX_CPU_C::AND_EbGb(bxInstruction_c *i)
Write_RMW_virtual_byte(result); Write_RMW_virtual_byte(result);
} }
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if !defined(BX_HostAsm_And8)
SET_FLAGS_OSZAPC_8(op1, op2, result, BX_INSTR_AND8); SET_FLAGS_OSZAPC_8(op1, op2, result, BX_INSTR_AND8);
#endif #endif
} }
@ -292,7 +292,7 @@ BX_CPU_C::AND_GbEb(bxInstruction_c *i)
read_virtual_byte(i->seg(), RMAddr(i), &op2); read_virtual_byte(i->seg(), RMAddr(i), &op2);
} }
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_And8)
Bit32u flags32; Bit32u flags32;
asmAnd8(result, op1, op2, flags32); asmAnd8(result, op1, op2, flags32);
@ -303,7 +303,7 @@ BX_CPU_C::AND_GbEb(bxInstruction_c *i)
BX_WRITE_8BIT_REGx(i->nnn(), i->extend8bitL(), result); BX_WRITE_8BIT_REGx(i->nnn(), i->extend8bitL(), result);
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if !defined(BX_HostAsm_And8)
SET_FLAGS_OSZAPC_8(op1, op2, result, BX_INSTR_AND8); SET_FLAGS_OSZAPC_8(op1, op2, result, BX_INSTR_AND8);
#endif #endif
} }
@ -318,7 +318,7 @@ BX_CPU_C::AND_ALIb(bxInstruction_c *i)
op1 = AL; op1 = AL;
op2 = i->Ib(); op2 = i->Ib();
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_And8)
Bit32u flags32; Bit32u flags32;
asmAnd8(result, op1, op2, flags32); asmAnd8(result, op1, op2, flags32);
@ -329,7 +329,7 @@ BX_CPU_C::AND_ALIb(bxInstruction_c *i)
AL = result; AL = result;
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if !defined(BX_HostAsm_And8)
SET_FLAGS_OSZAPC_8(op1, op2, result, BX_INSTR_AND8); SET_FLAGS_OSZAPC_8(op1, op2, result, BX_INSTR_AND8);
#endif #endif
} }
@ -348,7 +348,7 @@ BX_CPU_C::AND_EbIb(bxInstruction_c *i)
if (i->modC0()) { if (i->modC0()) {
op1 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL()); op1 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_And8)
Bit32u flags32; Bit32u flags32;
asmAnd8(result, op1, op2, flags32); asmAnd8(result, op1, op2, flags32);
@ -362,7 +362,7 @@ BX_CPU_C::AND_EbIb(bxInstruction_c *i)
else { else {
read_RMW_virtual_byte(i->seg(), RMAddr(i), &op1); read_RMW_virtual_byte(i->seg(), RMAddr(i), &op1);
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_And8)
Bit32u flags32; Bit32u flags32;
asmAnd8(result, op1, op2, flags32); asmAnd8(result, op1, op2, flags32);
@ -374,7 +374,7 @@ BX_CPU_C::AND_EbIb(bxInstruction_c *i)
Write_RMW_virtual_byte(result); Write_RMW_virtual_byte(result);
} }
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if !defined(BX_HostAsm_And8)
SET_FLAGS_OSZAPC_8(op1, op2, result, BX_INSTR_AND8); SET_FLAGS_OSZAPC_8(op1, op2, result, BX_INSTR_AND8);
#endif #endif
} }
@ -394,7 +394,7 @@ BX_CPU_C::TEST_EbGb(bxInstruction_c *i)
read_virtual_byte(i->seg(), RMAddr(i), &op1); read_virtual_byte(i->seg(), RMAddr(i), &op1);
} }
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_Test8)
Bit32u flags32; Bit32u flags32;
asmTest8(op1, op2, flags32); asmTest8(op1, op2, flags32);
@ -416,7 +416,7 @@ BX_CPU_C::TEST_ALIb(bxInstruction_c *i)
op1 = AL; op1 = AL;
op2 = i->Ib(); op2 = i->Ib();
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_Test8)
Bit32u flags32; Bit32u flags32;
asmTest8(op1, op2, flags32); asmTest8(op1, op2, flags32);
@ -445,7 +445,7 @@ BX_CPU_C::TEST_EbIb(bxInstruction_c *i)
read_virtual_byte(i->seg(), RMAddr(i), &op1); read_virtual_byte(i->seg(), RMAddr(i), &op1);
} }
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_Test8)
Bit32u flags32; Bit32u flags32;
asmTest8(op1, op2, flags32); asmTest8(op1, op2, flags32);

6
bochs/cpu/shift16.cc
View File

@ -1,5 +1,5 @@
///////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////////////////////////
// $Id: shift16.cc,v 1.17 2002-10-25 18:26:29 sshwarts Exp $ // $Id: shift16.cc,v 1.18 2004-02-15 17:57:45 cbothamy Exp $
///////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////////////////////////
// //
// Copyright (C) 2001 MandrakeSoft S.A. // Copyright (C) 2001 MandrakeSoft S.A.
@ -432,7 +432,7 @@ BX_CPU_C::SHR_Ew(bxInstruction_c *i)
if (!count) return; if (!count) return;
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_Shr16)
Bit32u flags32; Bit32u flags32;
asmShr16(result_16, op1_16, count, flags32); asmShr16(result_16, op1_16, count, flags32);
@ -450,7 +450,7 @@ BX_CPU_C::SHR_Ew(bxInstruction_c *i)
Write_RMW_virtual_word(result_16); Write_RMW_virtual_word(result_16);
} }
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if !defined(BX_HostAsm_Shr16)
SET_FLAGS_OSZAPC_16(op1_16, count, result_16, BX_INSTR_SHR16); SET_FLAGS_OSZAPC_16(op1_16, count, result_16, BX_INSTR_SHR16);
#endif #endif
} }

6
bochs/cpu/shift32.cc
View File

@ -1,5 +1,5 @@
///////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////////////////////////
// $Id: shift32.cc,v 1.18 2002-10-25 18:26:29 sshwarts Exp $ // $Id: shift32.cc,v 1.19 2004-02-15 17:57:45 cbothamy Exp $
///////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////////////////////////
// //
// Copyright (C) 2001 MandrakeSoft S.A. // Copyright (C) 2001 MandrakeSoft S.A.
@ -397,7 +397,7 @@ BX_CPU_C::SHR_Ed(bxInstruction_c *i)
if (!count) return; if (!count) return;
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if defined(BX_HostAsm_Shr32)
Bit32u flags32; Bit32u flags32;
asmShr32(result_32, op1_32, count, flags32); asmShr32(result_32, op1_32, count, flags32);
@ -414,7 +414,7 @@ BX_CPU_C::SHR_Ed(bxInstruction_c *i)
Write_RMW_virtual_dword(result_32); Write_RMW_virtual_dword(result_32);
} }
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if !defined(BX_HostAsm_Shr32)
SET_FLAGS_OSZAPC_32(op1_32, count, result_32, BX_INSTR_SHR32); SET_FLAGS_OSZAPC_32(op1_32, count, result_32, BX_INSTR_SHR32);
#endif #endif
} }