diff --git a/bochs/iodev/acpi.cc b/bochs/iodev/acpi.cc index 9ae4b12cd..e716ca5a3 100644 --- a/bochs/iodev/acpi.cc +++ b/bochs/iodev/acpi.cc @@ -237,7 +237,7 @@ void bx_acpi_ctrl_c::after_restore_state(void) } } -void bx_acpi_ctrl_c::set_irq_level(bx_bool level) +void bx_acpi_ctrl_c::set_irq_level(bool level) { DEV_pci_set_irq(BX_ACPI_THIS s.devfunc, BX_ACPI_THIS pci_conf[0x3d], level); } @@ -260,8 +260,8 @@ Bit16u bx_acpi_ctrl_c::get_pmsts(void) void bx_acpi_ctrl_c::pm_update_sci(void) { Bit16u pmsts = get_pmsts(); - bx_bool sci_level = (((pmsts & BX_ACPI_THIS s.pmen) & - (RTC_EN | PWRBTN_EN | GBL_EN | TMROF_EN)) != 0); + bool sci_level = (((pmsts & BX_ACPI_THIS s.pmen) & + (RTC_EN | PWRBTN_EN | GBL_EN | TMROF_EN)) != 0); BX_ACPI_THIS set_irq_level(sci_level); // schedule a timer interruption if needed if ((BX_ACPI_THIS s.pmen & TMROF_EN) && !(pmsts & TMROF_EN)) { @@ -515,7 +515,7 @@ void bx_acpi_ctrl_c::timer() void bx_acpi_ctrl_c::pci_write_handler(Bit8u address, Bit32u value, unsigned io_len) { Bit8u value8, oldval; - bx_bool pm_base_change = 0, sm_base_change = 0; + bool pm_base_change = 0, sm_base_change = 0; if ((address >= 0x10) && (address < 0x34)) return; diff --git a/bochs/iodev/acpi.h b/bochs/iodev/acpi.h index a2e7ae1c2..8e8fb13c8 100644 --- a/bochs/iodev/acpi.h +++ b/bochs/iodev/acpi.h @@ -2,7 +2,7 @@ // $Id$ ///////////////////////////////////////////////////////////////////////// // -// Copyright (C) 2006-2020 The Bochs Project +// Copyright (C) 2006-2021 The Bochs Project // // This library is free software; you can redistribute it and/or // modify it under the terms of the GNU Lesser General Public @@ -53,7 +53,7 @@ public: BX_ACPI_SMF void timer(void); private: - BX_ACPI_SMF void set_irq_level(bx_bool level); + BX_ACPI_SMF void set_irq_level(bool level); BX_ACPI_SMF Bit32u get_pmtmr(void); BX_ACPI_SMF Bit16u get_pmsts(void); BX_ACPI_SMF void pm_update_sci(void); diff --git a/bochs/iodev/biosdev.h b/bochs/iodev/biosdev.h index 59dbbe3d7..b459f2dd8 100644 --- a/bochs/iodev/biosdev.h +++ b/bochs/iodev/biosdev.h @@ -2,7 +2,7 @@ // $Id$ ///////////////////////////////////////////////////////////////////////// // -// Copyright (C) 2002-2009 The Bochs Project +// Copyright (C) 2002-2021 The Bochs Project // // This library is free software; you can redistribute it and/or // modify it under the terms of the GNU Lesser General Public @@ -50,11 +50,11 @@ private: struct { Bit8u bios_message[BX_BIOS_MESSAGE_SIZE]; unsigned int bios_message_i; - bx_bool bios_panic_flag; + bool bios_panic_flag; Bit8u vgabios_message[BX_BIOS_MESSAGE_SIZE]; unsigned int vgabios_message_i; - bx_bool vgabios_panic_flag; + bool vgabios_panic_flag; } s; // state information }; diff --git a/bochs/iodev/busmouse.cc b/bochs/iodev/busmouse.cc index 9cd1d7676..d6126b9c4 100644 --- a/bochs/iodev/busmouse.cc +++ b/bochs/iodev/busmouse.cc @@ -401,7 +401,7 @@ void bx_busm_c::mouse_enq(int delta_x, int delta_y, int delta_z, unsigned button void bx_busm_c::update_mouse_data() { int delta_x, delta_y; - bx_bool hold; + bool hold; if (BX_BUSM_THIS mouse_delayed_dx > 127) { delta_x = 127; diff --git a/bochs/iodev/busmouse.h b/bochs/iodev/busmouse.h index b49d206d6..a993b23c2 100644 --- a/bochs/iodev/busmouse.h +++ b/bochs/iodev/busmouse.h @@ -71,7 +71,7 @@ private: Bit8u config_val; Bit8u sig_val; Bit16u toggle_counter; - bx_bool interrupts; // 0 or 1. interrupts off or on. + bool interrupts; // 0 or 1. interrupts off or on. }; #endif // BX_SUPPORT_BUSMOUSE diff --git a/bochs/iodev/cmos.cc b/bochs/iodev/cmos.cc index a07a42f58..cdce1209a 100644 --- a/bochs/iodev/cmos.cc +++ b/bochs/iodev/cmos.cc @@ -84,7 +84,7 @@ bx_cmos_c *theCmosDevice = NULL; // 0x5f 1 number of processors -Bit8u bcd_to_bin(Bit8u value, bx_bool is_binary) +Bit8u bcd_to_bin(Bit8u value, bool is_binary) { if (is_binary) return value; @@ -92,7 +92,7 @@ Bit8u bcd_to_bin(Bit8u value, bx_bool is_binary) return ((value >> 4) * 10) + (value & 0x0f); } -Bit8u bin_to_bcd(Bit8u value, bx_bool is_binary) +Bit8u bin_to_bcd(Bit8u value, bool is_binary) { if (is_binary) return value; @@ -180,7 +180,7 @@ void bx_cmos_c::init(void) BX_INFO(("Using local time for initial clock")); BX_CMOS_THIS s.timeval = time(NULL); } else if (SIM->get_param_num(BXPN_CLOCK_TIME0)->get() == BX_CLOCK_TIME0_UTC) { - bx_bool utc_ok = 0; + bool utc_ok = 0; BX_INFO(("Using utc time for initial clock")); @@ -744,7 +744,7 @@ void bx_cmos_c::uip_timer() // compare CMOS user copy of time/date to alarm time/date here if (BX_CMOS_THIS s.reg[REG_STAT_B] & 0x20) { // Alarm interrupts enabled - bx_bool alarm_match = 1; + bool alarm_match = 1; if ((BX_CMOS_THIS s.reg[REG_SEC_ALARM] & 0xc0) != 0xc0) { // seconds alarm not in dont care mode if (BX_CMOS_THIS s.reg[REG_SEC] != BX_CMOS_THIS s.reg[REG_SEC_ALARM]) diff --git a/bochs/iodev/cmos.h b/bochs/iodev/cmos.h index 716aae675..9c1e4bfb4 100644 --- a/bochs/iodev/cmos.h +++ b/bochs/iodev/cmos.h @@ -67,16 +67,16 @@ public: time_t timeval; Bit8u cmos_mem_address; Bit8u cmos_ext_mem_addr; - bx_bool timeval_change; - bx_bool rtc_mode_12hour; - bx_bool rtc_mode_binary; - bx_bool rtc_sync; - bx_bool irq_enabled; + bool timeval_change; + bool rtc_mode_12hour; + bool rtc_mode_binary; + bool rtc_sync; + bool irq_enabled; Bit8u reg[256]; Bit8u max_reg; - bx_bool use_image; + bool use_image; } s; // state information private: diff --git a/bochs/iodev/dma.cc b/bochs/iodev/dma.cc index 2944d03b2..b952352a3 100644 --- a/bochs/iodev/dma.cc +++ b/bochs/iodev/dma.cc @@ -108,8 +108,7 @@ unsigned bx_dma_c::registerDMA16Channel(unsigned channel, unsigned bx_dma_c::unregisterDMAChannel(unsigned channel) { - bx_bool ma_sl = (channel > 3); - BX_DMA_THIS s[ma_sl].chan[channel & 0x03].used = 0; + BX_DMA_THIS s[(channel > 3) ? 1 : 0].chan[channel & 0x03].used = 0; BX_INFO(("channel %u no longer used", channel)); return 1; } @@ -256,7 +255,7 @@ bx_dma_c::read(Bit32u address, unsigned io_len) return(0xff); #endif - bx_bool ma_sl = (address >= 0xc0); + Bit8u ma_sl = (address >= 0xc0) ? 1 : 0; switch (address) { case 0x00: /* DMA-1 current address, channel 0 */ @@ -402,7 +401,7 @@ bx_dma_c::write(Bit32u address, Bit32u value, unsigned io_len) return; #endif - bx_bool ma_sl = (address >= 0xc0); + Bit8u ma_sl = (address >= 0xc0) ? 1 : 0; switch (address) { case 0x00: @@ -572,13 +571,13 @@ bx_dma_c::write(Bit32u address, Bit32u value, unsigned io_len) void bx_dma_c::set_DRQ(unsigned channel, bool val) { Bit32u dma_base, dma_roof; - bx_bool ma_sl; + Bit8u ma_sl; if (channel > 7) { BX_PANIC(("set_DRQ() channel > 7")); return; } - ma_sl = (channel > 3); + ma_sl = (channel > 3) ? 1 : 0; BX_DMA_THIS s[ma_sl].DRQ[channel & 0x03] = val; if (!BX_DMA_THIS s[ma_sl].chan[channel & 0x03].used) { BX_PANIC(("set_DRQ(): channel %d not connected to device", channel)); @@ -620,7 +619,7 @@ void bx_dma_c::set_DRQ(unsigned channel, bool val) control_HRQ(ma_sl); } -void bx_dma_c::control_HRQ(bx_bool ma_sl) +void bx_dma_c::control_HRQ(Bit8u ma_sl) { unsigned channel; @@ -657,7 +656,7 @@ void bx_dma_c::raise_HLDA(void) { unsigned channel; bx_phy_address phy_addr; - bx_bool ma_sl = 0; + Bit8u ma_sl = 0; Bit16u maxlen, len = 1; Bit8u buffer[BX_DMA_BUFFER_SIZE]; diff --git a/bochs/iodev/dma.h b/bochs/iodev/dma.h index 897e54738..1f12188bb 100644 --- a/bochs/iodev/dma.h +++ b/bochs/iodev/dma.h @@ -63,23 +63,23 @@ private: Bit32u read (Bit32u address, unsigned io_len) BX_CPP_AttrRegparmN(2); void write(Bit32u address, Bit32u value, unsigned io_len) BX_CPP_AttrRegparmN(3); #endif - BX_DMA_SMF void control_HRQ(bx_bool ma_sl); + BX_DMA_SMF void control_HRQ(Bit8u ma_sl); BX_DMA_SMF void reset_controller(unsigned num); struct { - bx_bool DRQ[4]; // DMA Request - bx_bool DACK[4]; // DMA Acknowlege + bool DRQ[4]; // DMA Request + bool DACK[4]; // DMA Acknowlege - bx_bool mask[4]; - bx_bool flip_flop; + bool mask[4]; + bool flip_flop; Bit8u status_reg; Bit8u command_reg; - bx_bool ctrl_disabled; + bool ctrl_disabled; struct { struct { Bit8u mode_type; - bx_bool address_decrement; - bx_bool autoinit_enable; + bool address_decrement; + bool autoinit_enable; Bit8u transfer_type; } mode; Bit16u base_address; @@ -87,12 +87,12 @@ private: Bit16u base_count; Bit16u current_count; Bit8u page_reg; - bx_bool used; + bool used; } chan[4]; /* DMA channels 0..3 */ } s[2]; // state information DMA-1 / DMA-2 - bx_bool HLDA; // Hold Acknowlege - bx_bool TC; // Terminal Count + bool HLDA; // Hold Acknowlege + bool TC; // Terminal Count Bit8u ext_page_reg[16]; // Extra page registers (unused) diff --git a/bochs/iodev/floppy.cc b/bochs/iodev/floppy.cc index ca4e3c036..f93ceb2a2 100644 --- a/bochs/iodev/floppy.cc +++ b/bochs/iodev/floppy.cc @@ -432,7 +432,7 @@ void bx_floppy_ctrl_c::runtime_config_handler(void *this_ptr) void bx_floppy_ctrl_c::runtime_config(void) { unsigned drive; - bx_bool status; + bool status; char pname[16]; for (drive=0; drive<2; drive++) { @@ -578,8 +578,8 @@ void bx_floppy_ctrl_c::write(Bit32u address, Bit32u value, unsigned io_len) #else UNUSED(this_ptr); #endif // !BX_USE_FD_SMF - bx_bool dma_and_interrupt_enable; - bx_bool normal_operation, prev_normal_operation; + bool dma_and_interrupt_enable; + bool normal_operation, prev_normal_operation; Bit8u drive_select; Bit8u motor_on_drive0, motor_on_drive1; @@ -1491,7 +1491,7 @@ void bx_floppy_ctrl_c::increment_sector(void) } } -bx_bool bx_floppy_ctrl_c::set_media_status(unsigned drive, bx_bool status) +bool bx_floppy_ctrl_c::set_media_status(unsigned drive, bool status) { char *path; unsigned type; @@ -1559,7 +1559,7 @@ bx_bool bx_floppy_ctrl_c::set_media_status(unsigned drive, bx_bool status) #define BX_RDWR O_RDWR #endif -bx_bool bx_floppy_ctrl_c::evaluate_media(Bit8u devtype, Bit8u type, char *path, floppy_t *media) +bool bx_floppy_ctrl_c::evaluate_media(Bit8u devtype, Bit8u type, char *path, floppy_t *media) { struct stat stat_buf; int i, ret; @@ -1569,7 +1569,7 @@ bx_bool bx_floppy_ctrl_c::evaluate_media(Bit8u devtype, Bit8u type, char *path, #endif #ifdef WIN32 char sTemp[1024]; - bx_bool raw_floppy = 0; + bool raw_floppy = 0; HANDLE hFile; DWORD bytes; DISK_GEOMETRY dg; @@ -1928,10 +1928,10 @@ void bx_floppy_ctrl_c::reset_changeline(void) BX_FD_THIS s.DIR[drive] &= ~0x80; } -bx_bool bx_floppy_ctrl_c::get_tc(void) +bool bx_floppy_ctrl_c::get_tc(void) { Bit8u drive; - bx_bool terminal_count; + bool terminal_count; if (BX_FD_THIS s.main_status_reg & FD_MS_NDMA) { drive = BX_FD_THIS s.DOR & 0x03; /* figure out if we've sent all the data, in non-DMA mode... @@ -1964,7 +1964,7 @@ Bit64s bx_floppy_ctrl_c::floppy_param_handler(bx_param_c *param, int set, Bit64s if (!strcmp(param->get_name(), "status")) { BX_FD_THIS s.media[drive].status_changed = 1; } else if (!strcmp(param->get_name(), "readonly")) { - BX_FD_THIS s.media[drive].write_protected = (bx_bool)val; + BX_FD_THIS s.media[drive].write_protected = (bool)val; BX_FD_THIS s.media[drive].status_changed = 1; } } diff --git a/bochs/iodev/floppy.h b/bochs/iodev/floppy.h index 25107afcf..0f7e2882a 100644 --- a/bochs/iodev/floppy.h +++ b/bochs/iodev/floppy.h @@ -2,7 +2,7 @@ // $Id$ ///////////////////////////////////////////////////////////////////////// // -// Copyright (C) 2002-2020 The Bochs Project +// Copyright (C) 2002-2021 The Bochs Project // // This library is free software; you can redistribute it and/or // modify it under the terms of the GNU Lesser General Public @@ -42,7 +42,7 @@ typedef struct { unsigned type; unsigned write_protected; unsigned status_changed; - bx_bool vvfat_floppy; + bool vvfat_floppy; device_image_t *vvfat; } floppy_t; @@ -66,11 +66,11 @@ private: Bit8u command[10]; /* largest command size ??? */ Bit8u command_index; Bit8u command_size; - bx_bool command_complete; + bool command_complete; Bit8u pending_command; - bx_bool multi_track; - bx_bool pending_irq; + bool multi_track; + bool pending_irq; Bit8u reset_sensei; Bit8u format_count; Bit8u format_fillbyte; @@ -86,7 +86,7 @@ private: Bit8u head[4]; // really only using 2 drives Bit8u sector[4]; // really only using 2 drives Bit8u eot[4]; // really only using 2 drives - bx_bool TC; // Terminal Count status from DMA controller + bool TC; // Terminal Count status from DMA controller /* MAIN STATUS REGISTER * b7: MRQ: main request 1=data register ready 0=data register not ready @@ -113,12 +113,12 @@ private: Bit8u floppy_buffer[512+2]; // 2 extra for good measure unsigned floppy_buffer_index; int floppy_timer_index; - bx_bool media_present[4]; + bool media_present[4]; Bit8u device_type[4]; Bit8u DIR[4]; // Digital Input Register: // b7: 0=diskette is present and has not been changed // 1=diskette missing or changed - bx_bool lock; // FDC lock status + bool lock; // FDC lock status Bit8u SRT; // step rate time Bit8u HUT; // head unload time Bit8u HLT; // head load time @@ -136,7 +136,7 @@ private: Bit32u read(Bit32u address, unsigned io_len); void write(Bit32u address, Bit32u value, unsigned io_len); #endif - BX_FD_SMF bx_bool set_media_status(unsigned drive, bx_bool status); + BX_FD_SMF bool set_media_status(unsigned drive, bool status); BX_FD_SMF Bit16u dma_write(Bit8u *buffer, Bit16u maxlen); BX_FD_SMF Bit16u dma_read(Bit8u *buffer, Bit16u maxlen); BX_FD_SMF void floppy_command(void); @@ -147,11 +147,11 @@ private: BX_FD_SMF void enter_result_phase(void); BX_FD_SMF Bit32u calculate_step_delay(Bit8u drive, Bit8u new_cylinder); BX_FD_SMF void reset_changeline(void); - BX_FD_SMF bx_bool get_tc(void); + BX_FD_SMF bool get_tc(void); static void timer_handler(void *); BX_FD_SMF void timer(void); BX_FD_SMF void increment_sector(void); - BX_FD_SMF bx_bool evaluate_media(Bit8u devtype, Bit8u type, char *path, floppy_t *media); + BX_FD_SMF bool evaluate_media(Bit8u devtype, Bit8u type, char *path, floppy_t *media); BX_FD_SMF void close_media(floppy_t *media); // runtime options static Bit64s floppy_param_handler(bx_param_c *param, int set, Bit64s val); diff --git a/bochs/iodev/gameport.h b/bochs/iodev/gameport.h index 282f9f88b..5501b8da0 100644 --- a/bochs/iodev/gameport.h +++ b/bochs/iodev/gameport.h @@ -46,8 +46,8 @@ private: Bit8u port; Bit16u delay_x; Bit16u delay_y; - bx_bool timer_x; - bx_bool timer_y; + bool timer_x; + bool timer_y; Bit64u write_usec; BX_GAMEPORT_SMF void poll_joydev(void); diff --git a/bochs/iodev/hpet.cc b/bochs/iodev/hpet.cc index e79a38563..b98f0c8d6 100644 --- a/bochs/iodev/hpet.cc +++ b/bochs/iodev/hpet.cc @@ -255,7 +255,7 @@ Bit64u bx_hpet_c::hpet_calculate_diff(HPETTimer *t, Bit64u current) } } -void bx_hpet_c::update_irq(HPETTimer *timer, bx_bool set) +void bx_hpet_c::update_irq(HPETTimer *timer, bool set) { Bit64u mask; int route; diff --git a/bochs/iodev/hpet.h b/bochs/iodev/hpet.h index fe786e286..3399aabad 100644 --- a/bochs/iodev/hpet.h +++ b/bochs/iodev/hpet.h @@ -9,7 +9,7 @@ // // Authors: Beth Kon // -// Copyright (C) 2017-2019 The Bochs Project +// Copyright (C) 2017-2021 The Bochs Project // // This library is free software; you can redistribute it and/or // modify it under the terms of the GNU Lesser General Public @@ -111,7 +111,7 @@ private: Bit32u timer_enabled(HPETTimer *t) {return t->config & HPET_TN_ENABLE;} Bit64u hpet_get_ticks(void); Bit64u hpet_calculate_diff(HPETTimer *t, Bit64u current); - void update_irq(HPETTimer *timer, bx_bool set); + void update_irq(HPETTimer *timer, bool set); void hpet_set_timer(HPETTimer *t); void hpet_del_timer(HPETTimer *t); diff --git a/bochs/iodev/ioapic.cc b/bochs/iodev/ioapic.cc index 5bcfd3e19..a15900a54 100644 --- a/bochs/iodev/ioapic.cc +++ b/bochs/iodev/ioapic.cc @@ -310,7 +310,7 @@ void bx_ioapic_c::service_ioapic() } else { vector = entry->vector(); } - bx_bool done = apic_bus_deliver_interrupt(vector, entry->destination(), entry->delivery_mode(), entry->destination_mode(), entry->pin_polarity(), entry->trigger_mode()); + bool done = apic_bus_deliver_interrupt(vector, entry->destination(), entry->delivery_mode(), entry->destination_mode(), entry->pin_polarity(), entry->trigger_mode()); if (done) { if (! entry->trigger_mode()) irr &= ~mask; diff --git a/bochs/iodev/ioapic.h b/bochs/iodev/ioapic.h index ac36d7043..44eba98fc 100644 --- a/bochs/iodev/ioapic.h +++ b/bochs/iodev/ioapic.h @@ -27,9 +27,9 @@ typedef Bit32u apic_dest_t; /* same definition in apic.h */ -extern int apic_bus_deliver_lowest_priority(Bit8u vector, apic_dest_t dest, bx_bool trig_mode, bx_bool broadcast); +extern int apic_bus_deliver_lowest_priority(Bit8u vector, apic_dest_t dest, bool trig_mode, bool broadcast); extern int apic_bus_deliver_interrupt(Bit8u vector, apic_dest_t dest, Bit8u delivery_mode, bool logical_dest, bool level, bool trig_mode); -extern int apic_bus_broadcast_interrupt(Bit8u vector, Bit8u delivery_mode, bx_bool trig_mode, int exclude_cpu); +extern int apic_bus_broadcast_interrupt(Bit8u vector, Bit8u delivery_mode, bool trig_mode, int exclude_cpu); #define BX_IOAPIC_NUM_PINS (0x18) @@ -43,11 +43,11 @@ public: bx_io_redirect_entry_t(): hi(0), lo(0x10000) {} Bit8u destination() const { return (Bit8u)(hi >> 24); } - bx_bool is_masked() const { return (bx_bool)((lo >> 16) & 1); } + bool is_masked() const { return (bool)((lo >> 16) & 1); } Bit8u trigger_mode() const { return (Bit8u)((lo >> 15) & 1); } - bx_bool remote_irr() const { return (bx_bool)((lo >> 14) & 1); } + bool remote_irr() const { return (bool)((lo >> 14) & 1); } Bit8u pin_polarity() const { return (Bit8u)((lo >> 13) & 1); } - bx_bool delivery_status() const { return (bx_bool)((lo >> 12) & 1); } + bool delivery_status() const { return (bool)((lo >> 12) & 1); } Bit8u destination_mode() const { return (Bit8u)((lo >> 11) & 1); } Bit8u delivery_mode() const { return (Bit8u)((lo >> 8) & 7); } Bit8u vector() const { return (Bit8u)(lo & 0xff); } diff --git a/bochs/iodev/iodebug.cc b/bochs/iodev/iodebug.cc index 0b24c7ebc..b9cbd4141 100644 --- a/bochs/iodev/iodebug.cc +++ b/bochs/iodev/iodebug.cc @@ -49,7 +49,7 @@ PLUGIN_ENTRY_FOR_MODULE(iodebug) } struct bx_iodebug_s_type { - bx_bool enabled; + bool enabled; unsigned register_select; Bit32u registers[2]; bx_phy_address monitored_mem_areas_start[BX_IODEBUG_MAX_AREAS]; diff --git a/bochs/iodev/keyboard.cc b/bochs/iodev/keyboard.cc index 31b0ccace..9184c61b0 100644 --- a/bochs/iodev/keyboard.cc +++ b/bochs/iodev/keyboard.cc @@ -82,7 +82,7 @@ bx_keyb_c::~bx_keyb_c() } // flush internal buffer and reset keyboard settings to power-up condition -void bx_keyb_c::resetinternals(bx_bool powerup) +void bx_keyb_c::resetinternals(bool powerup) { BX_KEY_THIS s.kbd_internal_buffer.num_elements = 0; for (int i=0; i> 6) & 0x01; disable_aux = (value >> 5) & 0x01; @@ -483,13 +483,13 @@ void bx_keyb_c::write(Bit32u address, Bit32u value, unsigned io_len) break; } command_byte = - (BX_KEY_THIS s.kbd_controller.scancodes_translate << 6) | - ((!BX_KEY_THIS s.kbd_controller.aux_clock_enabled) << 5) | - ((!BX_KEY_THIS s.kbd_controller.kbd_clock_enabled) << 4) | + ((Bit8u)BX_KEY_THIS s.kbd_controller.scancodes_translate << 6) | + ((Bit8u)(!BX_KEY_THIS s.kbd_controller.aux_clock_enabled) << 5) | + ((Bit8u)(!BX_KEY_THIS s.kbd_controller.kbd_clock_enabled) << 4) | (0 << 3) | - (BX_KEY_THIS s.kbd_controller.sysf << 2) | - (BX_KEY_THIS s.kbd_controller.allow_irq12 << 1) | - (BX_KEY_THIS s.kbd_controller.allow_irq1 << 0); + ((Bit8u)BX_KEY_THIS s.kbd_controller.sysf << 2) | + ((Bit8u)BX_KEY_THIS s.kbd_controller.allow_irq12 << 1) | + ((Bit8u)BX_KEY_THIS s.kbd_controller.allow_irq1 << 0); controller_enQ(command_byte, 0); break; case 0x60: // write command byte @@ -582,8 +582,8 @@ void bx_keyb_c::write(Bit32u address, Bit32u value, unsigned io_len) break; } controller_enQ( - (BX_KEY_THIS s.kbd_controller.irq12_requested << 5) | - (BX_KEY_THIS s.kbd_controller.irq1_requested << 4) | + ((Bit8u)BX_KEY_THIS s.kbd_controller.irq12_requested << 5) | + ((Bit8u)BX_KEY_THIS s.kbd_controller.irq1_requested << 4) | (BX_GET_ENABLE_A20() << 1) | 0x01, 0); break; @@ -712,7 +712,7 @@ Bit8u bx_keyb_c::get_elements() void BX_CPP_AttrRegparmN(1) bx_keyb_c::set_kbd_clock_enable(Bit8u value) { - bx_bool prev_kbd_clock_enabled; + bool prev_kbd_clock_enabled; if (value==0) { BX_KEY_THIS s.kbd_controller.kbd_clock_enabled = 0; @@ -729,7 +729,7 @@ bx_keyb_c::set_kbd_clock_enable(Bit8u value) void bx_keyb_c::set_aux_clock_enable(Bit8u value) { - bx_bool prev_aux_clock_enabled; + bool prev_aux_clock_enabled; BX_DEBUG(("set_aux_clock_enable(%u)", (unsigned) value)); if (value==0) { @@ -831,7 +831,7 @@ void bx_keyb_c::kbd_enQ(Bit8u scancode) } } -bx_bool bx_keyb_c::mouse_enQ_packet(Bit8u b1, Bit8u b2, Bit8u b3, Bit8u b4) +bool bx_keyb_c::mouse_enQ_packet(Bit8u b1, Bit8u b2, Bit8u b3, Bit8u b4) { int bytes = 3; if (BX_KEY_THIS s.mouse.im_mode) bytes = 4; @@ -1050,7 +1050,8 @@ unsigned bx_keyb_c::periodic(Bit32u usec_delta) UNUSED(usec_delta); - retval = BX_KEY_THIS s.kbd_controller.irq1_requested | (BX_KEY_THIS s.kbd_controller.irq12_requested << 1); + retval = (Bit8u)BX_KEY_THIS s.kbd_controller.irq1_requested | + ((Bit8u)BX_KEY_THIS s.kbd_controller.irq12_requested << 1); BX_KEY_THIS s.kbd_controller.irq1_requested = 0; BX_KEY_THIS s.kbd_controller.irq12_requested = 0; @@ -1115,7 +1116,7 @@ void bx_keyb_c::activate_timer(void) void bx_keyb_c::kbd_ctrl_to_mouse(Bit8u value) { // if we are not using a ps2 mouse, some of the following commands need to return different values - bx_bool is_ps2 = 0; + bool is_ps2 = 0; if ((BX_KEY_THIS s.mouse.type == BX_MOUSE_TYPE_PS2) || (BX_KEY_THIS s.mouse.type == BX_MOUSE_TYPE_IMPS2)) is_ps2 = 1; @@ -1343,7 +1344,7 @@ void bx_keyb_c::kbd_ctrl_to_mouse(Bit8u value) } } -void bx_keyb_c::create_mouse_packet(bx_bool force_enq) +void bx_keyb_c::create_mouse_packet(bool force_enq) { Bit8u b1, b2, b3, b4; @@ -1427,7 +1428,7 @@ void bx_keyb_c::mouse_enq_static(void *dev, int delta_x, int delta_y, int delta_ void bx_keyb_c::mouse_motion(int delta_x, int delta_y, int delta_z, unsigned button_state, bool absxy) { - bx_bool force_enq=0; + bool force_enq=0; // don't generate interrupts if we are in remote mode. if (BX_KEY_THIS s.mouse.mode == MOUSE_MODE_REMOTE) diff --git a/bochs/iodev/keyboard.h b/bochs/iodev/keyboard.h index db279bfe7..9f9203f5a 100644 --- a/bochs/iodev/keyboard.h +++ b/bochs/iodev/keyboard.h @@ -52,7 +52,7 @@ private: BX_KEY_SMF Bit8u get_elements(void); BX_KEY_SMF Bit8u get_kbd_enable(void); - BX_KEY_SMF void create_mouse_packet(bx_bool force_enq); + BX_KEY_SMF void create_mouse_packet(bool force_enq); BX_KEY_SMF unsigned periodic(Bit32u usec_delta); @@ -66,22 +66,22 @@ private: struct { struct { /* status bits matching the status port*/ - bx_bool pare; // Bit7, 1= parity error from keyboard/mouse - ignored. - bx_bool tim; // Bit6, 1= timeout from keyboard - ignored. - bx_bool auxb; // Bit5, 1= mouse data waiting for CPU to read. - bx_bool keyl; // Bit4, 1= keyswitch in lock position - ignored. - bx_bool c_d; /* Bit3, 1=command to port 64h, 0=data to port 60h */ - bx_bool sysf; // Bit2, - bx_bool inpb; // Bit1, - bx_bool outb; // Bit0, 1= keyboard data or mouse data ready for CPU - // check aux to see which. Or just keyboard - // data before AT style machines + bool pare; // Bit7, 1= parity error from keyboard/mouse - ignored. + bool tim; // Bit6, 1= timeout from keyboard - ignored. + bool auxb; // Bit5, 1= mouse data waiting for CPU to read. + bool keyl; // Bit4, 1= keyswitch in lock position - ignored. + bool c_d; // Bit3, 1=command to port 64h, 0=data to port 60h + bool sysf; // Bit2, + bool inpb; // Bit1, + bool outb; // Bit0, 1= keyboard data or mouse data ready for CPU + // check aux to see which. Or just keyboard + // data before AT style machines /* internal to our version of the keyboard controller */ - bx_bool kbd_clock_enabled; - bx_bool aux_clock_enabled; - bx_bool allow_irq1; - bx_bool allow_irq12; + bool kbd_clock_enabled; + bool aux_clock_enabled; + bool allow_irq1; + bool allow_irq12; Bit8u kbd_output_buffer; Bit8u aux_output_buffer; Bit8u last_comm; @@ -89,12 +89,12 @@ private: Bit8u expecting_mouse_parameter; Bit8u last_mouse_command; Bit32u timer_pending; - bx_bool irq1_requested; - bx_bool irq12_requested; - bx_bool scancodes_translate; - bx_bool expecting_scancodes_set; + bool irq1_requested; + bool irq12_requested; + bool scancodes_translate; + bool expecting_scancodes_set; Bit8u current_scancodes_set; - bx_bool bat_in_progress; + bool bat_in_progress; Bit8u kbd_type; } kbd_controller; @@ -105,7 +105,7 @@ private: Bit8u scaling; Bit8u mode; Bit8u saved_mode; // the mode prior to entering wrap mode - bx_bool enable; + bool enable; Bit8u get_status_byte () { @@ -145,24 +145,24 @@ private: return ret; } - Bit8u button_status; + Bit8u button_status; Bit16s delayed_dx; Bit16s delayed_dy; Bit16s delayed_dz; - Bit8u im_request; - bx_bool im_mode; + Bit8u im_request; + bool im_mode; } mouse; struct { int num_elements; Bit8u buffer[BX_KBD_ELEMENTS]; int head; - bx_bool expecting_typematic; - bx_bool expecting_led_write; + bool expecting_typematic; + bool expecting_led_write; Bit8u delay; Bit8u repeat_rate; Bit8u led_status; - bx_bool scanning_enabled; + bool scanning_enabled; } kbd_internal_buffer; struct { @@ -176,7 +176,7 @@ private: unsigned controller_Qsource; // 0=keyboard, 1=mouse } s; // State information for saving/loading - BX_KEY_SMF void resetinternals(bx_bool powerup); + BX_KEY_SMF void resetinternals(bool powerup); BX_KEY_SMF void set_kbd_clock_enable(Bit8u value) BX_CPP_AttrRegparmN(1); BX_KEY_SMF void set_aux_clock_enable(Bit8u value); BX_KEY_SMF void kbd_ctrl_to_kbd(Bit8u value); @@ -185,7 +185,7 @@ private: BX_KEY_SMF void kbd_enQ_imm(Bit8u val); BX_KEY_SMF void activate_timer(void); BX_KEY_SMF void controller_enQ(Bit8u data, unsigned source); - BX_KEY_SMF bx_bool mouse_enQ_packet(Bit8u b1, Bit8u b2, Bit8u b3, Bit8u b4); + BX_KEY_SMF bool mouse_enQ_packet(Bit8u b1, Bit8u b2, Bit8u b3, Bit8u b4); BX_KEY_SMF void mouse_enQ(Bit8u mouse_data); static void mouse_enabled_changed_static(void *dev, bool enabled); diff --git a/bochs/iodev/parallel.cc b/bochs/iodev/parallel.cc index 8496cf1ee..01868a817 100644 --- a/bochs/iodev/parallel.cc +++ b/bochs/iodev/parallel.cc @@ -304,11 +304,11 @@ Bit32u bx_parallel_c::read(Bit32u address, unsigned io_len) break; case BX_PAR_STAT: { - retval = ((BX_PAR_THIS s[port].STATUS.busy << 7) | - (BX_PAR_THIS s[port].STATUS.ack << 6) | - (BX_PAR_THIS s[port].STATUS.pe << 5) | - (BX_PAR_THIS s[port].STATUS.slct << 4) | - (BX_PAR_THIS s[port].STATUS.error << 3)); + retval = ((Bit8u)(BX_PAR_THIS s[port].STATUS.busy << 7) | + (Bit8u)(BX_PAR_THIS s[port].STATUS.ack << 6) | + (Bit8u)(BX_PAR_THIS s[port].STATUS.pe << 5) | + (Bit8u)(BX_PAR_THIS s[port].STATUS.slct << 4) | + (Bit8u)(BX_PAR_THIS s[port].STATUS.error << 3)); if (BX_PAR_THIS s[port].STATUS.ack == 0) { BX_PAR_THIS s[port].STATUS.ack = 1; if (BX_PAR_THIS s[port].CONTROL.irq == 1) { @@ -330,12 +330,12 @@ Bit32u bx_parallel_c::read(Bit32u address, unsigned io_len) break; case BX_PAR_CTRL: { - retval = ((BX_PAR_THIS s[port].CONTROL.input << 5) | - (BX_PAR_THIS s[port].CONTROL.irq << 4) | - (BX_PAR_THIS s[port].CONTROL.slct_in << 3) | - (BX_PAR_THIS s[port].CONTROL.init << 2) | - (BX_PAR_THIS s[port].CONTROL.autofeed << 1) | - (BX_PAR_THIS s[port].CONTROL.strobe)); + retval = ((Bit8u)(BX_PAR_THIS s[port].CONTROL.input << 5) | + (Bit8u)(BX_PAR_THIS s[port].CONTROL.irq << 4) | + (Bit8u)(BX_PAR_THIS s[port].CONTROL.slct_in << 3) | + (Bit8u)(BX_PAR_THIS s[port].CONTROL.init << 2) | + (Bit8u)(BX_PAR_THIS s[port].CONTROL.autofeed << 1) | + (Bit8u)(BX_PAR_THIS s[port].CONTROL.strobe)); BX_DEBUG(("read: parport%d control register returns 0x%02x", port+1, retval)); return retval; } diff --git a/bochs/iodev/parallel.h b/bochs/iodev/parallel.h index 393b4afaf..6747806fc 100644 --- a/bochs/iodev/parallel.h +++ b/bochs/iodev/parallel.h @@ -2,7 +2,7 @@ // $Id$ ///////////////////////////////////////////////////////////////////////// // -// Copyright (C) 2001-2017 The Bochs Project +// Copyright (C) 2001-2021 The Bochs Project // // This library is free software; you can redistribute it and/or // modify it under the terms of the GNU Lesser General Public @@ -38,25 +38,25 @@ typedef struct { Bit8u data; struct { - bx_bool error; - bx_bool slct; - bx_bool pe; - bx_bool ack; - bx_bool busy; + bool error; + bool slct; + bool pe; + bool ack; + bool busy; } STATUS; struct { - bx_bool strobe; - bx_bool autofeed; - bx_bool init; - bx_bool slct_in; - bx_bool irq; - bx_bool input; + bool strobe; + bool autofeed; + bool init; + bool slct_in; + bool irq; + bool input; } CONTROL; Bit8u IRQ; bx_param_string_c *file; FILE *output; - bx_bool file_changed; - bx_bool initmode; + bool file_changed; + bool initmode; } bx_par_t; class bx_parallel_c : public bx_devmodel_c { diff --git a/bochs/iodev/pci.cc b/bochs/iodev/pci.cc index 6e14b2b39..becac2227 100644 --- a/bochs/iodev/pci.cc +++ b/bochs/iodev/pci.cc @@ -249,8 +249,8 @@ void bx_pci_bridge_c::pci_write_handler(Bit8u address, Bit32u value, unsigned io Bit8u value8, oldval; unsigned area; Bit8u drba_reg, old_dram_detect; - bx_bool drba_changed; - bx_bool attbase_changed = 0; + bool drba_changed; + bool attbase_changed = 0; Bit32u apsize; old_dram_detect = BX_PCI_THIS dram_detect; @@ -444,7 +444,7 @@ bool bx_pci_bridge_c::agp_ap_read_handler(bx_phy_address addr, unsigned len, } Bit32u bx_pci_bridge_c::agp_aperture_read(bx_phy_address addr, unsigned len, - bx_bool agp) + bool agp) { if (BX_PCI_THIS pci_conf[0x51] & 0x02) { Bit32u offset = (Bit32u)(addr - pci_bar[0].addr); @@ -470,7 +470,7 @@ bool bx_pci_bridge_c::agp_ap_write_handler(bx_phy_address addr, unsigned len, } void bx_pci_bridge_c::agp_aperture_write(bx_phy_address addr, Bit32u value, - unsigned len, bx_bool agp) + unsigned len, bool agp) { if (BX_PCI_THIS pci_conf[0x51] & 0x02) { Bit32u offset = (Bit32u)(addr - pci_bar[0].addr); @@ -532,7 +532,7 @@ void bx_pci_bridge_c::smram_control(Bit8u value8) bx_devices.mem->disable_smram(); } else { - bx_bool DOPEN = (value8 & 0x40) > 0, DCLS = (value8 & 0x20) > 0; + bool DOPEN = (value8 & 0x40) > 0, DCLS = (value8 & 0x20) > 0; if(DOPEN && DCLS) BX_PANIC(("SMRAM control: DOPEN not mutually exclusive with DCLS !")); bx_devices.mem->enable_smram(DOPEN, DCLS); } diff --git a/bochs/iodev/pci.h b/bochs/iodev/pci.h index ec055bbf9..93b42f231 100644 --- a/bochs/iodev/pci.h +++ b/bochs/iodev/pci.h @@ -50,8 +50,8 @@ public: static bool agp_ap_read_handler(bx_phy_address addr, unsigned len, void *data, void *param); static bool agp_ap_write_handler(bx_phy_address addr, unsigned len, void *data, void *param); - Bit32u agp_aperture_read(bx_phy_address addr, unsigned len, bx_bool agp); - void agp_aperture_write(bx_phy_address addr, Bit32u value, unsigned len, bx_bool agp); + Bit32u agp_aperture_read(bx_phy_address addr, unsigned len, bool agp); + void agp_aperture_write(bx_phy_address addr, Bit32u value, unsigned len, bool agp); virtual void pci_write_handler(Bit8u address, Bit32u value, unsigned io_len); #if BX_DEBUGGER diff --git a/bochs/iodev/pci_ide.cc b/bochs/iodev/pci_ide.cc index a1007789c..ec4b7a367 100644 --- a/bochs/iodev/pci_ide.cc +++ b/bochs/iodev/pci_ide.cc @@ -349,8 +349,8 @@ Bit32u bx_pci_ide_c::read(Bit32u address, unsigned io_len) offset &= 0x07; switch (offset) { case 0x00: - value = BX_PIDE_THIS s.bmdma[channel].cmd_ssbm | - (BX_PIDE_THIS s.bmdma[channel].cmd_rwcon << 3); + value = (Bit32u)BX_PIDE_THIS s.bmdma[channel].cmd_ssbm | + (Bit32u)(BX_PIDE_THIS s.bmdma[channel].cmd_rwcon << 3); BX_DEBUG(("BM-DMA read command register, channel %d, value = 0x%02x", channel, value)); break; case 0x02: diff --git a/bochs/iodev/pci_ide.h b/bochs/iodev/pci_ide.h index 49f399c91..119f3f9c2 100644 --- a/bochs/iodev/pci_ide.h +++ b/bochs/iodev/pci_ide.h @@ -59,8 +59,8 @@ private: struct { unsigned chipset; struct { - bx_bool cmd_ssbm; - bx_bool cmd_rwcon; + bool cmd_ssbm; + bool cmd_rwcon; Bit8u status; Bit32u dtpr; Bit32u prd_current; @@ -68,7 +68,7 @@ private: Bit8u *buffer; Bit8u *buffer_top; Bit8u *buffer_idx; - bx_bool data_ready; + bool data_ready; } bmdma[2]; } s; diff --git a/bochs/iodev/pcidev.cc b/bochs/iodev/pcidev.cc index 1bedef40f..772c9e73e 100644 --- a/bochs/iodev/pcidev.cc +++ b/bochs/iodev/pcidev.cc @@ -157,7 +157,7 @@ static void pcidev_sighandler(int param) DEV_pci_set_irq(pcidev->devfunc, pcidev->intpin, 1); } -static bx_bool pcidev_mem_read_handler(bx_phy_address addr, unsigned len, void *data, void *param) +static bool pcidev_mem_read_handler(bx_phy_address addr, unsigned len, void *data, void *param) { struct region_struct *region = (struct region_struct *)param; bx_pcidev_c *pcidev = region->pcidev; @@ -194,7 +194,7 @@ static bx_bool pcidev_mem_read_handler(bx_phy_address addr, unsigned len, void * } -static bx_bool pcidev_mem_write_handler(bx_phy_address addr, unsigned len, void *data, void *param) +static bool pcidev_mem_write_handler(bx_phy_address addr, unsigned len, void *data, void *param) { struct region_struct *region = (struct region_struct *)param; bx_pcidev_c *pcidev = region->pcidev; diff --git a/bochs/iodev/serial.cc b/bochs/iodev/serial.cc index ec0eb6587..0c67c6710 100644 --- a/bochs/iodev/serial.cc +++ b/bochs/iodev/serial.cc @@ -59,7 +59,7 @@ typedef int SOCKET; bx_serial_c *theSerialDevice = NULL; #ifdef BX_SER_WIN32 -static bx_bool winsock_init = false; +static bool winsock_init = false; #endif // builtin configuration handling functions @@ -454,7 +454,7 @@ bx_serial_c::init(void) char host[BX_PATHNAME_LEN]; int port; SOCKET socket; - bx_bool server = (mode == BX_SER_MODE_SOCKET_SERVER); + bool server = (mode == BX_SER_MODE_SOCKET_SERVER); #ifdef BX_SER_WIN32 if (!winsock_init) { @@ -536,7 +536,7 @@ bx_serial_c::init(void) } else if ((mode == BX_SER_MODE_PIPE_CLIENT) || (mode == BX_SER_MODE_PIPE_SERVER)) { if (strlen(dev) > 0) { - bx_bool server = (mode == BX_SER_MODE_PIPE_SERVER); + bool server = (mode == BX_SER_MODE_PIPE_SERVER); #ifdef BX_SER_WIN32 HANDLE pipe; @@ -707,7 +707,7 @@ void bx_serial_c::lower_interrupt(Bit8u port) void bx_serial_c::raise_interrupt(Bit8u port, int type) { - bx_bool gen_int = 0; + bool gen_int = 0; switch (type) { case BX_SER_INT_IER: /* IER has changed */ @@ -824,10 +824,10 @@ Bit32u bx_serial_c::read(Bit32u address, unsigned io_len) if (BX_SER_THIS s[port].line_cntl.dlab) { val = BX_SER_THIS s[port].divisor_msb; } else { - val = BX_SER_THIS s[port].int_enable.rxdata_enable | - (BX_SER_THIS s[port].int_enable.txhold_enable << 1) | - (BX_SER_THIS s[port].int_enable.rxlstat_enable << 2) | - (BX_SER_THIS s[port].int_enable.modstat_enable << 3); + val = (Bit8u)BX_SER_THIS s[port].int_enable.rxdata_enable | + ((Bit8u)BX_SER_THIS s[port].int_enable.txhold_enable << 1) | + ((Bit8u)BX_SER_THIS s[port].int_enable.rxlstat_enable << 2) | + ((Bit8u)BX_SER_THIS s[port].int_enable.modstat_enable << 3); } break; @@ -857,38 +857,38 @@ Bit32u bx_serial_c::read(Bit32u address, unsigned io_len) BX_SER_THIS s[port].tx_interrupt = 0; lower_interrupt(port); - val = BX_SER_THIS s[port].int_ident.ipending | + val = (Bit8u)BX_SER_THIS s[port].int_ident.ipending | (BX_SER_THIS s[port].int_ident.int_ID << 1) | (BX_SER_THIS s[port].fifo_cntl.enable ? 0xc0 : 0x00); break; case BX_SER_LCR: /* Line control register */ val = BX_SER_THIS s[port].line_cntl.wordlen_sel | - (BX_SER_THIS s[port].line_cntl.stopbits << 2) | - (BX_SER_THIS s[port].line_cntl.parity_enable << 3) | - (BX_SER_THIS s[port].line_cntl.evenparity_sel << 4) | - (BX_SER_THIS s[port].line_cntl.stick_parity << 5) | - (BX_SER_THIS s[port].line_cntl.break_cntl << 6) | - (BX_SER_THIS s[port].line_cntl.dlab << 7); + ((Bit8u)BX_SER_THIS s[port].line_cntl.stopbits << 2) | + ((Bit8u)BX_SER_THIS s[port].line_cntl.parity_enable << 3) | + ((Bit8u)BX_SER_THIS s[port].line_cntl.evenparity_sel << 4) | + ((Bit8u)BX_SER_THIS s[port].line_cntl.stick_parity << 5) | + ((Bit8u)BX_SER_THIS s[port].line_cntl.break_cntl << 6) | + ((Bit8u)BX_SER_THIS s[port].line_cntl.dlab << 7); break; case BX_SER_MCR: /* MODEM control register */ - val = BX_SER_THIS s[port].modem_cntl.dtr | - (BX_SER_THIS s[port].modem_cntl.rts << 1) | - (BX_SER_THIS s[port].modem_cntl.out1 << 2) | - (BX_SER_THIS s[port].modem_cntl.out2 << 3) | - (BX_SER_THIS s[port].modem_cntl.local_loopback << 4); + val = (Bit8u)BX_SER_THIS s[port].modem_cntl.dtr | + ((Bit8u)BX_SER_THIS s[port].modem_cntl.rts << 1) | + ((Bit8u)BX_SER_THIS s[port].modem_cntl.out1 << 2) | + ((Bit8u)BX_SER_THIS s[port].modem_cntl.out2 << 3) | + ((Bit8u)BX_SER_THIS s[port].modem_cntl.local_loopback << 4); break; case BX_SER_LSR: /* Line status register */ - val = BX_SER_THIS s[port].line_status.rxdata_ready | - (BX_SER_THIS s[port].line_status.overrun_error << 1) | - (BX_SER_THIS s[port].line_status.parity_error << 2) | - (BX_SER_THIS s[port].line_status.framing_error << 3) | - (BX_SER_THIS s[port].line_status.break_int << 4) | - (BX_SER_THIS s[port].line_status.thr_empty << 5) | - (BX_SER_THIS s[port].line_status.tsr_empty << 6) | - (BX_SER_THIS s[port].line_status.fifo_error << 7); + val = (Bit8u)BX_SER_THIS s[port].line_status.rxdata_ready | + ((Bit8u)BX_SER_THIS s[port].line_status.overrun_error << 1) | + ((Bit8u)BX_SER_THIS s[port].line_status.parity_error << 2) | + ((Bit8u)BX_SER_THIS s[port].line_status.framing_error << 3) | + ((Bit8u)BX_SER_THIS s[port].line_status.break_int << 4) | + ((Bit8u)BX_SER_THIS s[port].line_status.thr_empty << 5) | + ((Bit8u)BX_SER_THIS s[port].line_status.tsr_empty << 6) | + ((Bit8u)BX_SER_THIS s[port].line_status.fifo_error << 7); BX_SER_THIS s[port].line_status.overrun_error = 0; BX_SER_THIS s[port].line_status.framing_error = 0; BX_SER_THIS s[port].line_status.break_int = 0; @@ -900,10 +900,10 @@ Bit32u bx_serial_c::read(Bit32u address, unsigned io_len) case BX_SER_MSR: /* MODEM status register */ #if USE_RAW_SERIAL if (BX_SER_THIS s[port].io_mode == BX_SER_MODE_RAW) { - bx_bool prev_cts = BX_SER_THIS s[port].modem_status.cts; - bx_bool prev_dsr = BX_SER_THIS s[port].modem_status.dsr; - bx_bool prev_ri = BX_SER_THIS s[port].modem_status.ri; - bx_bool prev_dcd = BX_SER_THIS s[port].modem_status.dcd; + bool prev_cts = BX_SER_THIS s[port].modem_status.cts; + bool prev_dsr = BX_SER_THIS s[port].modem_status.dsr; + bool prev_ri = BX_SER_THIS s[port].modem_status.ri; + bool prev_dcd = BX_SER_THIS s[port].modem_status.dcd; val = BX_SER_THIS s[port].raw->get_modem_status(); BX_SER_THIS s[port].modem_status.cts = (val & 0x10) >> 4; @@ -923,14 +923,14 @@ Bit32u bx_serial_c::read(Bit32u address, unsigned io_len) } } #endif - val = BX_SER_THIS s[port].modem_status.delta_cts | - (BX_SER_THIS s[port].modem_status.delta_dsr << 1) | - (BX_SER_THIS s[port].modem_status.ri_trailedge << 2) | - (BX_SER_THIS s[port].modem_status.delta_dcd << 3) | - (BX_SER_THIS s[port].modem_status.cts << 4) | - (BX_SER_THIS s[port].modem_status.dsr << 5) | - (BX_SER_THIS s[port].modem_status.ri << 6) | - (BX_SER_THIS s[port].modem_status.dcd << 7); + val = (Bit8u)BX_SER_THIS s[port].modem_status.delta_cts | + ((Bit8u)BX_SER_THIS s[port].modem_status.delta_dsr << 1) | + ((Bit8u)BX_SER_THIS s[port].modem_status.ri_trailedge << 2) | + ((Bit8u)BX_SER_THIS s[port].modem_status.delta_dcd << 3) | + ((Bit8u)BX_SER_THIS s[port].modem_status.cts << 4) | + ((Bit8u)BX_SER_THIS s[port].modem_status.dsr << 5) | + ((Bit8u)BX_SER_THIS s[port].modem_status.ri << 6) | + ((Bit8u)BX_SER_THIS s[port].modem_status.dcd << 7); BX_SER_THIS s[port].modem_status.delta_cts = 0; BX_SER_THIS s[port].modem_status.delta_dsr = 0; BX_SER_THIS s[port].modem_status.ri_trailedge = 0; @@ -971,15 +971,15 @@ void bx_serial_c::write(Bit32u address, Bit32u value, unsigned io_len) #else UNUSED(this_ptr); #endif // !BX_USE_SER_SMF - bx_bool gen_int = 0; + bool gen_int = 0; Bit8u offset, new_wordlen; #if USE_RAW_SERIAL - bx_bool mcr_changed = 0; + bool mcr_changed = 0; Bit8u p_mode; #endif Bit8u port = 0; int new_baudrate; - bx_bool restart_timer = 0; + bool restart_timer = 0; if (io_len == 2) { BX_SER_THIS write_handler(theSerialDevice, address, (value & 0xff), 1); @@ -997,14 +997,14 @@ void bx_serial_c::write(Bit32u address, Bit32u value, unsigned io_len) BX_DEBUG(("com%d register write to address: 0x%04x = 0x%02x", port+1, address, value)); - bx_bool new_b0 = value & 0x01; - bx_bool new_b1 = (value & 0x02) >> 1; - bx_bool new_b2 = (value & 0x04) >> 2; - bx_bool new_b3 = (value & 0x08) >> 3; - bx_bool new_b4 = (value & 0x10) >> 4; - bx_bool new_b5 = (value & 0x20) >> 5; - bx_bool new_b6 = (value & 0x40) >> 6; - bx_bool new_b7 = (value & 0x80) >> 7; + bool new_b0 = value & 0x01; + bool new_b1 = (value & 0x02) >> 1; + bool new_b2 = (value & 0x04) >> 2; + bool new_b3 = (value & 0x08) >> 3; + bool new_b4 = (value & 0x10) >> 4; + bool new_b5 = (value & 0x20) >> 5; + bool new_b6 = (value & 0x40) >> 6; + bool new_b7 = (value & 0x80) >> 7; switch (offset) { case BX_SER_THR: /* transmit buffer, or divisor latch LSB if DLAB set */ @@ -1284,10 +1284,10 @@ void bx_serial_c::write(Bit32u address, Bit32u value, unsigned io_len) } if (BX_SER_THIS s[port].modem_cntl.local_loopback) { - bx_bool prev_cts = BX_SER_THIS s[port].modem_status.cts; - bx_bool prev_dsr = BX_SER_THIS s[port].modem_status.dsr; - bx_bool prev_ri = BX_SER_THIS s[port].modem_status.ri; - bx_bool prev_dcd = BX_SER_THIS s[port].modem_status.dcd; + bool prev_cts = BX_SER_THIS s[port].modem_status.cts; + bool prev_dsr = BX_SER_THIS s[port].modem_status.dsr; + bool prev_ri = BX_SER_THIS s[port].modem_status.ri; + bool prev_dcd = BX_SER_THIS s[port].modem_status.dcd; BX_SER_THIS s[port].modem_status.cts = BX_SER_THIS s[port].modem_cntl.rts; BX_SER_THIS s[port].modem_status.dsr = BX_SER_THIS s[port].modem_cntl.dtr; BX_SER_THIS s[port].modem_status.ri = BX_SER_THIS s[port].modem_cntl.out1; @@ -1372,7 +1372,7 @@ void bx_serial_c::write(Bit32u address, Bit32u value, unsigned io_len) void bx_serial_c::rx_fifo_enq(Bit8u port, Bit8u data) { - bx_bool gen_int = 0; + bool gen_int = 0; if (BX_SER_THIS s[port].fifo_cntl.enable) { if (BX_SER_THIS s[port].rx_fifo_end == 16) { @@ -1427,7 +1427,7 @@ void bx_serial_c::tx_timer_handler(void *this_ptr) void bx_serial_c::tx_timer(void) { - bx_bool gen_int = 0; + bool gen_int = 0; Bit8u port = (Bit8u)bx_pc_system.triggeredTimerParam(); switch (BX_SER_THIS s[port].io_mode) { @@ -1519,7 +1519,7 @@ void bx_serial_c::rx_timer(void) fd_set fds; #endif Bit8u port = (Bit8u)bx_pc_system.triggeredTimerParam(); - bx_bool data_ready = 0; + bool data_ready = 0; int db_usec = BX_SER_THIS s[port].databyte_usec; unsigned char chbuf = 0; diff --git a/bochs/iodev/serial.h b/bochs/iodev/serial.h index 23c938a0f..d7ad5cb11 100644 --- a/bochs/iodev/serial.h +++ b/bochs/iodev/serial.h @@ -90,22 +90,22 @@ typedef struct { /* * UART internal state */ - bx_bool ls_interrupt; - bx_bool ms_interrupt; - bx_bool rx_interrupt; - bx_bool tx_interrupt; - bx_bool fifo_interrupt; - bx_bool ls_ipending; - bx_bool ms_ipending; - bx_bool rx_ipending; - bx_bool fifo_ipending; + bool ls_interrupt; + bool ms_interrupt; + bool rx_interrupt; + bool tx_interrupt; + bool fifo_interrupt; + bool ls_ipending; + bool ms_ipending; + bool rx_ipending; + bool fifo_ipending; Bit8u IRQ; Bit8u rx_fifo_end; Bit8u tx_fifo_end; - int baudrate; + int baudrate; Bit32u databyte_usec; int rx_timer_index; @@ -135,60 +135,60 @@ typedef struct { Bit8u thrbuffer; /* transmit holding register (w/o) */ /* Interrupt Enable Register */ struct { - bx_bool rxdata_enable; /* 1=enable receive data interrupts */ - bx_bool txhold_enable; /* 1=enable tx. holding reg. empty ints */ - bx_bool rxlstat_enable; /* 1=enable rx line status interrupts */ - bx_bool modstat_enable; /* 1=enable modem status interrupts */ + bool rxdata_enable; /* 1=enable receive data interrupts */ + bool txhold_enable; /* 1=enable tx. holding reg. empty ints */ + bool rxlstat_enable; /* 1=enable rx line status interrupts */ + bool modstat_enable; /* 1=enable modem status interrupts */ } int_enable; /* Interrupt Identification Register (r/o) */ struct { - bx_bool ipending; /* 0=interrupt pending */ - Bit8u int_ID; /* 3-bit interrupt ID */ + bool ipending; /* 0=interrupt pending */ + Bit8u int_ID; /* 3-bit interrupt ID */ } int_ident; /* FIFO Control Register (w/o) */ struct { - bx_bool enable; /* 1=enable tx and rx FIFOs */ - Bit8u rxtrigger; /* 2-bit code for rx fifo trigger level */ + bool enable; /* 1=enable tx and rx FIFOs */ + Bit8u rxtrigger; /* 2-bit code for rx fifo trigger level */ } fifo_cntl; /* Line Control Register (r/w) */ struct { - Bit8u wordlen_sel; /* 2-bit code for char length */ - bx_bool stopbits; /* select stop bit len */ - bx_bool parity_enable; /* ... */ - bx_bool evenparity_sel; /* ... */ - bx_bool stick_parity; /* ... */ - bx_bool break_cntl; /* 1=send break signal */ - bx_bool dlab; /* divisor latch access bit */ + Bit8u wordlen_sel; /* 2-bit code for char length */ + bool stopbits; /* select stop bit len */ + bool parity_enable; /* ... */ + bool evenparity_sel; /* ... */ + bool stick_parity; /* ... */ + bool break_cntl; /* 1=send break signal */ + bool dlab; /* divisor latch access bit */ } line_cntl; /* MODEM Control Register (r/w) */ struct { - bx_bool dtr; /* DTR output value */ - bx_bool rts; /* RTS output value */ - bx_bool out1; /* OUTPUT1 value */ - bx_bool out2; /* OUTPUT2 value */ - bx_bool local_loopback; /* 1=loopback mode */ + bool dtr; /* DTR output value */ + bool rts; /* RTS output value */ + bool out1; /* OUTPUT1 value */ + bool out2; /* OUTPUT2 value */ + bool local_loopback; /* 1=loopback mode */ } modem_cntl; /* Line Status Register (r/w) */ struct { - bx_bool rxdata_ready; /* 1=receiver data ready */ - bx_bool overrun_error; /* 1=receive overrun detected */ - bx_bool parity_error; /* 1=rx char has a bad parity bit */ - bx_bool framing_error; /* 1=no stop bit detected for rx char */ - bx_bool break_int; /* 1=break signal detected */ - bx_bool thr_empty; /* 1=tx hold register (or fifo) is empty */ - bx_bool tsr_empty; /* 1=shift reg and hold reg empty */ - bx_bool fifo_error; /* 1=at least 1 err condition in fifo */ + bool rxdata_ready; /* 1=receiver data ready */ + bool overrun_error; /* 1=receive overrun detected */ + bool parity_error; /* 1=rx char has a bad parity bit */ + bool framing_error; /* 1=no stop bit detected for rx char */ + bool break_int; /* 1=break signal detected */ + bool thr_empty; /* 1=tx hold register (or fifo) is empty */ + bool tsr_empty; /* 1=shift reg and hold reg empty */ + bool fifo_error; /* 1=at least 1 err condition in fifo */ } line_status; /* Modem Status Register (r/w) */ struct { - bx_bool delta_cts; /* 1=CTS changed since last read */ - bx_bool delta_dsr; /* 1=DSR changed since last read */ - bx_bool ri_trailedge; /* 1=RI moved from low->high */ - bx_bool delta_dcd; /* 1=CD changed since last read */ - bx_bool cts; /* CTS input value */ - bx_bool dsr; /* DSR input value */ - bx_bool ri; /* RI input value */ - bx_bool dcd; /* DCD input value */ + bool delta_cts; /* 1=CTS changed since last read */ + bool delta_dsr; /* 1=DSR changed since last read */ + bool ri_trailedge; /* 1=RI moved from low->high */ + bool delta_dcd; /* 1=CD changed since last read */ + bool cts; /* CTS input value */ + bool dsr; /* DSR input value */ + bool ri; /* RI input value */ + bool dcd; /* DCD input value */ } modem_status; Bit8u scratch; /* Scratch Register (r/w) */ @@ -219,7 +219,7 @@ private: int mouse_delayed_dy; int mouse_delayed_dz; Bit8u mouse_buttons; - bx_bool mouse_update; + bool mouse_update; struct { int num_elements; Bit8u buffer[BX_MOUSE_BUFF_SIZE]; diff --git a/bochs/iodev/serial_raw.cc b/bochs/iodev/serial_raw.cc index 54f143b94..ea2735a59 100644 --- a/bochs/iodev/serial_raw.cc +++ b/bochs/iodev/serial_raw.cc @@ -2,7 +2,7 @@ // $Id$ ///////////////////////////////////////////////////////////////////////// // -// Copyright (C) 2004-2014 The Bochs Project +// Copyright (C) 2004-2021 The Bochs Project // // This library is free software; you can redistribute it and/or // modify it under the terms of the GNU Lesser General Public @@ -265,13 +265,13 @@ void serial_raw::transmit(Bit8u byte) } } -bx_bool serial_raw::ready_transmit() +bool serial_raw::ready_transmit() { BX_DEBUG(("ready_transmit returning %d", present)); return present; } -bx_bool serial_raw::ready_receive() +bool serial_raw::ready_receive() { #ifdef WIN32_RECEIVE_RAW if ((rxdata_count == 0) && (thread_rxdata_count > 0)) { diff --git a/bochs/iodev/serial_raw.h b/bochs/iodev/serial_raw.h index 52a4defa6..83c740536 100644 --- a/bochs/iodev/serial_raw.h +++ b/bochs/iodev/serial_raw.h @@ -2,7 +2,7 @@ // $Id$ ///////////////////////////////////////////////////////////////////////// // -// Copyright (C) 2004-2014 The Bochs Project +// Copyright (C) 2004-2021 The Bochs Project // // This library is free software; you can redistribute it and/or // modify it under the terms of the GNU Lesser General Public @@ -61,10 +61,10 @@ public: void set_parity_mode(int mode); void set_break(int mode); void set_modem_control(int ctrl); - int get_modem_status(); + int get_modem_status(); void transmit(Bit8u byte); - bx_bool ready_transmit(); - bx_bool ready_receive(); + bool ready_transmit(); + bool ready_receive(); int receive(); #ifdef WIN32_RECEIVE_RAW void serial_thread(); @@ -75,7 +75,7 @@ public: #ifdef WIN32_RECEIVE_RAW void enq_event(Bit16s event); #endif - bx_bool present; + bool present; unsigned rxdata_count; #ifdef WIN32 HANDLE hCOM; diff --git a/bochs/iodev/speaker.h b/bochs/iodev/speaker.h index ebffc54d7..f6c2093e9 100644 --- a/bochs/iodev/speaker.h +++ b/bochs/iodev/speaker.h @@ -61,11 +61,11 @@ private: #if BX_SUPPORT_SOUNDLOW bx_soundlow_waveout_c *waveout; int beep_callback_id; - bx_bool beep_active; + bool beep_active; Bit16s beep_level; Bit8u beep_volume; #if BX_HAVE_REALTIME_USEC - bx_bool dsp_active; + bool dsp_active; Bit64u dsp_start_usec; Bit64u dsp_cb_usec; Bit32u dsp_count; diff --git a/bochs/iodev/unmapped.h b/bochs/iodev/unmapped.h index 7ac9ecb13..ac3204600 100644 --- a/bochs/iodev/unmapped.h +++ b/bochs/iodev/unmapped.h @@ -2,7 +2,7 @@ // $Id$ ///////////////////////////////////////////////////////////////////////// // -// Copyright (C) 2001-2009 The Bochs Project +// Copyright (C) 2001-2021 The Bochs Project // // This library is free software; you can redistribute it and/or // modify it under the terms of the GNU Lesser General Public @@ -49,7 +49,7 @@ private: Bit8u port80; Bit8u port8e; Bit8u shutdown; - bx_bool port_e9_hack; + bool port_e9_hack; } s; // state information };