From dd36d3c754b72115bb667ed7015c2d0db721d603 Mon Sep 17 00:00:00 2001 From: Stanislav Shwartsman Date: Thu, 24 Mar 2011 19:06:58 +0000 Subject: [PATCH] fixed code breakpoint hit --- bochs/cpu/cpu.cc | 8 ++++++-- bochs/cpu/cpu.h | 2 +- bochs/cpu/crregs.cc | 9 +++++++-- 3 files changed, 14 insertions(+), 5 deletions(-) diff --git a/bochs/cpu/cpu.cc b/bochs/cpu/cpu.cc index f009b5707..b4b5c920a 100644 --- a/bochs/cpu/cpu.cc +++ b/bochs/cpu/cpu.cc @@ -525,6 +525,9 @@ unsigned BX_CPU_C::handleAsyncEvent(void) // A trap may be inhibited on this boundary due to an instruction // which loaded SS. If so we clear the inhibit_mask below // and don't execute this code until the next boundary. +#if BX_X86_DEBUGGER + code_breakpoint_match(get_laddr(BX_SEG_REG_CS, BX_CPU_THIS_PTR prev_rip)); +#endif exception(BX_DB_EXCEPTION, 0); // no error, not interrupt } @@ -619,8 +622,9 @@ unsigned BX_CPU_C::handleAsyncEvent(void) else { // only bother comparing if any breakpoints enabled and // debug events are not inhibited on this boundary. - if (! (BX_CPU_THIS_PTR inhibit_mask & BX_INHIBIT_DEBUG_SHADOW) && ! BX_CPU_THIS_PTR in_repeat) { - code_breakpoint_match(get_laddr(BX_SEG_REG_CS, BX_CPU_THIS_PTR prev_rip)); + if (! (BX_CPU_THIS_PTR inhibit_mask & BX_INHIBIT_DEBUG_SHADOW)) { + if (code_breakpoint_match(get_laddr(BX_SEG_REG_CS, BX_CPU_THIS_PTR prev_rip))) + exception(BX_DB_EXCEPTION, 0); // no error, not interrupt } } #endif diff --git a/bochs/cpu/cpu.h b/bochs/cpu/cpu.h index bbf716c0b..096e896f0 100644 --- a/bochs/cpu/cpu.h +++ b/bochs/cpu/cpu.h @@ -3446,7 +3446,7 @@ public: // for now... // x86 hardware debug support BX_SMF bx_bool hwbreakpoint_check(bx_address laddr); BX_SMF void iobreakpoint_match(unsigned port, unsigned len); - BX_SMF void code_breakpoint_match(bx_address laddr); + BX_SMF Bit32u code_breakpoint_match(bx_address laddr); BX_SMF void hwbreakpoint_match(bx_address laddr, unsigned len, unsigned rw); BX_SMF Bit32u hwdebug_compare(bx_address laddr, unsigned len, unsigned opa, unsigned opb); diff --git a/bochs/cpu/crregs.cc b/bochs/cpu/crregs.cc index 892c3d2fd..02749c68e 100755 --- a/bochs/cpu/crregs.cc +++ b/bochs/cpu/crregs.cc @@ -1209,17 +1209,22 @@ bx_bool BX_CPU_C::hwbreakpoint_check(bx_address laddr) return 0; } -void BX_CPU_C::code_breakpoint_match(bx_address laddr) +Bit32u BX_CPU_C::code_breakpoint_match(bx_address laddr) { + if (BX_CPU_THIS_PTR get_RF() || BX_CPU_THIS_PTR in_repeat) + return 0; + if (BX_CPU_THIS_PTR dr7.get_bp_enabled()) { Bit32u dr6_bits = hwdebug_compare(laddr, 1, BX_HWDebugInstruction, BX_HWDebugInstruction); if (dr6_bits) { // Add to the list of debug events thus far. BX_CPU_THIS_PTR debug_trap |= dr6_bits; BX_ERROR(("#DB: x86 code breakpoint catched")); - exception(BX_DB_EXCEPTION, 0); // no error, not interrupt + return dr6_bits; } } + + return 0; } void BX_CPU_C::hwbreakpoint_match(bx_address laddr, unsigned len, unsigned rw)